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authorShubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>2016-03-09 03:47:20 -0500
committerMark Brown <broonie@kernel.org>2016-03-09 22:31:21 -0500
commit82b3aea65f9fee161d8e07602e5a8c7b0b103fa3 (patch)
treea837e160b0d04216700a7a6e25ac39719c72d177
parent92e963f50fc74041b5e9e744c330dca48e04f08d (diff)
spi: xilinx: Add devicetree binding for spi-xilinx
Add a binding document for the spi/spi-xilinx Signed-off-by: Shubhrajyoti Datta <shubhraj@xilinx.com> Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--Documentation/devicetree/bindings/spi/spi-xilinx.txt22
1 files changed, 22 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-xilinx.txt b/Documentation/devicetree/bindings/spi/spi-xilinx.txt
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index 000000000000..c7b7856bd528
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+++ b/Documentation/devicetree/bindings/spi/spi-xilinx.txt
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1Xilinx SPI controller Device Tree Bindings
2-------------------------------------------------
3
4Required properties:
5- compatible : Should be "xlnx,xps-spi-2.00.a" or "xlnx,xps-spi-2.00.b"
6- reg : Physical base address and size of SPI registers map.
7- interrupts : Property with a value describing the interrupt
8 number.
9- interrupt-parent : Must be core interrupt controller
10
11Optional properties:
12- xlnx,num-ss-bits : Number of chip selects used.
13
14Example:
15 axi_quad_spi@41e00000 {
16 compatible = "xlnx,xps-spi-2.00.a";
17 interrupt-parent = <&intc>;
18 interrupts = <0 31 1>;
19 reg = <0x41e00000 0x10000>;
20 xlnx,num-ss-bits = <0x1>;
21 };
22