phy: miphy28lp: Inform the reset framework that our reset line may be shared

On the STiH410 B2120 development board the MiPHY28lp shares its reset
line with the Synopsys DWC3 SuperSpeed (SS) USB 3.0 Dual-Role-Device
(DRD).  New functionality in the reset subsystems forces consumers to
be explicit when requesting shared/exclusive reset lines.

Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

1 files changed, 2 insertions, 1 deletions

diff --git a/drivers/phy/phy-miphy28lp.c b/drivers/phy/phy-miphy28lp.c
index 3acd2a1808df..213e2e15339c 100644
--- a/drivers/phy/phy-miphy28lp.c
+++ b/drivers/phy/phy-miphy28lp.c
@@ -1143,7 +1143,8 @@ static int miphy28lp_probe_resets(struct device_node *node,
         struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;
         int err;
 
-        miphy_phy->miphy_rst = of_reset_control_get(node, "miphy-sw-rst");
+        miphy_phy->miphy_rst =
+                of_reset_control_get_shared(node, "miphy-sw-rst");
 
         if (IS_ERR(miphy_phy->miphy_rst)) {
                 dev_err(miphy_dev->dev,