Merge branch 'drm-fixes-4.16' of git://people.freedesktop.org/~agd5f/linux into drm-fixes

A few more fixes for 4.16.  Mostly for displays:
- A fix for DP handling on radeon
- Fix banding on eDP panels
- Fix HBR audio
- Fix for disabling VGA mode on Raven that leads to a corrupt or
  blank display on some platforms

* 'drm-fixes-4.16' of git://people.freedesktop.org/~agd5f/linux:
  drm/amd/display: Add one to EDID's audio channel count when passing to DC
  drm/amd/display: We shouldn't set format_default on plane as atomic driver
  drm/amd/display: Fix FMT truncation programming
  drm/amd/display: Allow truncation to 10 bits
  drm/amd/display: fix dereferencing possible ERR_PTR()
  drm/amd/display: Refine disable VGA
  drm/amdgpu: Use atomic function to disable crtcs with dc enabled
  drm/radeon: Don't turn off DP sink when disconnected

7 files changed, 48 insertions, 36 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index af1b879a9ee9..66cb10cdc7c3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2063,9 +2063,12 @@ void amdgpu_device_fini(struct amdgpu_device *adev)
 
         DRM_INFO("amdgpu: finishing device.\n");
         adev->shutdown = true;
-        if (adev->mode_info.mode_config_initialized)
-                drm_crtc_force_disable_all(adev->ddev);
-
+        if (adev->mode_info.mode_config_initialized){
+                if (!amdgpu_device_has_dc_support(adev))
+                        drm_crtc_force_disable_all(adev->ddev);
+                else
+                        drm_atomic_helper_shutdown(adev->ddev);
+        }
         amdgpu_ib_pool_fini(adev);
         amdgpu_fence_driver_fini(adev);
         amdgpu_fbdev_fini(adev);
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index c345e645f1d7..63c67346d316 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -3134,8 +3134,6 @@ static int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm,
 
         switch (aplane->base.type) {
         case DRM_PLANE_TYPE_PRIMARY:
-                aplane->base.format_default = true;
-
                 res = drm_universal_plane_init(
                                 dm->adev->ddev,
                                 &aplane->base,
@@ -4794,6 +4792,9 @@ static int dm_atomic_check_plane_state_fb(struct drm_atomic_state *state,
                         return -EDEADLK;
 
                 crtc_state = drm_atomic_get_crtc_state(plane_state->state, crtc);
+                if (IS_ERR(crtc_state))
+                        return PTR_ERR(crtc_state);
+
                 if (crtc->primary == plane && crtc_state->active) {
                         if (!plane_state->fb)
                                 return -EINVAL;
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
index 9bd142f65f9b..e1acc10e35a2 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
@@ -109,7 +109,7 @@ enum dc_edid_status dm_helpers_parse_edid_caps(
                 struct cea_sad *sad = &sads[i];
 
                 edid_caps->audio_modes[i].format_code = sad->format;
-                edid_caps->audio_modes[i].channel_count = sad->channels;
+                edid_caps->audio_modes[i].channel_count = sad->channels + 1;
                 edid_caps->audio_modes[i].sample_rate = sad->freq;
                 edid_caps->audio_modes[i].sample_size = sad->byte2;
         }
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h b/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h
index a993279a8f2d..f11f17fe08f9 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h
@@ -496,6 +496,9 @@ struct dce_hwseq_registers {
         HWS_SF(, DOMAIN7_PG_STATUS, DOMAIN7_PGFSM_PWR_STATUS, mask_sh), \
         HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \
         HWS_SF(, D1VGA_CONTROL, D1VGA_MODE_ENABLE, mask_sh),\
+        HWS_SF(, D2VGA_CONTROL, D2VGA_MODE_ENABLE, mask_sh),\
+        HWS_SF(, D3VGA_CONTROL, D3VGA_MODE_ENABLE, mask_sh),\
+        HWS_SF(, D4VGA_CONTROL, D4VGA_MODE_ENABLE, mask_sh),\
         HWS_SF(, VGA_TEST_CONTROL, VGA_TEST_ENABLE, mask_sh),\
         HWS_SF(, VGA_TEST_CONTROL, VGA_TEST_RENDER_START, mask_sh),\
         HWS_SF(, LVTMA_PWRSEQ_CNTL, LVTMA_BLON, mask_sh), \
@@ -591,7 +594,10 @@ struct dce_hwseq_registers {
         type DENTIST_DISPCLK_WDIVIDER; \
         type VGA_TEST_ENABLE; \
         type VGA_TEST_RENDER_START; \
-        type D1VGA_MODE_ENABLE;
+        type D1VGA_MODE_ENABLE; \
+        type D2VGA_MODE_ENABLE; \
+        type D3VGA_MODE_ENABLE; \
+        type D4VGA_MODE_ENABLE;
 
 struct dce_hwseq_shift {
         HWSEQ_REG_FIELD_LIST(uint8_t)
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_opp.c b/drivers/gpu/drm/amd/display/dc/dce/dce_opp.c
index 3931412ab6d3..87093894ea9e 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_opp.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_opp.c
@@ -128,23 +128,22 @@ static void set_truncation(
                 return;
         }
         /* on other format-to do */
-        if (params->flags.TRUNCATE_ENABLED == 0 ||
-                        params->flags.TRUNCATE_DEPTH == 2)
+        if (params->flags.TRUNCATE_ENABLED == 0)
                 return;
         /*Set truncation depth and Enable truncation*/
         REG_UPDATE_3(FMT_BIT_DEPTH_CONTROL,
                                 FMT_TRUNCATE_EN, 1,
                                 FMT_TRUNCATE_DEPTH,
-                                params->flags.TRUNCATE_MODE,
+                                params->flags.TRUNCATE_DEPTH,
                                 FMT_TRUNCATE_MODE,
-                                params->flags.TRUNCATE_DEPTH);
+                                params->flags.TRUNCATE_MODE);
 }
 
 
 /**
  *      set_spatial_dither
  *      1) set spatial dithering mode: pattern of seed
- *      2) set spatical dithering depth: 0 for 18bpp or 1 for 24bpp
+ *      2) set spatial dithering depth: 0 for 18bpp or 1 for 24bpp
  *      3) set random seed
  *      4) set random mode
  *              lfsr is reset every frame or not reset
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 072e4485e85e..dc1e010725c1 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -238,14 +238,24 @@ static void enable_power_gating_plane(
 static void disable_vga(
         struct dce_hwseq *hws)
 {
-        unsigned int in_vga_mode = 0;
-
-        REG_GET(D1VGA_CONTROL, D1VGA_MODE_ENABLE, &in_vga_mode);
-
-        if (in_vga_mode == 0)
+        unsigned int in_vga1_mode = 0;
+        unsigned int in_vga2_mode = 0;
+        unsigned int in_vga3_mode = 0;
+        unsigned int in_vga4_mode = 0;
+
+        REG_GET(D1VGA_CONTROL, D1VGA_MODE_ENABLE, &in_vga1_mode);
+        REG_GET(D2VGA_CONTROL, D2VGA_MODE_ENABLE, &in_vga2_mode);
+        REG_GET(D3VGA_CONTROL, D3VGA_MODE_ENABLE, &in_vga3_mode);
+        REG_GET(D4VGA_CONTROL, D4VGA_MODE_ENABLE, &in_vga4_mode);
+
+        if (in_vga1_mode == 0 && in_vga2_mode == 0 &&
+                        in_vga3_mode == 0 && in_vga4_mode == 0)
                 return;
 
         REG_WRITE(D1VGA_CONTROL, 0);
+        REG_WRITE(D2VGA_CONTROL, 0);
+        REG_WRITE(D3VGA_CONTROL, 0);
+        REG_WRITE(D4VGA_CONTROL, 0);
 
         /* HW Engineer's Notes:
          *  During switch from vga->extended, if we set the VGA_TEST_ENABLE and
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
index 2e2ca3c6b47d..df9469a8fdb1 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -90,25 +90,18 @@ void radeon_connector_hotplug(struct drm_connector *connector)
                 /* don't do anything if sink is not display port, i.e.,
                  * passive dp->(dvi|hdmi) adaptor
                  */
-                if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
-                        int saved_dpms = connector->dpms;
-                        /* Only turn off the display if it's physically disconnected */
-                        if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
-                                drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
-                        } else if (radeon_dp_needs_link_train(radeon_connector)) {
-                                /* Don't try to start link training before we
-                                 * have the dpcd */
-                                if (!radeon_dp_getdpcd(radeon_connector))
-                                        return;
-
-                                /* set it to OFF so that drm_helper_connector_dpms()
-                                 * won't return immediately since the current state
-                                 * is ON at this point.
-                                 */
-                                connector->dpms = DRM_MODE_DPMS_OFF;
-                                drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
-                        }
-                        connector->dpms = saved_dpms;
+                if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT &&
+                    radeon_hpd_sense(rdev, radeon_connector->hpd.hpd) &&
+                    radeon_dp_needs_link_train(radeon_connector)) {
+                        /* Don't start link training before we have the DPCD */
+                        if (!radeon_dp_getdpcd(radeon_connector))
+                                return;
+
+                        /* Turn the connector off and back on immediately, which
+                         * will trigger link training
+                         */
+                        drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
+                        drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
                 }
         }
 }