aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorDavid Daney <david.daney@cavium.com>2017-09-08 04:10:32 -0400
committerBjorn Helgaas <bhelgaas@google.com>2017-10-11 14:23:35 -0400
commit822155100e589f2a4891b3b2db2f901824d47e69 (patch)
tree15db0d1b2fefea0126fe9bcb35635abc23c2c46b
parent9e66317d3c92ddaab330c125dfe9d06eee268aff (diff)
PCI: Mark Cavium CN8xxx to avoid bus reset
Root ports of cn8xxx do not function after bus reset when used with some e1000e and LSI HBA devices. Add a quirk to prevent bus reset on these root ports. Signed-off-by: David Daney <david.daney@cavium.com> [jglauber@cavium.com: fixed typo and whitespaces] Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Alex Williamson <alex.williamson@redhat.com>
-rw-r--r--drivers/pci/quirks.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index a4d33619a7bb..8c2fd3dc8df6 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -3365,6 +3365,13 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0032, quirk_no_bus_reset);
3365DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003c, quirk_no_bus_reset); 3365DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003c, quirk_no_bus_reset);
3366DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0033, quirk_no_bus_reset); 3366DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0033, quirk_no_bus_reset);
3367 3367
3368/*
3369 * Root port on some Cavium CN8xxx chips do not successfully complete a bus
3370 * reset when used with certain child devices. After the reset, config
3371 * accesses to the child may fail.
3372 */
3373DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CAVIUM, 0xa100, quirk_no_bus_reset);
3374
3368static void quirk_no_pm_reset(struct pci_dev *dev) 3375static void quirk_no_pm_reset(struct pci_dev *dev)
3369{ 3376{
3370 /* 3377 /*