drm/radeon: fill in rb backend map on evergreen/ni.

This looks to have never gotten filled in, and it seems to
 trigger a bug in mesa.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reported-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2 files changed, 2 insertions, 0 deletions

diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 24fe66c89dfb..5712d63dca20 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -3513,6 +3513,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
                 tmp = r6xx_remap_render_backend(rdev, tmp, rdev->config.evergreen.max_backends,
                                                 EVERGREEN_MAX_BACKENDS, disabled_rb_mask);
         }
+        rdev->config.evergreen.backend_map = tmp;
         WREG32(GB_BACKEND_MAP, tmp);
 
         WREG32(CGTS_SYS_TCC_DISABLE, 0);
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index 9eccd0c81d88..381b0255ff02 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1148,6 +1148,7 @@ static void cayman_gpu_init(struct radeon_device *rdev)
                                                 rdev->config.cayman.max_shader_engines,
                                                 CAYMAN_MAX_BACKENDS, disabled_rb_mask);
         }
+        rdev->config.cayman.backend_map = tmp;
         WREG32(GB_BACKEND_MAP, tmp);
 
         cgts_tcc_disable = 0xffff0000;