diff options
author | Peter Griffin <peter.griffin@linaro.org> | 2014-07-09 11:07:00 -0400 |
---|---|---|
committer | Maxime Coquelin <maxime.coquelin@st.com> | 2014-10-31 04:59:00 -0400 |
commit | 8106d21ca86ba9b92c08e83c5a8b7e6f8d9084d9 (patch) | |
tree | 2d5bbee3a257a2bb6e0fa34348728ae4c9bcf748 | |
parent | b864a0b98e9ef753f0aa0937b29fcc1ad64ced88 (diff) |
ARM: STi: DT: Add sdhci pins for stih416
This adds the required pin config for both SDHCI controllers on
the stih416 SoC.
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
-rw-r--r-- | arch/arm/boot/dts/stih416-pinctrl.dtsi | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stih416-pinctrl.dtsi b/arch/arm/boot/dts/stih416-pinctrl.dtsi index 787c2eeca5d5..c2025bc37dd5 100644 --- a/arch/arm/boot/dts/stih416-pinctrl.dtsi +++ b/arch/arm/boot/dts/stih416-pinctrl.dtsi | |||
@@ -467,6 +467,45 @@ | |||
467 | }; | 467 | }; |
468 | }; | 468 | }; |
469 | }; | 469 | }; |
470 | |||
471 | mmc0 { | ||
472 | pinctrl_mmc0: mmc0 { | ||
473 | st,pins { | ||
474 | mmcclk = <&pio13 4 ALT4 BIDIR_PU NICLK 0 CLK_B>; | ||
475 | data0 = <&pio14 4 ALT4 BIDIR_PU BYPASS 0>; | ||
476 | data1 = <&pio14 5 ALT4 BIDIR_PU BYPASS 0>; | ||
477 | data2 = <&pio14 6 ALT4 BIDIR_PU BYPASS 0>; | ||
478 | data3 = <&pio14 7 ALT4 BIDIR_PU BYPASS 0>; | ||
479 | cmd = <&pio15 1 ALT4 BIDIR_PU BYPASS 0>; | ||
480 | wp = <&pio15 3 ALT4 IN>; | ||
481 | data4 = <&pio16 4 ALT4 BIDIR_PU BYPASS 0>; | ||
482 | data5 = <&pio16 5 ALT4 BIDIR_PU BYPASS 0>; | ||
483 | data6 = <&pio16 6 ALT4 BIDIR_PU BYPASS 0>; | ||
484 | data7 = <&pio16 7 ALT4 BIDIR_PU BYPASS 0>; | ||
485 | pwr = <&pio17 1 ALT4 OUT>; | ||
486 | cd = <&pio17 2 ALT4 IN>; | ||
487 | led = <&pio17 3 ALT4 OUT>; | ||
488 | }; | ||
489 | }; | ||
490 | }; | ||
491 | mmc1 { | ||
492 | pinctrl_mmc1: mmc1 { | ||
493 | st,pins { | ||
494 | mmcclk = <&pio15 0 ALT3 BIDIR_PU NICLK 0 CLK_B>; | ||
495 | data0 = <&pio13 7 ALT3 BIDIR_PU BYPASS 0>; | ||
496 | data1 = <&pio14 1 ALT3 BIDIR_PU BYPASS 0>; | ||
497 | data2 = <&pio14 2 ALT3 BIDIR_PU BYPASS 0>; | ||
498 | data3 = <&pio14 3 ALT3 BIDIR_PU BYPASS 0>; | ||
499 | cmd = <&pio15 4 ALT3 BIDIR_PU BYPASS 0>; | ||
500 | data4 = <&pio15 6 ALT3 BIDIR_PU BYPASS 0>; | ||
501 | data5 = <&pio15 7 ALT3 BIDIR_PU BYPASS 0>; | ||
502 | data6 = <&pio16 0 ALT3 BIDIR_PU BYPASS 0>; | ||
503 | data7 = <&pio16 1 ALT3 BIDIR_PU BYPASS 0>; | ||
504 | pwr = <&pio16 2 ALT3 OUT>; | ||
505 | nreset = <&pio13 6 ALT3 OUT>; | ||
506 | }; | ||
507 | }; | ||
508 | }; | ||
470 | }; | 509 | }; |
471 | 510 | ||
472 | pin-controller-fvdp-fe { | 511 | pin-controller-fvdp-fe { |