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authorAkinobu Mita <akinobu.mita@gmail.com>2016-04-08 14:43:15 -0400
committerMark Brown <broonie@kernel.org>2016-04-11 21:21:14 -0400
commit8070954d7c9fffa527e785292e901867338f79a9 (patch)
tree05ea1d33cf4c129d3c7a1255b999cbcae1362d4c
parentbf16200689118d19de1b8d2a3c314fc21f5dc7bb (diff)
spi: omap2-mcspi: Undo broken fix for dma transfer of vmalloced buffer
This reverts commit 3525e0aac91c4de5d20b1f22a6c6e2b39db3cc96. The DMA transfer for RX buffer was not handled correctly in this change. The actual transfer length for DMA RX can be less than xfer->len in the specific condition and the last words will be filled after the DMA completion, but the commit doesn't consider it and the dmaengine is started with rx_sg mapped by spi core. The solution for this at least requires more lines than this commit has inserted. So revert it for now. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--drivers/spi/spi-omap2-mcspi.c62
1 files changed, 45 insertions, 17 deletions
diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c
index 43a02e377b3b..0caa3c8bef46 100644
--- a/drivers/spi/spi-omap2-mcspi.c
+++ b/drivers/spi/spi-omap2-mcspi.c
@@ -423,12 +423,16 @@ static void omap2_mcspi_tx_dma(struct spi_device *spi,
423 423
424 if (mcspi_dma->dma_tx) { 424 if (mcspi_dma->dma_tx) {
425 struct dma_async_tx_descriptor *tx; 425 struct dma_async_tx_descriptor *tx;
426 struct scatterlist sg;
426 427
427 dmaengine_slave_config(mcspi_dma->dma_tx, &cfg); 428 dmaengine_slave_config(mcspi_dma->dma_tx, &cfg);
428 429
429 tx = dmaengine_prep_slave_sg(mcspi_dma->dma_tx, xfer->tx_sg.sgl, 430 sg_init_table(&sg, 1);
430 xfer->tx_sg.nents, DMA_MEM_TO_DEV, 431 sg_dma_address(&sg) = xfer->tx_dma;
431 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 432 sg_dma_len(&sg) = xfer->len;
433
434 tx = dmaengine_prep_slave_sg(mcspi_dma->dma_tx, &sg, 1,
435 DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
432 if (tx) { 436 if (tx) {
433 tx->callback = omap2_mcspi_tx_callback; 437 tx->callback = omap2_mcspi_tx_callback;
434 tx->callback_param = spi; 438 tx->callback_param = spi;
@@ -474,15 +478,20 @@ omap2_mcspi_rx_dma(struct spi_device *spi, struct spi_transfer *xfer,
474 478
475 if (mcspi_dma->dma_rx) { 479 if (mcspi_dma->dma_rx) {
476 struct dma_async_tx_descriptor *tx; 480 struct dma_async_tx_descriptor *tx;
481 struct scatterlist sg;
477 482
478 dmaengine_slave_config(mcspi_dma->dma_rx, &cfg); 483 dmaengine_slave_config(mcspi_dma->dma_rx, &cfg);
479 484
480 if ((l & OMAP2_MCSPI_CHCONF_TURBO) && mcspi->fifo_depth == 0) 485 if ((l & OMAP2_MCSPI_CHCONF_TURBO) && mcspi->fifo_depth == 0)
481 dma_count -= es; 486 dma_count -= es;
482 487
483 tx = dmaengine_prep_slave_sg(mcspi_dma->dma_rx, xfer->rx_sg.sgl, 488 sg_init_table(&sg, 1);
484 xfer->rx_sg.nents, DMA_DEV_TO_MEM, 489 sg_dma_address(&sg) = xfer->rx_dma;
485 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 490 sg_dma_len(&sg) = dma_count;
491
492 tx = dmaengine_prep_slave_sg(mcspi_dma->dma_rx, &sg, 1,
493 DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT |
494 DMA_CTRL_ACK);
486 if (tx) { 495 if (tx) {
487 tx->callback = omap2_mcspi_rx_callback; 496 tx->callback = omap2_mcspi_rx_callback;
488 tx->callback_param = spi; 497 tx->callback_param = spi;
@@ -496,6 +505,8 @@ omap2_mcspi_rx_dma(struct spi_device *spi, struct spi_transfer *xfer,
496 omap2_mcspi_set_dma_req(spi, 1, 1); 505 omap2_mcspi_set_dma_req(spi, 1, 1);
497 506
498 wait_for_completion(&mcspi_dma->dma_rx_completion); 507 wait_for_completion(&mcspi_dma->dma_rx_completion);
508 dma_unmap_single(mcspi->dev, xfer->rx_dma, count,
509 DMA_FROM_DEVICE);
499 510
500 if (mcspi->fifo_depth > 0) 511 if (mcspi->fifo_depth > 0)
501 return count; 512 return count;
@@ -608,6 +619,8 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
608 619
609 if (tx != NULL) { 620 if (tx != NULL) {
610 wait_for_completion(&mcspi_dma->dma_tx_completion); 621 wait_for_completion(&mcspi_dma->dma_tx_completion);
622 dma_unmap_single(mcspi->dev, xfer->tx_dma, xfer->len,
623 DMA_TO_DEVICE);
611 624
612 if (mcspi->fifo_depth > 0) { 625 if (mcspi->fifo_depth > 0) {
613 irqstat_reg = mcspi->base + OMAP2_MCSPI_IRQSTATUS; 626 irqstat_reg = mcspi->base + OMAP2_MCSPI_IRQSTATUS;
@@ -1074,16 +1087,6 @@ static void omap2_mcspi_cleanup(struct spi_device *spi)
1074 gpio_free(spi->cs_gpio); 1087 gpio_free(spi->cs_gpio);
1075} 1088}
1076 1089
1077static bool omap2_mcspi_can_dma(struct spi_master *master,
1078 struct spi_device *spi,
1079 struct spi_transfer *xfer)
1080{
1081 if (xfer->len < DMA_MIN_BYTES)
1082 return false;
1083
1084 return true;
1085}
1086
1087static int omap2_mcspi_work_one(struct omap2_mcspi *mcspi, 1090static int omap2_mcspi_work_one(struct omap2_mcspi *mcspi,
1088 struct spi_device *spi, struct spi_transfer *t) 1091 struct spi_device *spi, struct spi_transfer *t)
1089{ 1092{
@@ -1265,6 +1268,32 @@ static int omap2_mcspi_transfer_one(struct spi_master *master,
1265 return -EINVAL; 1268 return -EINVAL;
1266 } 1269 }
1267 1270
1271 if (len < DMA_MIN_BYTES)
1272 goto skip_dma_map;
1273
1274 if (mcspi_dma->dma_tx && tx_buf != NULL) {
1275 t->tx_dma = dma_map_single(mcspi->dev, (void *) tx_buf,
1276 len, DMA_TO_DEVICE);
1277 if (dma_mapping_error(mcspi->dev, t->tx_dma)) {
1278 dev_dbg(mcspi->dev, "dma %cX %d bytes error\n",
1279 'T', len);
1280 return -EINVAL;
1281 }
1282 }
1283 if (mcspi_dma->dma_rx && rx_buf != NULL) {
1284 t->rx_dma = dma_map_single(mcspi->dev, rx_buf, t->len,
1285 DMA_FROM_DEVICE);
1286 if (dma_mapping_error(mcspi->dev, t->rx_dma)) {
1287 dev_dbg(mcspi->dev, "dma %cX %d bytes error\n",
1288 'R', len);
1289 if (tx_buf != NULL)
1290 dma_unmap_single(mcspi->dev, t->tx_dma,
1291 len, DMA_TO_DEVICE);
1292 return -EINVAL;
1293 }
1294 }
1295
1296skip_dma_map:
1268 return omap2_mcspi_work_one(mcspi, spi, t); 1297 return omap2_mcspi_work_one(mcspi, spi, t);
1269} 1298}
1270 1299
@@ -1348,7 +1377,6 @@ static int omap2_mcspi_probe(struct platform_device *pdev)
1348 master->transfer_one = omap2_mcspi_transfer_one; 1377 master->transfer_one = omap2_mcspi_transfer_one;
1349 master->set_cs = omap2_mcspi_set_cs; 1378 master->set_cs = omap2_mcspi_set_cs;
1350 master->cleanup = omap2_mcspi_cleanup; 1379 master->cleanup = omap2_mcspi_cleanup;
1351 master->can_dma = omap2_mcspi_can_dma;
1352 master->dev.of_node = node; 1380 master->dev.of_node = node;
1353 master->max_speed_hz = OMAP2_MCSPI_MAX_FREQ; 1381 master->max_speed_hz = OMAP2_MCSPI_MAX_FREQ;
1354 master->min_speed_hz = OMAP2_MCSPI_MAX_FREQ >> 15; 1382 master->min_speed_hz = OMAP2_MCSPI_MAX_FREQ >> 15;