diff options
author | Quytelda Kahja <quytelda@tamalin.org> | 2018-03-27 04:41:15 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-03-29 05:59:29 -0400 |
commit | 8040b57ad89c1fda7f9e96a3b163b7617a2ab265 (patch) | |
tree | 8463beb4d487a827dcf1479d28ce9a5854269b8f | |
parent | ec57f8641fbca07bbb61a75bd4760fd7aef86860 (diff) |
staging: rtl8723bs: Remove unecessary newlines from 'odm.h'.
Remove duplicate newlines and newlines before closing braces.
Signed-off-by: Quytelda Kahja <quytelda@tamalin.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r-- | drivers/staging/rtl8723bs/hal/odm.h | 27 |
1 files changed, 0 insertions, 27 deletions
diff --git a/drivers/staging/rtl8723bs/hal/odm.h b/drivers/staging/rtl8723bs/hal/odm.h index 175c77b11bf9..1037b88e8f08 100644 --- a/drivers/staging/rtl8723bs/hal/odm.h +++ b/drivers/staging/rtl8723bs/hal/odm.h | |||
@@ -17,7 +17,6 @@ | |||
17 | #ifndef __HALDMOUTSRC_H__ | 17 | #ifndef __HALDMOUTSRC_H__ |
18 | #define __HALDMOUTSRC_H__ | 18 | #define __HALDMOUTSRC_H__ |
19 | 19 | ||
20 | |||
21 | #include "odm_EdcaTurboCheck.h" | 20 | #include "odm_EdcaTurboCheck.h" |
22 | #include "odm_DIG.h" | 21 | #include "odm_DIG.h" |
23 | #include "odm_PathDiv.h" | 22 | #include "odm_PathDiv.h" |
@@ -32,7 +31,6 @@ | |||
32 | #define TRAFFIC_HIGH 1 | 31 | #define TRAFFIC_HIGH 1 |
33 | #define NONE 0 | 32 | #define NONE 0 |
34 | 33 | ||
35 | |||
36 | /* 3 Tx Power Tracking */ | 34 | /* 3 Tx Power Tracking */ |
37 | /* 3 ============================================================ */ | 35 | /* 3 ============================================================ */ |
38 | #define DPK_DELTA_MAPPING_NUM 13 | 36 | #define DPK_DELTA_MAPPING_NUM 13 |
@@ -81,7 +79,6 @@ | |||
81 | #define AUX_ANT 2 /* AntB or Ant Aux */ | 79 | #define AUX_ANT 2 /* AntB or Ant Aux */ |
82 | #define MAX_ANT 3 /* 3 for AP using */ | 80 | #define MAX_ANT 3 /* 3 for AP using */ |
83 | 81 | ||
84 | |||
85 | /* Antenna Diversity Type */ | 82 | /* Antenna Diversity Type */ |
86 | #define SW_ANTDIV 0 | 83 | #define SW_ANTDIV 0 |
87 | #define HW_ANTDIV 1 | 84 | #define HW_ANTDIV 1 |
@@ -200,7 +197,6 @@ typedef struct _ODM_RATE_ADAPTIVE { | |||
200 | 197 | ||
201 | } ODM_RATE_ADAPTIVE, *PODM_RATE_ADAPTIVE; | 198 | } ODM_RATE_ADAPTIVE, *PODM_RATE_ADAPTIVE; |
202 | 199 | ||
203 | |||
204 | #define IQK_MAC_REG_NUM 4 | 200 | #define IQK_MAC_REG_NUM 4 |
205 | #define IQK_ADDA_REG_NUM 16 | 201 | #define IQK_ADDA_REG_NUM 16 |
206 | #define IQK_BB_REG_NUM_MAX 10 | 202 | #define IQK_BB_REG_NUM_MAX 10 |
@@ -229,7 +225,6 @@ typedef struct _ODM_RATE_ADAPTIVE { | |||
229 | #define MAX_PATH_NUM_8814A 4 | 225 | #define MAX_PATH_NUM_8814A 4 |
230 | #define MAX_PATH_NUM_8822B 2 | 226 | #define MAX_PATH_NUM_8822B 2 |
231 | 227 | ||
232 | |||
233 | #define IQK_THRESHOLD 8 | 228 | #define IQK_THRESHOLD 8 |
234 | #define DPK_THRESHOLD 4 | 229 | #define DPK_THRESHOLD 4 |
235 | 230 | ||
@@ -266,7 +261,6 @@ struct odm_phy_info { | |||
266 | u8 bt_coex_pwr_adjust; | 261 | u8 bt_coex_pwr_adjust; |
267 | }; | 262 | }; |
268 | 263 | ||
269 | |||
270 | struct odm_packet_info { | 264 | struct odm_packet_info { |
271 | u8 data_rate; | 265 | u8 data_rate; |
272 | u8 station_id; | 266 | u8 station_id; |
@@ -275,7 +269,6 @@ struct odm_packet_info { | |||
275 | bool is_beacon; | 269 | bool is_beacon; |
276 | }; | 270 | }; |
277 | 271 | ||
278 | |||
279 | typedef struct _ODM_Phy_Dbg_Info_ { | 272 | typedef struct _ODM_Phy_Dbg_Info_ { |
280 | /* ODM Write, debug info */ | 273 | /* ODM Write, debug info */ |
281 | s8 RxSNRdB[4]; | 274 | s8 RxSNRdB[4]; |
@@ -288,12 +281,10 @@ typedef struct _ODM_Phy_Dbg_Info_ { | |||
288 | 281 | ||
289 | } ODM_PHY_DBG_INFO_T; | 282 | } ODM_PHY_DBG_INFO_T; |
290 | 283 | ||
291 | |||
292 | typedef struct _ODM_Mac_Status_Info_ { | 284 | typedef struct _ODM_Mac_Status_Info_ { |
293 | u8 test; | 285 | u8 test; |
294 | } ODM_MAC_INFO; | 286 | } ODM_MAC_INFO; |
295 | 287 | ||
296 | |||
297 | typedef enum tag_Dynamic_ODM_Support_Ability_Type { | 288 | typedef enum tag_Dynamic_ODM_Support_Ability_Type { |
298 | /* BB Team */ | 289 | /* BB Team */ |
299 | ODM_DIG = 0x00000001, | 290 | ODM_DIG = 0x00000001, |
@@ -372,7 +363,6 @@ typedef enum _ODM_Common_Info_Definition { | |||
372 | ODM_CMNINFO_SMART_CONCURRENT, | 363 | ODM_CMNINFO_SMART_CONCURRENT, |
373 | /* HOOK BEFORE REG INIT----------- */ | 364 | /* HOOK BEFORE REG INIT----------- */ |
374 | 365 | ||
375 | |||
376 | /* Dynamic value: */ | 366 | /* Dynamic value: */ |
377 | /* POINTER REFERENCE----------- */ | 367 | /* POINTER REFERENCE----------- */ |
378 | ODM_CMNINFO_MAC_PHY_MODE, /* ODM_MAC_PHY_MODE_E */ | 368 | ODM_CMNINFO_MAC_PHY_MODE, /* ODM_MAC_PHY_MODE_E */ |
@@ -430,8 +420,6 @@ typedef enum _ODM_Common_Info_Definition { | |||
430 | ODM_CMNINFO_MAC_STATUS, | 420 | ODM_CMNINFO_MAC_STATUS, |
431 | 421 | ||
432 | ODM_CMNINFO_MAX, | 422 | ODM_CMNINFO_MAX, |
433 | |||
434 | |||
435 | } ODM_CMNINFO_E; | 423 | } ODM_CMNINFO_E; |
436 | 424 | ||
437 | /* 2011/10/20 MH Define ODM support ability. ODM_CMNINFO_ABILITY */ | 425 | /* 2011/10/20 MH Define ODM support ability. ODM_CMNINFO_ABILITY */ |
@@ -512,7 +500,6 @@ typedef enum tag_ODM_RF_Path_Bit_Definition { | |||
512 | ODM_RF_RX_D = BIT7, | 500 | ODM_RF_RX_D = BIT7, |
513 | } ODM_RF_PATH_E; | 501 | } ODM_RF_PATH_E; |
514 | 502 | ||
515 | |||
516 | typedef enum tag_ODM_RF_Type_Definition { | 503 | typedef enum tag_ODM_RF_Type_Definition { |
517 | ODM_1T1R = 0, | 504 | ODM_1T1R = 0, |
518 | ODM_1T2R = 1, | 505 | ODM_1T2R = 1, |
@@ -524,7 +511,6 @@ typedef enum tag_ODM_RF_Type_Definition { | |||
524 | ODM_4T4R = 7, | 511 | ODM_4T4R = 7, |
525 | } ODM_RF_TYPE_E; | 512 | } ODM_RF_TYPE_E; |
526 | 513 | ||
527 | |||
528 | /* */ | 514 | /* */ |
529 | /* ODM Dynamic common info value definition */ | 515 | /* ODM Dynamic common info value definition */ |
530 | /* */ | 516 | /* */ |
@@ -541,7 +527,6 @@ typedef enum tag_ODM_MAC_PHY_Mode_Definition { | |||
541 | ODM_DMDP = 2, | 527 | ODM_DMDP = 2, |
542 | } ODM_MAC_PHY_MODE_E; | 528 | } ODM_MAC_PHY_MODE_E; |
543 | 529 | ||
544 | |||
545 | typedef enum tag_BT_Coexist_Definition { | 530 | typedef enum tag_BT_Coexist_Definition { |
546 | ODM_BT_BUSY = 1, | 531 | ODM_BT_BUSY = 1, |
547 | ODM_BT_ON = 2, | 532 | ODM_BT_ON = 2, |
@@ -610,7 +595,6 @@ typedef enum tag_Bandwidth_Definition { | |||
610 | ODM_BW10M = 4, | 595 | ODM_BW10M = 4, |
611 | } ODM_BW_E; | 596 | } ODM_BW_E; |
612 | 597 | ||
613 | |||
614 | /* ODM_CMNINFO_BOARD_TYPE */ | 598 | /* ODM_CMNINFO_BOARD_TYPE */ |
615 | /* For non-AC-series IC , ODM_BOARD_5G_EXT_PA and ODM_BOARD_5G_EXT_LNA are ignored */ | 599 | /* For non-AC-series IC , ODM_BOARD_5G_EXT_PA and ODM_BOARD_5G_EXT_LNA are ignored */ |
616 | /* For AC-series IC, external PA & LNA can be indivisuallly added on 2.4G and/or 5G */ | 600 | /* For AC-series IC, external PA & LNA can be indivisuallly added on 2.4G and/or 5G */ |
@@ -664,7 +648,6 @@ typedef enum tag_CCA_Path { | |||
664 | ODM_CCA_1R_B = 2, | 648 | ODM_CCA_1R_B = 2, |
665 | } ODM_CCA_PATH_E; | 649 | } ODM_CCA_PATH_E; |
666 | 650 | ||
667 | |||
668 | typedef struct _ODM_RA_Info_ { | 651 | typedef struct _ODM_RA_Info_ { |
669 | u8 RateID; | 652 | u8 RateID; |
670 | u32 RateMask; | 653 | u32 RateMask; |
@@ -703,7 +686,6 @@ typedef struct _IQK_MATRIX_REGS_SETTING { | |||
703 | bool bBWIqkResultSaved[3]; | 686 | bool bBWIqkResultSaved[3]; |
704 | } IQK_MATRIX_REGS_SETTING, *PIQK_MATRIX_REGS_SETTING; | 687 | } IQK_MATRIX_REGS_SETTING, *PIQK_MATRIX_REGS_SETTING; |
705 | 688 | ||
706 | |||
707 | /* Remove PATHDIV_PARA struct to odm_PathDiv.h */ | 689 | /* Remove PATHDIV_PARA struct to odm_PathDiv.h */ |
708 | 690 | ||
709 | typedef struct ODM_RF_Calibration_Structure { | 691 | typedef struct ODM_RF_Calibration_Structure { |
@@ -739,7 +721,6 @@ typedef struct ODM_RF_Calibration_Structure { | |||
739 | u8 bRfPiEnable; | 721 | u8 bRfPiEnable; |
740 | u32 TXPowerTrackingCallbackCnt; /* cosa add for debug */ | 722 | u32 TXPowerTrackingCallbackCnt; /* cosa add for debug */ |
741 | 723 | ||
742 | |||
743 | /* Tx power Tracking ------------------------- */ | 724 | /* Tx power Tracking ------------------------- */ |
744 | u8 bCCKinCH14; | 725 | u8 bCCKinCH14; |
745 | u8 CCK_index; | 726 | u8 CCK_index; |
@@ -794,7 +775,6 @@ typedef struct ODM_RF_Calibration_Structure { | |||
794 | u32 TxIQC_8723B[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */ | 775 | u32 TxIQC_8723B[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */ |
795 | u32 RxIQC_8723B[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */ | 776 | u32 RxIQC_8723B[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */ |
796 | 777 | ||
797 | |||
798 | /* for APK */ | 778 | /* for APK */ |
799 | u32 APKoutput[2][2]; /* path A/B; output1_1a/output1_2a */ | 779 | u32 APKoutput[2][2]; /* path A/B; output1_1a/output1_2a */ |
800 | u8 bAPKdone; | 780 | u8 bAPKdone; |
@@ -842,7 +822,6 @@ typedef struct _FAST_ANTENNA_TRAINNING_ { | |||
842 | u32 OFDM_counter_main; | 822 | u32 OFDM_counter_main; |
843 | u32 OFDM_counter_aux; | 823 | u32 OFDM_counter_aux; |
844 | 824 | ||
845 | |||
846 | u32 CCK_CtrlFrame_Cnt_main; | 825 | u32 CCK_CtrlFrame_Cnt_main; |
847 | u32 CCK_CtrlFrame_Cnt_aux; | 826 | u32 CCK_CtrlFrame_Cnt_aux; |
848 | u32 OFDM_CtrlFrame_Cnt_main; | 827 | u32 OFDM_CtrlFrame_Cnt_main; |
@@ -878,13 +857,11 @@ typedef struct _ODM_PATH_DIVERSITY_ { | |||
878 | u32 PathB_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; | 857 | u32 PathB_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; |
879 | } PATHDIV_T, *pPATHDIV_T; | 858 | } PATHDIV_T, *pPATHDIV_T; |
880 | 859 | ||
881 | |||
882 | typedef enum _BASEBAND_CONFIG_PHY_REG_PG_VALUE_TYPE{ | 860 | typedef enum _BASEBAND_CONFIG_PHY_REG_PG_VALUE_TYPE{ |
883 | PHY_REG_PG_RELATIVE_VALUE = 0, | 861 | PHY_REG_PG_RELATIVE_VALUE = 0, |
884 | PHY_REG_PG_EXACT_VALUE = 1 | 862 | PHY_REG_PG_EXACT_VALUE = 1 |
885 | } PHY_REG_PG_TYPE; | 863 | } PHY_REG_PG_TYPE; |
886 | 864 | ||
887 | |||
888 | /* */ | 865 | /* */ |
889 | /* Antenna detection information from single tone mechanism, added by Roger, 2012.11.27. */ | 866 | /* Antenna detection information from single tone mechanism, added by Roger, 2012.11.27. */ |
890 | /* */ | 867 | /* */ |
@@ -936,7 +913,6 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure { | |||
936 | /* bool bSlaveOfDMSP; */ | 913 | /* bool bSlaveOfDMSP; */ |
937 | /* REMOVED COMMON INFO---------- */ | 914 | /* REMOVED COMMON INFO---------- */ |
938 | 915 | ||
939 | |||
940 | /* 1 COMMON INFORMATION */ | 916 | /* 1 COMMON INFORMATION */ |
941 | 917 | ||
942 | /* */ | 918 | /* */ |
@@ -1108,7 +1084,6 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure { | |||
1108 | u8 Adaptivity_IGI_upper; | 1084 | u8 Adaptivity_IGI_upper; |
1109 | u8 NHM_cnt_0; | 1085 | u8 NHM_cnt_0; |
1110 | 1086 | ||
1111 | |||
1112 | ODM_NOISE_MONITOR noise_level;/* ODM_MAX_CHANNEL_NUM]; */ | 1087 | ODM_NOISE_MONITOR noise_level;/* ODM_MAX_CHANNEL_NUM]; */ |
1113 | /* */ | 1088 | /* */ |
1114 | /* 2 Define STA info. */ | 1089 | /* 2 Define STA info. */ |
@@ -1370,7 +1345,6 @@ typedef enum tag_SW_Antenna_Switch_Definition { | |||
1370 | Antenna_MAX = 3, | 1345 | Antenna_MAX = 3, |
1371 | } DM_SWAS_E; | 1346 | } DM_SWAS_E; |
1372 | 1347 | ||
1373 | |||
1374 | /* Maximal number of antenna detection mechanism needs to perform, added by Roger, 2011.12.28. */ | 1348 | /* Maximal number of antenna detection mechanism needs to perform, added by Roger, 2011.12.28. */ |
1375 | #define MAX_ANTENNA_DETECTION_CNT 10 | 1349 | #define MAX_ANTENNA_DETECTION_CNT 10 |
1376 | 1350 | ||
@@ -1403,7 +1377,6 @@ extern u32 TxScalingTable_Jaguar[TXSCALE_TABLE_SIZE]; | |||
1403 | 1377 | ||
1404 | void ODM_SetAntenna(PDM_ODM_T pDM_Odm, u8 Antenna); | 1378 | void ODM_SetAntenna(PDM_ODM_T pDM_Odm, u8 Antenna); |
1405 | 1379 | ||
1406 | |||
1407 | /* Remove BB power saving by Yuchen */ | 1380 | /* Remove BB power saving by Yuchen */ |
1408 | 1381 | ||
1409 | #define dm_CheckTXPowerTracking ODM_TXPowerTrackingCheck | 1382 | #define dm_CheckTXPowerTracking ODM_TXPowerTrackingCheck |