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authorOlof Johansson <olof@lixom.net>2016-07-06 00:47:46 -0400
committerOlof Johansson <olof@lixom.net>2016-07-06 00:47:46 -0400
commit7f95b51d54e4fc65764396d095bac664e3468cb9 (patch)
treecb23c3c05d49b62d72e35b5275cd174261dfb474
parent1fa04d923c8e1648304b3d2490466c7d9e9746eb (diff)
parentbbaf867e2d3796bca465d07ffcd800a3bd570861 (diff)
Merge tag 'hi6220-dt-for-4.8' of git://github.com/hisilicon/linux-hisi into next/dt64
ARM64: DT: Hisilicon Hi6220 hikey board updates for 4.8 - name the GPIO lines * tag 'hi6220-dt-for-4.8' of git://github.com/hisilicon/linux-hisi: arm64: dts: hikey: name the GPIO lines Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r--arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts143
1 files changed, 143 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index e92a30c87a82..593c7e43de79 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -66,6 +66,149 @@
66 status = "ok"; 66 status = "ok";
67 }; 67 };
68 68
69 /*
70 * Legend: proper name = the GPIO line is used as GPIO
71 * NC = not connected (not routed from the SoC)
72 * "[PER]" = pin is muxed for peripheral (not GPIO)
73 * "" = no idea, schematic doesn't say, could be
74 * unrouted (not connected to any external pin)
75 * LSEC = Low Speed External Connector
76 * HSEC = High Speed External Connector
77 *
78 * Pin assignments taken from LeMaker and CircuitCo Schematics
79 * Rev A1.
80 *
81 * For the lines routed to the external connectors the
82 * lines are named after the 96Boards CE Specification 1.0,
83 * Appendix "Expansion Connector Signal Description".
84 *
85 * When the 96Board naming of a line and the schematic name of
86 * the same line are in conflict, the 96Board specification
87 * takes precedence, which means that the external UART on the
88 * LSEC is named UART0 while the schematic and SoC names this
89 * UART2. This is only for the informational lines i.e. "[FOO]",
90 * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only
91 * ones actually used for GPIO.
92 */
93 gpio0: gpio@f8011000 {
94 gpio-line-names = "PWR_HOLD", "DSI_SEL",
95 "USB_HUB_RESET_N", "USB_SEL", "HDMI_PD", "WL_REG_ON",
96 "PWRON_DET", "5V_HUB_EN";
97 };
98
99 gpio1: gpio@f8012000 {
100 gpio-line-names = "SD_DET", "HDMI_INT", "PMU_IRQ_N",
101 "WL_HOST_WAKE", "NC", "NC", "NC", "BT_REG_ON";
102 };
103
104 gpio2: gpio@f8013000 {
105 gpio-line-names =
106 "GPIO-A", /* LSEC Pin 23: GPIO2_0 */
107 "GPIO-B", /* LSEC Pin 24: GPIO2_1 */
108 "GPIO-C", /* LSEC Pin 25: GPIO2_2 */
109 "GPIO-D", /* LSEC Pin 26: GPIO2_3 */
110 "GPIO-E", /* LSEC Pin 27: GPIO2_4 */
111 "USB_ID_DET", "USB_VBUS_DET",
112 "GPIO-H"; /* LSEC Pin 30: GPIO2_7 */
113 };
114
115 gpio3: gpio@f8014000 {
116 gpio-line-names = "GPIO3_0", "NC", "NC", "", "NC", "",
117 "WLAN_ACTIVE", "NC", "NC";
118 };
119
120 gpio4: gpio@f7020000 {
121 gpio-line-names = "USER_LED1", "USER_LED2", "USER_LED3",
122 "USER_LED4", "SD_SEL", "NC", "NC", "BT_ACTIVE";
123 };
124
125 gpio5: gpio@f7021000 {
126 gpio-line-names = "NC", "NC",
127 "[UART1_RxD]", /* LSEC Pin 11: UART3_RX */
128 "[UART1_TxD]", /* LSEC Pin 13: UART3_TX */
129 "[AUX_SSI1]", "NC",
130 "[PCM_CLK]", /* LSEC Pin 18: MODEM_PCM_XCLK */
131 "[PCM_FS]"; /* LSEC Pin 16: MODEM_PCM_XFS */
132 };
133
134 gpio6: gpio@f7022000 {
135 gpio-line-names =
136 "[SPI0_DIN]", /* Pin 10: SPI0_DI */
137 "[SPI0_DOUT]", /* Pin 14: SPI0_DO */
138 "[SPI0_CS]", /* Pin 12: SPI0_CS_N */
139 "[SPI0_SCLK]", /* Pin 8: SPI0_SCLK */
140 "NC", "NC", "NC",
141 "GPIO-G"; /* Pin 29: GPIO6_7_DSI_TE0 */
142 };
143
144 gpio7: gpio@f7023000 {
145 gpio-line-names = "NC", "NC", "NC", "NC",
146 "[PCM_DI]", /* Pin 22: MODEM_PCM_DI */
147 "[PCM_DO]", /* Pin 20: MODEM_PCM_DO */
148 "NC", "NC";
149 };
150
151 gpio8: gpio@f7024000 {
152 gpio-line-names = "NC", "[CEC_CLK_19_2MHZ]", "NC",
153 "", "", "", "", "", "";
154 };
155
156 gpio9: gpio@f7025000 {
157 gpio-line-names = "",
158 "GPIO-J", /* LSEC Pin 32: ISP_PWDN0_GPIO9_1 */
159 "GPIO-L", /* LSEC Pin 34: ISP_PWDN1_GPIO9_2 */
160 "NC", "NC", "NC", "NC", "[ISP_CCLK0]";
161 };
162
163 gpio10: gpio@f7026000 {
164 gpio-line-names = "BOOT_SEL",
165 "[ISP_CCLK1]",
166 "GPIO-I", /* LSEC Pin 31: ISP_RSTB0_GPIO10_2 */
167 "GPIO-K", /* LSEC Pin 33: ISP_RSTB1_GPIO10_3 */
168 "NC", "NC",
169 "[I2C2_SDA]", /* HSEC Pin 34: ISP0_SDA */
170 "[I2C2_SCL]"; /* HSEC Pin 32: ISP0_SCL */
171 };
172
173 gpio11: gpio@f7027000 {
174 gpio-line-names =
175 "[I2C3_SDA]", /* HSEC Pin 38: ISP1_SDA */
176 "[I2C3_SCL]", /* HSEC Pin 36: ISP1_SCL */
177 "", "NC", "NC", "NC", "", "";
178 };
179
180 gpio12: gpio@f7028000 {
181 gpio-line-names = "[BT_PCM_XFS]", "[BT_PCM_DI]",
182 "[BT_PCM_DO]",
183 "NC", "NC", "NC", "NC",
184 "GPIO-F"; /* LSEC Pin 28: BL_PWM_GPIO12_7 */
185 };
186
187 gpio13: gpio@f7029000 {
188 gpio-line-names = "[UART0_RX]", "[UART0_TX]",
189 "[BT_UART1_CTS]", "[BT_UART1_RTS]",
190 "[BT_UART1_RX]", "[BT_UART1_TX]",
191 "[UART0_CTS]", /* LSEC Pin 3: UART2_CTS_N */
192 "[UART0_RTS]"; /* LSEC Pin 9: UART2_RTS_N */
193 };
194
195 gpio14: gpio@f702a000 {
196 gpio-line-names =
197 "[UART0_RxD]", /* LSEC Pin 7: UART2_RX */
198 "[UART0_TxD]", /* LSEC Pin 5: UART2_TX */
199 "[I2C0_SCL]", /* LSEC Pin 15: I2C0_SCL */
200 "[I2C0_SDA]", /* LSEC Pin 17: I2C0_SDA */
201 "[I2C1_SCL]", /* LSEC Pin 19: I2C1_SCL */
202 "[I2C1_SDA]", /* LSEC Pin 21: I2C1_SDA */
203 "[I2C2_SCL]", "[I2C2_SDA]";
204 };
205
206 gpio15: gpio@f702b000 {
207 gpio-line-names = "", "", "", "", "", "", "NC", "";
208 };
209
210 /* GPIO blocks 16 thru 19 do not appear to be routed to pins */
211
69 dwmmc_2: dwmmc2@f723f000 { 212 dwmmc_2: dwmmc2@f723f000 {
70 ti,non-removable; 213 ti,non-removable;
71 non-removable; 214 non-removable;