diff options
author | Axel Lin <axel.lin@ingics.com> | 2015-08-11 23:09:39 -0400 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2015-08-14 12:30:52 -0400 |
commit | 7f325bfc933d140337e55507821d6bb021321059 (patch) | |
tree | 6bf7286c6e906e878dabe3509717b67ba8a86b0b | |
parent | bc0195aad0daa2ad5b0d76cce22b167bc3435590 (diff) |
ASoC: cs42l56: Use case range at appropriate place
The readable registers are in continuous range: 0x01 ~ 0x2e.
Use case range syntax makes the code shorter with better readability when
we have a large number of continuous switch cases.
No functional change with this patch.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Brian Austin <brian.austin@cirrus.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r-- | sound/soc/codecs/cs42l56.c | 47 |
1 files changed, 1 insertions, 46 deletions
diff --git a/sound/soc/codecs/cs42l56.c b/sound/soc/codecs/cs42l56.c index 1e11ba45a79f..98a68c66cf71 100644 --- a/sound/soc/codecs/cs42l56.c +++ b/sound/soc/codecs/cs42l56.c | |||
@@ -115,52 +115,7 @@ static const struct reg_default cs42l56_reg_defaults[] = { | |||
115 | static bool cs42l56_readable_register(struct device *dev, unsigned int reg) | 115 | static bool cs42l56_readable_register(struct device *dev, unsigned int reg) |
116 | { | 116 | { |
117 | switch (reg) { | 117 | switch (reg) { |
118 | case CS42L56_CHIP_ID_1: | 118 | case CS42L56_CHIP_ID_1 ... CS42L56_LIM_ATTACK_RATE: |
119 | case CS42L56_CHIP_ID_2: | ||
120 | case CS42L56_PWRCTL_1: | ||
121 | case CS42L56_PWRCTL_2: | ||
122 | case CS42L56_CLKCTL_1: | ||
123 | case CS42L56_CLKCTL_2: | ||
124 | case CS42L56_SERIAL_FMT: | ||
125 | case CS42L56_CLASSH_CTL: | ||
126 | case CS42L56_MISC_CTL: | ||
127 | case CS42L56_INT_STATUS: | ||
128 | case CS42L56_PLAYBACK_CTL: | ||
129 | case CS42L56_DSP_MUTE_CTL: | ||
130 | case CS42L56_ADCA_MIX_VOLUME: | ||
131 | case CS42L56_ADCB_MIX_VOLUME: | ||
132 | case CS42L56_PCMA_MIX_VOLUME: | ||
133 | case CS42L56_PCMB_MIX_VOLUME: | ||
134 | case CS42L56_ANAINPUT_ADV_VOLUME: | ||
135 | case CS42L56_DIGINPUT_ADV_VOLUME: | ||
136 | case CS42L56_MASTER_A_VOLUME: | ||
137 | case CS42L56_MASTER_B_VOLUME: | ||
138 | case CS42L56_BEEP_FREQ_ONTIME: | ||
139 | case CS42L56_BEEP_FREQ_OFFTIME: | ||
140 | case CS42L56_BEEP_TONE_CFG: | ||
141 | case CS42L56_TONE_CTL: | ||
142 | case CS42L56_CHAN_MIX_SWAP: | ||
143 | case CS42L56_AIN_REFCFG_ADC_MUX: | ||
144 | case CS42L56_HPF_CTL: | ||
145 | case CS42L56_MISC_ADC_CTL: | ||
146 | case CS42L56_GAIN_BIAS_CTL: | ||
147 | case CS42L56_PGAA_MUX_VOLUME: | ||
148 | case CS42L56_PGAB_MUX_VOLUME: | ||
149 | case CS42L56_ADCA_ATTENUATOR: | ||
150 | case CS42L56_ADCB_ATTENUATOR: | ||
151 | case CS42L56_ALC_EN_ATTACK_RATE: | ||
152 | case CS42L56_ALC_RELEASE_RATE: | ||
153 | case CS42L56_ALC_THRESHOLD: | ||
154 | case CS42L56_NOISE_GATE_CTL: | ||
155 | case CS42L56_ALC_LIM_SFT_ZC: | ||
156 | case CS42L56_AMUTE_HPLO_MUX: | ||
157 | case CS42L56_HPA_VOLUME: | ||
158 | case CS42L56_HPB_VOLUME: | ||
159 | case CS42L56_LOA_VOLUME: | ||
160 | case CS42L56_LOB_VOLUME: | ||
161 | case CS42L56_LIM_THRESHOLD_CTL: | ||
162 | case CS42L56_LIM_CTL_RELEASE_RATE: | ||
163 | case CS42L56_LIM_ATTACK_RATE: | ||
164 | return true; | 119 | return true; |
165 | default: | 120 | default: |
166 | return false; | 121 | return false; |