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authorDavid HERNANDEZ SANCHEZ <david.hernandezsanchez@st.com>2018-10-05 06:08:45 -0400
committerEduardo Valentin <edubezval@gmail.com>2018-10-25 13:44:51 -0400
commit7f1a22ce597c2d6410843628c7d240e7441a81a3 (patch)
tree0e8f0e82d9d0f73519bd606b9f223d98f516b03b
parent92ca366e9b835ada0bfe3c663da91ae44d7e8184 (diff)
dt-bindings: stm32-thermal: add binding documentation
Add thermal binding documentation for STM32 DTS sensor Signed-off-by: David Hernandez Sanchez <david.hernandezsanchez@st.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
-rw-r--r--Documentation/devicetree/bindings/thermal/stm32-thermal.txt61
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1Binding for Thermal Sensor for STMicroelectronics STM32 series of SoCs.
2
3On STM32 SoCs, the Digital Temperature Sensor (DTS) is in charge of managing an
4analog block which delivers a frequency depending on the internal SoC's
5temperature. By using a reference frequency, DTS is able to provide a sample
6number which can be translated into a temperature by the user.
7
8DTS provides interrupt notification mechanism by threshold. This mechanism
9offers two temperature trip points: passive and critical. The first is intended
10for passive cooling notification while the second is used for over-temperature
11reset.
12
13Required parameters:
14-------------------
15
16compatible: Should be "st,stm32-thermal"
17reg: This should be the physical base address and length of the
18 sensor's registers.
19clocks: Phandle of the clock used by the thermal sensor.
20 See: Documentation/devicetree/bindings/clock/clock-bindings.txt
21clock-names: Should be "pclk" for register access clock and reference clock.
22 See: Documentation/devicetree/bindings/resource-names.txt
23#thermal-sensor-cells: Should be 0. See ./thermal.txt for a description.
24interrupts: Standard way to define interrupt number.
25
26Example:
27
28 thermal-zones {
29 cpu_thermal: cpu-thermal {
30 polling-delay-passive = <0>;
31 polling-delay = <0>;
32
33 thermal-sensors = <&thermal>;
34
35 trips {
36 cpu_alert1: cpu-alert1 {
37 temperature = <85000>;
38 hysteresis = <0>;
39 type = "passive";
40 };
41
42 cpu-crit: cpu-crit {
43 temperature = <120000>;
44 hysteresis = <0>;
45 type = "critical";
46 };
47 };
48
49 cooling-maps {
50 };
51 };
52 };
53
54 thermal: thermal@50028000 {
55 compatible = "st,stm32-thermal";
56 reg = <0x50028000 0x100>;
57 clocks = <&rcc TMPSENS>;
58 clock-names = "pclk";
59 #thermal-sensor-cells = <0>;
60 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
61 };