diff options
author | Krzysztof Kozlowski <krzk@kernel.org> | 2017-03-11 12:25:25 -0500 |
---|---|---|
committer | Krzysztof Kozlowski <krzk@kernel.org> | 2017-03-21 13:55:51 -0400 |
commit | 7e93df3526b5dfc0ea76cb01041d7057f9fae478 (patch) | |
tree | 1a69c4221209e37e392e13d81399fae1d9fcaece | |
parent | de44097b256146fb633f843b250f2515b838e031 (diff) |
ARM: dts: exynos: Fix infinite interrupt in soft mode on Exynos4210 and Exynos5440
In soft (no-reboot) mode, the driver self-pings watchdog upon expiration
of an interrupt. The interrupt has to be cleared, because otherwise
system enters infinite interrupt handling loop.
Use a samsung,s3c6410-wdt compatible to select appropriate quirk for
clearing the watchdog interrupt.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
-rw-r--r-- | arch/arm/boot/dts/exynos4210.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos5440.dtsi | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index 9d51d4d62d94..e6e62103a71f 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi | |||
@@ -120,7 +120,7 @@ | |||
120 | }; | 120 | }; |
121 | 121 | ||
122 | watchdog: watchdog@10060000 { | 122 | watchdog: watchdog@10060000 { |
123 | compatible = "samsung,s3c2410-wdt"; | 123 | compatible = "samsung,s3c6410-wdt"; |
124 | reg = <0x10060000 0x100>; | 124 | reg = <0x10060000 0x100>; |
125 | interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; | 125 | interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; |
126 | clocks = <&clock CLK_WDT>; | 126 | clocks = <&clock CLK_WDT>; |
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi index f3ac53af9cdb..a4ea018464fc 100644 --- a/arch/arm/boot/dts/exynos5440.dtsi +++ b/arch/arm/boot/dts/exynos5440.dtsi | |||
@@ -189,7 +189,7 @@ | |||
189 | }; | 189 | }; |
190 | 190 | ||
191 | watchdog@110000 { | 191 | watchdog@110000 { |
192 | compatible = "samsung,s3c2410-wdt"; | 192 | compatible = "samsung,s3c6410-wdt"; |
193 | reg = <0x110000 0x1000>; | 193 | reg = <0x110000 0x1000>; |
194 | interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; | 194 | interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; |
195 | clocks = <&clock CLK_B_125>; | 195 | clocks = <&clock CLK_B_125>; |