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authorSudarsana Reddy Kalluru <sudarsana.kalluru@cavium.com>2018-09-20 00:59:12 -0400
committerDavid S. Miller <davem@davemloft.net>2018-09-20 02:12:24 -0400
commit7e3e375ceede8fba5218362d14db7de25fa83f12 (patch)
tree41bd06220898e05c0bf54e4fb601e03c6d808229
parent0216da9413afa546627a1b0d319dfd17fef34050 (diff)
qed: Add missing device config for RoCE EDPM in UFP mode.
This patch adds support to configure the DORQ to use vlan-id/priority for roce EDPM. Fixes: cac6f691 ("qed: Add support for Unified Fabric Port") Signed-off-by: Sudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com> Signed-off-by: Tomer Tayar <Tomer.Tayar@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/ethernet/qlogic/qed/qed_dcbx.c40
-rw-r--r--drivers/net/ethernet/qlogic/qed/qed_mcp.c24
-rw-r--r--drivers/net/ethernet/qlogic/qed/qed_reg_addr.h6
3 files changed, 48 insertions, 22 deletions
diff --git a/drivers/net/ethernet/qlogic/qed/qed_dcbx.c b/drivers/net/ethernet/qlogic/qed/qed_dcbx.c
index d53f33c6b1fc..f5459de6d60a 100644
--- a/drivers/net/ethernet/qlogic/qed/qed_dcbx.c
+++ b/drivers/net/ethernet/qlogic/qed/qed_dcbx.c
@@ -190,11 +190,8 @@ qed_dcbx_dp_protocol(struct qed_hwfn *p_hwfn, struct qed_dcbx_results *p_data)
190 190
191static void 191static void
192qed_dcbx_set_params(struct qed_dcbx_results *p_data, 192qed_dcbx_set_params(struct qed_dcbx_results *p_data,
193 struct qed_hwfn *p_hwfn, 193 struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
194 struct qed_hw_info *p_info, 194 bool enable, u8 prio, u8 tc,
195 bool enable,
196 u8 prio,
197 u8 tc,
198 enum dcbx_protocol_type type, 195 enum dcbx_protocol_type type,
199 enum qed_pci_personality personality) 196 enum qed_pci_personality personality)
200{ 197{
@@ -213,18 +210,24 @@ qed_dcbx_set_params(struct qed_dcbx_results *p_data,
213 p_data->arr[type].dont_add_vlan0 = true; 210 p_data->arr[type].dont_add_vlan0 = true;
214 211
215 /* QM reconf data */ 212 /* QM reconf data */
216 if (p_info->personality == personality) 213 if (p_hwfn->hw_info.personality == personality)
217 qed_hw_info_set_offload_tc(p_info, tc); 214 qed_hw_info_set_offload_tc(&p_hwfn->hw_info, tc);
215
216 /* Configure dcbx vlan priority in doorbell block for roce EDPM */
217 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) &&
218 type == DCBX_PROTOCOL_ROCE) {
219 qed_wr(p_hwfn, p_ptt, DORQ_REG_TAG1_OVRD_MODE, 1);
220 qed_wr(p_hwfn, p_ptt, DORQ_REG_PF_PCP_BB_K2, prio << 1);
221 }
218} 222}
219 223
220/* Update app protocol data and hw_info fields with the TLV info */ 224/* Update app protocol data and hw_info fields with the TLV info */
221static void 225static void
222qed_dcbx_update_app_info(struct qed_dcbx_results *p_data, 226qed_dcbx_update_app_info(struct qed_dcbx_results *p_data,
223 struct qed_hwfn *p_hwfn, 227 struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
224 bool enable, 228 bool enable, u8 prio, u8 tc,
225 u8 prio, u8 tc, enum dcbx_protocol_type type) 229 enum dcbx_protocol_type type)
226{ 230{
227 struct qed_hw_info *p_info = &p_hwfn->hw_info;
228 enum qed_pci_personality personality; 231 enum qed_pci_personality personality;
229 enum dcbx_protocol_type id; 232 enum dcbx_protocol_type id;
230 int i; 233 int i;
@@ -237,7 +240,7 @@ qed_dcbx_update_app_info(struct qed_dcbx_results *p_data,
237 240
238 personality = qed_dcbx_app_update[i].personality; 241 personality = qed_dcbx_app_update[i].personality;
239 242
240 qed_dcbx_set_params(p_data, p_hwfn, p_info, enable, 243 qed_dcbx_set_params(p_data, p_hwfn, p_ptt, enable,
241 prio, tc, type, personality); 244 prio, tc, type, personality);
242 } 245 }
243} 246}
@@ -271,7 +274,7 @@ qed_dcbx_get_app_protocol_type(struct qed_hwfn *p_hwfn,
271 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 274 * reconfiguring QM. Get protocol specific data for PF update ramrod command.
272 */ 275 */
273static int 276static int
274qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn, 277qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
275 struct qed_dcbx_results *p_data, 278 struct qed_dcbx_results *p_data,
276 struct dcbx_app_priority_entry *p_tbl, 279 struct dcbx_app_priority_entry *p_tbl,
277 u32 pri_tc_tbl, int count, u8 dcbx_version) 280 u32 pri_tc_tbl, int count, u8 dcbx_version)
@@ -315,7 +318,7 @@ qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn,
315 enable = true; 318 enable = true;
316 } 319 }
317 320
318 qed_dcbx_update_app_info(p_data, p_hwfn, enable, 321 qed_dcbx_update_app_info(p_data, p_hwfn, p_ptt, enable,
319 priority, tc, type); 322 priority, tc, type);
320 } 323 }
321 } 324 }
@@ -337,7 +340,7 @@ qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn,
337 continue; 340 continue;
338 341
339 enable = (type == DCBX_PROTOCOL_ETH) ? false : !!dcbx_version; 342 enable = (type == DCBX_PROTOCOL_ETH) ? false : !!dcbx_version;
340 qed_dcbx_update_app_info(p_data, p_hwfn, enable, 343 qed_dcbx_update_app_info(p_data, p_hwfn, p_ptt, enable,
341 priority, tc, type); 344 priority, tc, type);
342 } 345 }
343 346
@@ -347,7 +350,8 @@ qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn,
347/* Parse app TLV's to update TC information in hw_info structure for 350/* Parse app TLV's to update TC information in hw_info structure for
348 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 351 * reconfiguring QM. Get protocol specific data for PF update ramrod command.
349 */ 352 */
350static int qed_dcbx_process_mib_info(struct qed_hwfn *p_hwfn) 353static int
354qed_dcbx_process_mib_info(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
351{ 355{
352 struct dcbx_app_priority_feature *p_app; 356 struct dcbx_app_priority_feature *p_app;
353 struct dcbx_app_priority_entry *p_tbl; 357 struct dcbx_app_priority_entry *p_tbl;
@@ -371,7 +375,7 @@ static int qed_dcbx_process_mib_info(struct qed_hwfn *p_hwfn)
371 p_info = &p_hwfn->hw_info; 375 p_info = &p_hwfn->hw_info;
372 num_entries = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES); 376 num_entries = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES);
373 377
374 rc = qed_dcbx_process_tlv(p_hwfn, &data, p_tbl, pri_tc_tbl, 378 rc = qed_dcbx_process_tlv(p_hwfn, p_ptt, &data, p_tbl, pri_tc_tbl,
375 num_entries, dcbx_version); 379 num_entries, dcbx_version);
376 if (rc) 380 if (rc)
377 return rc; 381 return rc;
@@ -897,7 +901,7 @@ qed_dcbx_mib_update_event(struct qed_hwfn *p_hwfn,
897 return rc; 901 return rc;
898 902
899 if (type == QED_DCBX_OPERATIONAL_MIB) { 903 if (type == QED_DCBX_OPERATIONAL_MIB) {
900 rc = qed_dcbx_process_mib_info(p_hwfn); 904 rc = qed_dcbx_process_mib_info(p_hwfn, p_ptt);
901 if (!rc) { 905 if (!rc) {
902 /* reconfigure tcs of QM queues according 906 /* reconfigure tcs of QM queues according
903 * to negotiation results 907 * to negotiation results
diff --git a/drivers/net/ethernet/qlogic/qed/qed_mcp.c b/drivers/net/ethernet/qlogic/qed/qed_mcp.c
index 5d37ec7e9b0b..58c7eb9d8e1b 100644
--- a/drivers/net/ethernet/qlogic/qed/qed_mcp.c
+++ b/drivers/net/ethernet/qlogic/qed/qed_mcp.c
@@ -1581,13 +1581,29 @@ static void qed_mcp_update_stag(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
1581 p_hwfn->mcp_info->func_info.ovlan = (u16)shmem_info.ovlan_stag & 1581 p_hwfn->mcp_info->func_info.ovlan = (u16)shmem_info.ovlan_stag &
1582 FUNC_MF_CFG_OV_STAG_MASK; 1582 FUNC_MF_CFG_OV_STAG_MASK;
1583 p_hwfn->hw_info.ovlan = p_hwfn->mcp_info->func_info.ovlan; 1583 p_hwfn->hw_info.ovlan = p_hwfn->mcp_info->func_info.ovlan;
1584 if ((p_hwfn->hw_info.hw_mode & BIT(MODE_MF_SD)) && 1584 if (test_bit(QED_MF_OVLAN_CLSS, &p_hwfn->cdev->mf_bits)) {
1585 (p_hwfn->hw_info.ovlan != QED_MCP_VLAN_UNSET)) { 1585 if (p_hwfn->hw_info.ovlan != QED_MCP_VLAN_UNSET) {
1586 qed_wr(p_hwfn, p_ptt, 1586 qed_wr(p_hwfn, p_ptt, NIG_REG_LLH_FUNC_TAG_VALUE,
1587 NIG_REG_LLH_FUNC_TAG_VALUE, p_hwfn->hw_info.ovlan); 1587 p_hwfn->hw_info.ovlan);
1588 qed_wr(p_hwfn, p_ptt, NIG_REG_LLH_FUNC_TAG_EN, 1);
1589
1590 /* Configure DB to add external vlan to EDPM packets */
1591 qed_wr(p_hwfn, p_ptt, DORQ_REG_TAG1_OVRD_MODE, 1);
1592 qed_wr(p_hwfn, p_ptt, DORQ_REG_PF_EXT_VID_BB_K2,
1593 p_hwfn->hw_info.ovlan);
1594 } else {
1595 qed_wr(p_hwfn, p_ptt, NIG_REG_LLH_FUNC_TAG_EN, 0);
1596 qed_wr(p_hwfn, p_ptt, NIG_REG_LLH_FUNC_TAG_VALUE, 0);
1597 qed_wr(p_hwfn, p_ptt, DORQ_REG_TAG1_OVRD_MODE, 0);
1598 qed_wr(p_hwfn, p_ptt, DORQ_REG_PF_EXT_VID_BB_K2, 0);
1599 }
1600
1588 qed_sp_pf_update_stag(p_hwfn); 1601 qed_sp_pf_update_stag(p_hwfn);
1589 } 1602 }
1590 1603
1604 DP_VERBOSE(p_hwfn, QED_MSG_SP, "ovlan = %d hw_mode = 0x%x\n",
1605 p_hwfn->mcp_info->func_info.ovlan, p_hwfn->hw_info.hw_mode);
1606
1591 /* Acknowledge the MFW */ 1607 /* Acknowledge the MFW */
1592 qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_S_TAG_UPDATE_ACK, 0, 1608 qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_S_TAG_UPDATE_ACK, 0,
1593 &resp, &param); 1609 &resp, &param);
diff --git a/drivers/net/ethernet/qlogic/qed/qed_reg_addr.h b/drivers/net/ethernet/qlogic/qed/qed_reg_addr.h
index f736f70956fd..2440970882c4 100644
--- a/drivers/net/ethernet/qlogic/qed/qed_reg_addr.h
+++ b/drivers/net/ethernet/qlogic/qed/qed_reg_addr.h
@@ -216,6 +216,12 @@
216 0x00c000UL 216 0x00c000UL
217#define DORQ_REG_IFEN \ 217#define DORQ_REG_IFEN \
218 0x100040UL 218 0x100040UL
219#define DORQ_REG_TAG1_OVRD_MODE \
220 0x1008b4UL
221#define DORQ_REG_PF_PCP_BB_K2 \
222 0x1008c4UL
223#define DORQ_REG_PF_EXT_VID_BB_K2 \