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authorTomi Valkeinen <tomi.valkeinen@ti.com>2015-08-10 05:08:50 -0400
committerTomi Valkeinen <tomi.valkeinen@ti.com>2017-04-03 05:36:40 -0400
commit7e3d92749dd773b8a1bd35b02e2aa1271cb7a31b (patch)
tree5d70ed612f2644826ac626be396ff3528688cee5
parent7d267f068a8b4944d52e8b0ae4c8fcc1c1c5c5ba (diff)
drm/omap: refactor CRTC HW property setup
The current driver doesn't expose any of the CRTC HW properties like background color or transparency key, and sets them at CRTC enable time. Refactor this into a separate function and call that function from omap_crtc_atomic_flush(). This is the behavior we want when the properties can be configured, so this patch makes it easier to add patches later which implement those properties. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
-rw-r--r--drivers/gpu/drm/omapdrm/omap_crtc.c25
1 files changed, 17 insertions, 8 deletions
diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c b/drivers/gpu/drm/omapdrm/omap_crtc.c
index 2fe735c269fc..49fc61963af4 100644
--- a/drivers/gpu/drm/omapdrm/omap_crtc.c
+++ b/drivers/gpu/drm/omapdrm/omap_crtc.c
@@ -198,15 +198,7 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)
198static int omap_crtc_dss_enable(enum omap_channel channel) 198static int omap_crtc_dss_enable(enum omap_channel channel)
199{ 199{
200 struct omap_crtc *omap_crtc = omap_crtcs[channel]; 200 struct omap_crtc *omap_crtc = omap_crtcs[channel];
201 struct omap_overlay_manager_info info;
202 201
203 memset(&info, 0, sizeof(info));
204 info.default_color = 0x00000000;
205 info.trans_key = 0x00000000;
206 info.trans_key_type = OMAP_DSS_COLOR_KEY_GFX_DST;
207 info.trans_enabled = false;
208
209 dispc_mgr_setup(omap_crtc->channel, &info);
210 dispc_mgr_set_timings(omap_crtc->channel, 202 dispc_mgr_set_timings(omap_crtc->channel,
211 &omap_crtc->vm); 203 &omap_crtc->vm);
212 omap_crtc_set_enabled(&omap_crtc->base, true); 204 omap_crtc_set_enabled(&omap_crtc->base, true);
@@ -313,6 +305,21 @@ void omap_crtc_vblank_irq(struct drm_crtc *crtc)
313 DBG("%s: apply done", omap_crtc->name); 305 DBG("%s: apply done", omap_crtc->name);
314} 306}
315 307
308static void omap_crtc_write_crtc_properties(struct drm_crtc *crtc)
309{
310 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
311 struct omap_overlay_manager_info info;
312
313 memset(&info, 0, sizeof(info));
314
315 info.default_color = 0x000000;
316 info.trans_enabled = false;
317 info.partial_alpha_enabled = false;
318 info.cpr_enable = false;
319
320 dispc_mgr_setup(omap_crtc->channel, &info);
321}
322
316/* ----------------------------------------------------------------------------- 323/* -----------------------------------------------------------------------------
317 * CRTC Functions 324 * CRTC Functions
318 */ 325 */
@@ -410,6 +417,8 @@ static void omap_crtc_atomic_flush(struct drm_crtc *crtc,
410 dispc_mgr_set_gamma(omap_crtc->channel, lut, length); 417 dispc_mgr_set_gamma(omap_crtc->channel, lut, length);
411 } 418 }
412 419
420 omap_crtc_write_crtc_properties(crtc);
421
413 /* Only flush the CRTC if it is currently enabled. */ 422 /* Only flush the CRTC if it is currently enabled. */
414 if (!omap_crtc->enabled) 423 if (!omap_crtc->enabled)
415 return; 424 return;