diff options
author | Dave Airlie <airlied@redhat.com> | 2017-08-22 15:32:26 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2017-08-22 15:32:26 -0400 |
commit | 7c0059dd832cc686bf0febefdcf8295cdd93007f (patch) | |
tree | 7f1e9e8fc879d1013136b7b88fa609bd4f6da065 | |
parent | 6b9dfb5991a3fda1ced9062f6c86d8798416ea31 (diff) | |
parent | 27a451e83e78e1167f58cddba189fae4b4fa0d5b (diff) |
Merge branch 'linux-4.14' of git://github.com/skeggsb/linux into drm-next
Not a lot that's ready to be included this round for Nouveau. GP108
modesetting support, and misc other fixes.
* 'linux-4.14' of git://github.com/skeggsb/linux:
drm/nouveau/kms/nv50: perform null check on msto[i] rathern than msto
drm/nouveau/pci/msi: disable MSI on big-endian platforms by default
drm/nouveau: silence suspend/resume debugging messages
drm/nouveau/kms/nv04-nv4x: fix exposed format list
drm/nouveau/kms/nv10-nv40: add NV21 support to overlay
drm/nouveau/kms/nv04-nv40: improve overlay error detection, fix pitch setting
drm/nouveau/kms/nv04-nv40: prevent undisplayable framebuffers from creation
drm/nouveau/mpeg: print more debug info when rejecting dma objects
drm/nouveau/fb/gf100-: zero mmu debug buffers
drm/nouveau/bar/gf100: add config option to limit BAR2 to 16MiB
initial support (display-only) for GP108
drm/nouveau/falcon: use a more reasonable msgqueue timeout value
drm/nouveau/disp: Silence DCB warnings.
drm/nouveau/bios: Demote missing fp table message to NV_DEBUG.
drm/nouveau/pmu/gt215-: abstract detection of whether reset is needed
drm/nouveau/pmu/gt215: fix reset
drm/nouveau/mc/gf100: add pmu to reset mask
drm/nouveau/disp/gf119-: avoid creating non-existent heads
drm/nouveau/therm/gm200: Added
drm/nouveau/therm: fix spelling mistake on array thresolds
39 files changed, 287 insertions, 75 deletions
diff --git a/drivers/gpu/drm/nouveau/dispnv04/crtc.c b/drivers/gpu/drm/nouveau/dispnv04/crtc.c index 8f689f1f6122..6aa6ee16dcbd 100644 --- a/drivers/gpu/drm/nouveau/dispnv04/crtc.c +++ b/drivers/gpu/drm/nouveau/dispnv04/crtc.c | |||
@@ -1096,6 +1096,38 @@ static const struct drm_crtc_helper_funcs nv04_crtc_helper_funcs = { | |||
1096 | .disable = nv_crtc_disable, | 1096 | .disable = nv_crtc_disable, |
1097 | }; | 1097 | }; |
1098 | 1098 | ||
1099 | static const uint32_t modeset_formats[] = { | ||
1100 | DRM_FORMAT_XRGB8888, | ||
1101 | DRM_FORMAT_RGB565, | ||
1102 | DRM_FORMAT_XRGB1555, | ||
1103 | }; | ||
1104 | |||
1105 | static struct drm_plane * | ||
1106 | create_primary_plane(struct drm_device *dev) | ||
1107 | { | ||
1108 | struct drm_plane *primary; | ||
1109 | int ret; | ||
1110 | |||
1111 | primary = kzalloc(sizeof(*primary), GFP_KERNEL); | ||
1112 | if (primary == NULL) { | ||
1113 | DRM_DEBUG_KMS("Failed to allocate primary plane\n"); | ||
1114 | return NULL; | ||
1115 | } | ||
1116 | |||
1117 | /* possible_crtc's will be filled in later by crtc_init */ | ||
1118 | ret = drm_universal_plane_init(dev, primary, 0, | ||
1119 | &drm_primary_helper_funcs, | ||
1120 | modeset_formats, | ||
1121 | ARRAY_SIZE(modeset_formats), NULL, | ||
1122 | DRM_PLANE_TYPE_PRIMARY, NULL); | ||
1123 | if (ret) { | ||
1124 | kfree(primary); | ||
1125 | primary = NULL; | ||
1126 | } | ||
1127 | |||
1128 | return primary; | ||
1129 | } | ||
1130 | |||
1099 | int | 1131 | int |
1100 | nv04_crtc_create(struct drm_device *dev, int crtc_num) | 1132 | nv04_crtc_create(struct drm_device *dev, int crtc_num) |
1101 | { | 1133 | { |
@@ -1114,7 +1146,9 @@ nv04_crtc_create(struct drm_device *dev, int crtc_num) | |||
1114 | nv_crtc->save = nv_crtc_save; | 1146 | nv_crtc->save = nv_crtc_save; |
1115 | nv_crtc->restore = nv_crtc_restore; | 1147 | nv_crtc->restore = nv_crtc_restore; |
1116 | 1148 | ||
1117 | drm_crtc_init(dev, &nv_crtc->base, &nv04_crtc_funcs); | 1149 | drm_crtc_init_with_planes(dev, &nv_crtc->base, |
1150 | create_primary_plane(dev), NULL, | ||
1151 | &nv04_crtc_funcs, NULL); | ||
1118 | drm_crtc_helper_add(&nv_crtc->base, &nv04_crtc_helper_funcs); | 1152 | drm_crtc_helper_add(&nv_crtc->base, &nv04_crtc_helper_funcs); |
1119 | drm_mode_crtc_set_gamma_size(&nv_crtc->base, 256); | 1153 | drm_mode_crtc_set_gamma_size(&nv_crtc->base, 256); |
1120 | 1154 | ||
diff --git a/drivers/gpu/drm/nouveau/dispnv04/overlay.c b/drivers/gpu/drm/nouveau/dispnv04/overlay.c index e54944d23268..c8c2333f24ee 100644 --- a/drivers/gpu/drm/nouveau/dispnv04/overlay.c +++ b/drivers/gpu/drm/nouveau/dispnv04/overlay.c | |||
@@ -63,6 +63,7 @@ static uint32_t formats[] = { | |||
63 | DRM_FORMAT_YUYV, | 63 | DRM_FORMAT_YUYV, |
64 | DRM_FORMAT_UYVY, | 64 | DRM_FORMAT_UYVY, |
65 | DRM_FORMAT_NV12, | 65 | DRM_FORMAT_NV12, |
66 | DRM_FORMAT_NV21, | ||
66 | }; | 67 | }; |
67 | 68 | ||
68 | /* Sine can be approximated with | 69 | /* Sine can be approximated with |
@@ -90,6 +91,26 @@ cos_mul(int degrees, int factor) | |||
90 | } | 91 | } |
91 | 92 | ||
92 | static int | 93 | static int |
94 | verify_scaling(const struct drm_framebuffer *fb, uint8_t shift, | ||
95 | uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h, | ||
96 | uint32_t crtc_w, uint32_t crtc_h) | ||
97 | { | ||
98 | if (crtc_w < (src_w >> shift) || crtc_h < (src_h >> shift)) { | ||
99 | DRM_DEBUG_KMS("Unsuitable framebuffer scaling: %dx%d -> %dx%d\n", | ||
100 | src_w, src_h, crtc_w, crtc_h); | ||
101 | return -ERANGE; | ||
102 | } | ||
103 | |||
104 | if (src_x != 0 || src_y != 0) { | ||
105 | DRM_DEBUG_KMS("Unsuitable framebuffer offset: %d,%d\n", | ||
106 | src_x, src_y); | ||
107 | return -ERANGE; | ||
108 | } | ||
109 | |||
110 | return 0; | ||
111 | } | ||
112 | |||
113 | static int | ||
93 | nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, | 114 | nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, |
94 | struct drm_framebuffer *fb, int crtc_x, int crtc_y, | 115 | struct drm_framebuffer *fb, int crtc_x, int crtc_y, |
95 | unsigned int crtc_w, unsigned int crtc_h, | 116 | unsigned int crtc_w, unsigned int crtc_h, |
@@ -107,7 +128,9 @@ nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, | |||
107 | bool flip = nv_plane->flip; | 128 | bool flip = nv_plane->flip; |
108 | int soff = NV_PCRTC0_SIZE * nv_crtc->index; | 129 | int soff = NV_PCRTC0_SIZE * nv_crtc->index; |
109 | int soff2 = NV_PCRTC0_SIZE * !nv_crtc->index; | 130 | int soff2 = NV_PCRTC0_SIZE * !nv_crtc->index; |
110 | int format, ret; | 131 | unsigned shift = drm->client.device.info.chipset >= 0x30 ? 1 : 3; |
132 | unsigned format = 0; | ||
133 | int ret; | ||
111 | 134 | ||
112 | /* Source parameters given in 16.16 fixed point, ignore fractional. */ | 135 | /* Source parameters given in 16.16 fixed point, ignore fractional. */ |
113 | src_x >>= 16; | 136 | src_x >>= 16; |
@@ -115,18 +138,9 @@ nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, | |||
115 | src_w >>= 16; | 138 | src_w >>= 16; |
116 | src_h >>= 16; | 139 | src_h >>= 16; |
117 | 140 | ||
118 | format = ALIGN(src_w * 4, 0x100); | 141 | ret = verify_scaling(fb, shift, 0, 0, src_w, src_h, crtc_w, crtc_h); |
119 | 142 | if (ret) | |
120 | if (format > 0xffff) | 143 | return ret; |
121 | return -ERANGE; | ||
122 | |||
123 | if (drm->client.device.info.chipset >= 0x30) { | ||
124 | if (crtc_w < (src_w >> 1) || crtc_h < (src_h >> 1)) | ||
125 | return -ERANGE; | ||
126 | } else { | ||
127 | if (crtc_w < (src_w >> 3) || crtc_h < (src_h >> 3)) | ||
128 | return -ERANGE; | ||
129 | } | ||
130 | 144 | ||
131 | ret = nouveau_bo_pin(nv_fb->nvbo, TTM_PL_FLAG_VRAM, false); | 145 | ret = nouveau_bo_pin(nv_fb->nvbo, TTM_PL_FLAG_VRAM, false); |
132 | if (ret) | 146 | if (ret) |
@@ -146,21 +160,23 @@ nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, | |||
146 | nvif_wr32(dev, NV_PVIDEO_POINT_OUT(flip), crtc_y << 16 | crtc_x); | 160 | nvif_wr32(dev, NV_PVIDEO_POINT_OUT(flip), crtc_y << 16 | crtc_x); |
147 | nvif_wr32(dev, NV_PVIDEO_SIZE_OUT(flip), crtc_h << 16 | crtc_w); | 161 | nvif_wr32(dev, NV_PVIDEO_SIZE_OUT(flip), crtc_h << 16 | crtc_w); |
148 | 162 | ||
149 | if (fb->format->format != DRM_FORMAT_UYVY) | 163 | if (fb->format->format == DRM_FORMAT_YUYV || |
164 | fb->format->format == DRM_FORMAT_NV12) | ||
150 | format |= NV_PVIDEO_FORMAT_COLOR_LE_CR8YB8CB8YA8; | 165 | format |= NV_PVIDEO_FORMAT_COLOR_LE_CR8YB8CB8YA8; |
151 | if (fb->format->format == DRM_FORMAT_NV12) | 166 | if (fb->format->format == DRM_FORMAT_NV12 || |
167 | fb->format->format == DRM_FORMAT_NV21) | ||
152 | format |= NV_PVIDEO_FORMAT_PLANAR; | 168 | format |= NV_PVIDEO_FORMAT_PLANAR; |
153 | if (nv_plane->iturbt_709) | 169 | if (nv_plane->iturbt_709) |
154 | format |= NV_PVIDEO_FORMAT_MATRIX_ITURBT709; | 170 | format |= NV_PVIDEO_FORMAT_MATRIX_ITURBT709; |
155 | if (nv_plane->colorkey & (1 << 24)) | 171 | if (nv_plane->colorkey & (1 << 24)) |
156 | format |= NV_PVIDEO_FORMAT_DISPLAY_COLOR_KEY; | 172 | format |= NV_PVIDEO_FORMAT_DISPLAY_COLOR_KEY; |
157 | 173 | ||
158 | if (fb->format->format == DRM_FORMAT_NV12) { | 174 | if (format & NV_PVIDEO_FORMAT_PLANAR) { |
159 | nvif_wr32(dev, NV_PVIDEO_UVPLANE_BASE(flip), 0); | 175 | nvif_wr32(dev, NV_PVIDEO_UVPLANE_BASE(flip), 0); |
160 | nvif_wr32(dev, NV_PVIDEO_UVPLANE_OFFSET_BUFF(flip), | 176 | nvif_wr32(dev, NV_PVIDEO_UVPLANE_OFFSET_BUFF(flip), |
161 | nv_fb->nvbo->bo.offset + fb->offsets[1]); | 177 | nv_fb->nvbo->bo.offset + fb->offsets[1]); |
162 | } | 178 | } |
163 | nvif_wr32(dev, NV_PVIDEO_FORMAT(flip), format); | 179 | nvif_wr32(dev, NV_PVIDEO_FORMAT(flip), format | fb->pitches[0]); |
164 | nvif_wr32(dev, NV_PVIDEO_STOP, 0); | 180 | nvif_wr32(dev, NV_PVIDEO_STOP, 0); |
165 | /* TODO: wait for vblank? */ | 181 | /* TODO: wait for vblank? */ |
166 | nvif_wr32(dev, NV_PVIDEO_BUFFER, flip ? 0x10 : 0x1); | 182 | nvif_wr32(dev, NV_PVIDEO_BUFFER, flip ? 0x10 : 0x1); |
@@ -357,7 +373,7 @@ nv04_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, | |||
357 | struct nouveau_bo *cur = nv_plane->cur; | 373 | struct nouveau_bo *cur = nv_plane->cur; |
358 | uint32_t overlay = 1; | 374 | uint32_t overlay = 1; |
359 | int brightness = (nv_plane->brightness - 512) * 62 / 512; | 375 | int brightness = (nv_plane->brightness - 512) * 62 / 512; |
360 | int pitch, ret, i; | 376 | int ret, i; |
361 | 377 | ||
362 | /* Source parameters given in 16.16 fixed point, ignore fractional. */ | 378 | /* Source parameters given in 16.16 fixed point, ignore fractional. */ |
363 | src_x >>= 16; | 379 | src_x >>= 16; |
@@ -365,17 +381,9 @@ nv04_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, | |||
365 | src_w >>= 16; | 381 | src_w >>= 16; |
366 | src_h >>= 16; | 382 | src_h >>= 16; |
367 | 383 | ||
368 | pitch = ALIGN(src_w * 4, 0x100); | 384 | ret = verify_scaling(fb, 0, src_x, src_y, src_w, src_h, crtc_w, crtc_h); |
369 | 385 | if (ret) | |
370 | if (pitch > 0xffff) | 386 | return ret; |
371 | return -ERANGE; | ||
372 | |||
373 | /* TODO: Compute an offset? Not sure how to do this for YUYV. */ | ||
374 | if (src_x != 0 || src_y != 0) | ||
375 | return -ERANGE; | ||
376 | |||
377 | if (crtc_w < src_w || crtc_h < src_h) | ||
378 | return -ERANGE; | ||
379 | 387 | ||
380 | ret = nouveau_bo_pin(nv_fb->nvbo, TTM_PL_FLAG_VRAM, false); | 388 | ret = nouveau_bo_pin(nv_fb->nvbo, TTM_PL_FLAG_VRAM, false); |
381 | if (ret) | 389 | if (ret) |
@@ -389,8 +397,9 @@ nv04_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, | |||
389 | 397 | ||
390 | for (i = 0; i < 2; i++) { | 398 | for (i = 0; i < 2; i++) { |
391 | nvif_wr32(dev, NV_PVIDEO_BUFF0_START_ADDRESS + 4 * i, | 399 | nvif_wr32(dev, NV_PVIDEO_BUFF0_START_ADDRESS + 4 * i, |
392 | nv_fb->nvbo->bo.offset); | 400 | nv_fb->nvbo->bo.offset); |
393 | nvif_wr32(dev, NV_PVIDEO_BUFF0_PITCH_LENGTH + 4 * i, pitch); | 401 | nvif_wr32(dev, NV_PVIDEO_BUFF0_PITCH_LENGTH + 4 * i, |
402 | fb->pitches[0]); | ||
394 | nvif_wr32(dev, NV_PVIDEO_BUFF0_OFFSET + 4 * i, 0); | 403 | nvif_wr32(dev, NV_PVIDEO_BUFF0_OFFSET + 4 * i, 0); |
395 | } | 404 | } |
396 | nvif_wr32(dev, NV_PVIDEO_WINDOW_START, crtc_y << 16 | crtc_x); | 405 | nvif_wr32(dev, NV_PVIDEO_WINDOW_START, crtc_y << 16 | crtc_x); |
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/conn.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/conn.h index e8e77ee24776..deb477282dde 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/conn.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/conn.h | |||
@@ -18,6 +18,7 @@ enum dcb_connector_type { | |||
18 | DCB_CONNECTOR_HDMI_C = 0x63, | 18 | DCB_CONNECTOR_HDMI_C = 0x63, |
19 | DCB_CONNECTOR_DMS59_DP0 = 0x64, | 19 | DCB_CONNECTOR_DMS59_DP0 = 0x64, |
20 | DCB_CONNECTOR_DMS59_DP1 = 0x65, | 20 | DCB_CONNECTOR_DMS59_DP1 = 0x65, |
21 | DCB_CONNECTOR_WFD = 0x70, | ||
21 | DCB_CONNECTOR_NONE = 0xff | 22 | DCB_CONNECTOR_NONE = 0xff |
22 | }; | 23 | }; |
23 | 24 | ||
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/dcb.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/dcb.h index 4892a65ddd48..903d117603d8 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/dcb.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/dcb.h | |||
@@ -6,6 +6,7 @@ enum dcb_output_type { | |||
6 | DCB_OUTPUT_TMDS = 0x2, | 6 | DCB_OUTPUT_TMDS = 0x2, |
7 | DCB_OUTPUT_LVDS = 0x3, | 7 | DCB_OUTPUT_LVDS = 0x3, |
8 | DCB_OUTPUT_DP = 0x6, | 8 | DCB_OUTPUT_DP = 0x6, |
9 | DCB_OUTPUT_WFD = 0x8, | ||
9 | DCB_OUTPUT_EOL = 0xe, | 10 | DCB_OUTPUT_EOL = 0xe, |
10 | DCB_OUTPUT_UNUSED = 0xf, | 11 | DCB_OUTPUT_UNUSED = 0xf, |
11 | DCB_OUTPUT_ANY = -1, | 12 | DCB_OUTPUT_ANY = -1, |
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/therm.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/therm.h index b268b96faece..1bfd93b85575 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/therm.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/therm.h | |||
@@ -96,4 +96,5 @@ int g84_therm_new(struct nvkm_device *, int, struct nvkm_therm **); | |||
96 | int gt215_therm_new(struct nvkm_device *, int, struct nvkm_therm **); | 96 | int gt215_therm_new(struct nvkm_device *, int, struct nvkm_therm **); |
97 | int gf119_therm_new(struct nvkm_device *, int, struct nvkm_therm **); | 97 | int gf119_therm_new(struct nvkm_device *, int, struct nvkm_therm **); |
98 | int gm107_therm_new(struct nvkm_device *, int, struct nvkm_therm **); | 98 | int gm107_therm_new(struct nvkm_device *, int, struct nvkm_therm **); |
99 | int gm200_therm_new(struct nvkm_device *, int, struct nvkm_therm **); | ||
99 | #endif | 100 | #endif |
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c index b998c33af18a..dd6fba55ad5d 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bios.c +++ b/drivers/gpu/drm/nouveau/nouveau_bios.c | |||
@@ -351,11 +351,8 @@ static int parse_fp_mode_table(struct drm_device *dev, struct nvbios *bios) | |||
351 | struct lvdstableheader lth; | 351 | struct lvdstableheader lth; |
352 | 352 | ||
353 | if (bios->fp.fptablepointer == 0x0) { | 353 | if (bios->fp.fptablepointer == 0x0) { |
354 | /* Apple cards don't have the fp table; the laptops use DDC */ | 354 | /* Most laptop cards lack an fp table. They use DDC. */ |
355 | /* The table is also missing on some x86 IGPs */ | 355 | NV_DEBUG(drm, "Pointer to flat panel table invalid\n"); |
356 | #ifndef __powerpc__ | ||
357 | NV_ERROR(drm, "Pointer to flat panel table invalid\n"); | ||
358 | #endif | ||
359 | bios->digital_min_front_porch = 0x4b; | 356 | bios->digital_min_front_porch = 0x4b; |
360 | return 0; | 357 | return 0; |
361 | } | 358 | } |
diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c index 5137155bf3c0..70d8e0d69ad5 100644 --- a/drivers/gpu/drm/nouveau/nouveau_connector.c +++ b/drivers/gpu/drm/nouveau/nouveau_connector.c | |||
@@ -1184,6 +1184,7 @@ drm_conntype_from_dcb(enum dcb_connector_type dcb) | |||
1184 | case DCB_CONNECTOR_HDMI_0 : | 1184 | case DCB_CONNECTOR_HDMI_0 : |
1185 | case DCB_CONNECTOR_HDMI_1 : | 1185 | case DCB_CONNECTOR_HDMI_1 : |
1186 | case DCB_CONNECTOR_HDMI_C : return DRM_MODE_CONNECTOR_HDMIA; | 1186 | case DCB_CONNECTOR_HDMI_C : return DRM_MODE_CONNECTOR_HDMIA; |
1187 | case DCB_CONNECTOR_WFD : return DRM_MODE_CONNECTOR_VIRTUAL; | ||
1187 | default: | 1188 | default: |
1188 | break; | 1189 | break; |
1189 | } | 1190 | } |
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c index d66640047913..2e7785f49e6d 100644 --- a/drivers/gpu/drm/nouveau/nouveau_display.c +++ b/drivers/gpu/drm/nouveau/nouveau_display.c | |||
@@ -231,9 +231,30 @@ nouveau_framebuffer_new(struct drm_device *dev, | |||
231 | struct nouveau_bo *nvbo, | 231 | struct nouveau_bo *nvbo, |
232 | struct nouveau_framebuffer **pfb) | 232 | struct nouveau_framebuffer **pfb) |
233 | { | 233 | { |
234 | struct nouveau_drm *drm = nouveau_drm(dev); | ||
234 | struct nouveau_framebuffer *fb; | 235 | struct nouveau_framebuffer *fb; |
235 | int ret; | 236 | int ret; |
236 | 237 | ||
238 | /* YUV overlays have special requirements pre-NV50 */ | ||
239 | if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA && | ||
240 | |||
241 | (mode_cmd->pixel_format == DRM_FORMAT_YUYV || | ||
242 | mode_cmd->pixel_format == DRM_FORMAT_UYVY || | ||
243 | mode_cmd->pixel_format == DRM_FORMAT_NV12 || | ||
244 | mode_cmd->pixel_format == DRM_FORMAT_NV21) && | ||
245 | (mode_cmd->pitches[0] & 0x3f || /* align 64 */ | ||
246 | mode_cmd->pitches[0] >= 0x10000 || /* at most 64k pitch */ | ||
247 | (mode_cmd->pitches[1] && /* pitches for planes must match */ | ||
248 | mode_cmd->pitches[0] != mode_cmd->pitches[1]))) { | ||
249 | struct drm_format_name_buf format_name; | ||
250 | DRM_DEBUG_KMS("Unsuitable framebuffer: format: %s; pitches: 0x%x\n 0x%x\n", | ||
251 | drm_get_format_name(mode_cmd->pixel_format, | ||
252 | &format_name), | ||
253 | mode_cmd->pitches[0], | ||
254 | mode_cmd->pitches[1]); | ||
255 | return -EINVAL; | ||
256 | } | ||
257 | |||
237 | if (!(fb = *pfb = kzalloc(sizeof(*fb), GFP_KERNEL))) | 258 | if (!(fb = *pfb = kzalloc(sizeof(*fb), GFP_KERNEL))) |
238 | return -ENOMEM; | 259 | return -ENOMEM; |
239 | 260 | ||
diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c b/drivers/gpu/drm/nouveau/nouveau_drm.c index df7e2037031a..595630d1fb9e 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drm.c +++ b/drivers/gpu/drm/nouveau/nouveau_drm.c | |||
@@ -585,18 +585,18 @@ nouveau_do_suspend(struct drm_device *dev, bool runtime) | |||
585 | nouveau_led_suspend(dev); | 585 | nouveau_led_suspend(dev); |
586 | 586 | ||
587 | if (dev->mode_config.num_crtc) { | 587 | if (dev->mode_config.num_crtc) { |
588 | NV_INFO(drm, "suspending console...\n"); | 588 | NV_DEBUG(drm, "suspending console...\n"); |
589 | nouveau_fbcon_set_suspend(dev, 1); | 589 | nouveau_fbcon_set_suspend(dev, 1); |
590 | NV_INFO(drm, "suspending display...\n"); | 590 | NV_DEBUG(drm, "suspending display...\n"); |
591 | ret = nouveau_display_suspend(dev, runtime); | 591 | ret = nouveau_display_suspend(dev, runtime); |
592 | if (ret) | 592 | if (ret) |
593 | return ret; | 593 | return ret; |
594 | } | 594 | } |
595 | 595 | ||
596 | NV_INFO(drm, "evicting buffers...\n"); | 596 | NV_DEBUG(drm, "evicting buffers...\n"); |
597 | ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM); | 597 | ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM); |
598 | 598 | ||
599 | NV_INFO(drm, "waiting for kernel channels to go idle...\n"); | 599 | NV_DEBUG(drm, "waiting for kernel channels to go idle...\n"); |
600 | if (drm->cechan) { | 600 | if (drm->cechan) { |
601 | ret = nouveau_channel_idle(drm->cechan); | 601 | ret = nouveau_channel_idle(drm->cechan); |
602 | if (ret) | 602 | if (ret) |
@@ -609,7 +609,7 @@ nouveau_do_suspend(struct drm_device *dev, bool runtime) | |||
609 | goto fail_display; | 609 | goto fail_display; |
610 | } | 610 | } |
611 | 611 | ||
612 | NV_INFO(drm, "suspending fence...\n"); | 612 | NV_DEBUG(drm, "suspending fence...\n"); |
613 | if (drm->fence && nouveau_fence(drm)->suspend) { | 613 | if (drm->fence && nouveau_fence(drm)->suspend) { |
614 | if (!nouveau_fence(drm)->suspend(drm)) { | 614 | if (!nouveau_fence(drm)->suspend(drm)) { |
615 | ret = -ENOMEM; | 615 | ret = -ENOMEM; |
@@ -617,7 +617,7 @@ nouveau_do_suspend(struct drm_device *dev, bool runtime) | |||
617 | } | 617 | } |
618 | } | 618 | } |
619 | 619 | ||
620 | NV_INFO(drm, "suspending object tree...\n"); | 620 | NV_DEBUG(drm, "suspending object tree...\n"); |
621 | ret = nvif_client_suspend(&drm->client.base); | 621 | ret = nvif_client_suspend(&drm->client.base); |
622 | if (ret) | 622 | if (ret) |
623 | goto fail_client; | 623 | goto fail_client; |
@@ -630,7 +630,7 @@ fail_client: | |||
630 | 630 | ||
631 | fail_display: | 631 | fail_display: |
632 | if (dev->mode_config.num_crtc) { | 632 | if (dev->mode_config.num_crtc) { |
633 | NV_INFO(drm, "resuming display...\n"); | 633 | NV_DEBUG(drm, "resuming display...\n"); |
634 | nouveau_display_resume(dev, runtime); | 634 | nouveau_display_resume(dev, runtime); |
635 | } | 635 | } |
636 | return ret; | 636 | return ret; |
@@ -641,19 +641,19 @@ nouveau_do_resume(struct drm_device *dev, bool runtime) | |||
641 | { | 641 | { |
642 | struct nouveau_drm *drm = nouveau_drm(dev); | 642 | struct nouveau_drm *drm = nouveau_drm(dev); |
643 | 643 | ||
644 | NV_INFO(drm, "resuming object tree...\n"); | 644 | NV_DEBUG(drm, "resuming object tree...\n"); |
645 | nvif_client_resume(&drm->client.base); | 645 | nvif_client_resume(&drm->client.base); |
646 | 646 | ||
647 | NV_INFO(drm, "resuming fence...\n"); | 647 | NV_DEBUG(drm, "resuming fence...\n"); |
648 | if (drm->fence && nouveau_fence(drm)->resume) | 648 | if (drm->fence && nouveau_fence(drm)->resume) |
649 | nouveau_fence(drm)->resume(drm); | 649 | nouveau_fence(drm)->resume(drm); |
650 | 650 | ||
651 | nouveau_run_vbios_init(dev); | 651 | nouveau_run_vbios_init(dev); |
652 | 652 | ||
653 | if (dev->mode_config.num_crtc) { | 653 | if (dev->mode_config.num_crtc) { |
654 | NV_INFO(drm, "resuming display...\n"); | 654 | NV_DEBUG(drm, "resuming display...\n"); |
655 | nouveau_display_resume(dev, runtime); | 655 | nouveau_display_resume(dev, runtime); |
656 | NV_INFO(drm, "resuming console...\n"); | 656 | NV_DEBUG(drm, "resuming console...\n"); |
657 | nouveau_fbcon_set_suspend(dev, 0); | 657 | nouveau_fbcon_set_suspend(dev, 0); |
658 | } | 658 | } |
659 | 659 | ||
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c index f7b4326a4641..2dbf62a2ac41 100644 --- a/drivers/gpu/drm/nouveau/nv50_display.c +++ b/drivers/gpu/drm/nouveau/nv50_display.c | |||
@@ -3141,7 +3141,7 @@ nv50_mstc_new(struct nv50_mstm *mstm, struct drm_dp_mst_port *port, | |||
3141 | mstc->connector.funcs->reset(&mstc->connector); | 3141 | mstc->connector.funcs->reset(&mstc->connector); |
3142 | nouveau_conn_attach_properties(&mstc->connector); | 3142 | nouveau_conn_attach_properties(&mstc->connector); |
3143 | 3143 | ||
3144 | for (i = 0; i < ARRAY_SIZE(mstm->msto) && mstm->msto; i++) | 3144 | for (i = 0; i < ARRAY_SIZE(mstm->msto) && mstm->msto[i]; i++) |
3145 | drm_mode_connector_attach_encoder(&mstc->connector, &mstm->msto[i]->encoder); | 3145 | drm_mode_connector_attach_encoder(&mstc->connector, &mstm->msto[i]->encoder); |
3146 | 3146 | ||
3147 | drm_object_attach_property(&mstc->connector.base, dev->mode_config.path_property, 0); | 3147 | drm_object_attach_property(&mstc->connector.base, dev->mode_config.path_property, 0); |
@@ -4451,11 +4451,13 @@ nv50_display_create(struct drm_device *dev) | |||
4451 | 4451 | ||
4452 | /* create crtc objects to represent the hw heads */ | 4452 | /* create crtc objects to represent the hw heads */ |
4453 | if (disp->disp->oclass >= GF110_DISP) | 4453 | if (disp->disp->oclass >= GF110_DISP) |
4454 | crtcs = nvif_rd32(&device->object, 0x022448); | 4454 | crtcs = nvif_rd32(&device->object, 0x612004) & 0xf; |
4455 | else | 4455 | else |
4456 | crtcs = 2; | 4456 | crtcs = 0x3; |
4457 | 4457 | ||
4458 | for (i = 0; i < crtcs; i++) { | 4458 | for (i = 0; i < fls(crtcs); i++) { |
4459 | if (!(crtcs & (1 << i))) | ||
4460 | continue; | ||
4459 | ret = nv50_head_create(dev, i); | 4461 | ret = nv50_head_create(dev, i); |
4460 | if (ret) | 4462 | if (ret) |
4461 | goto out; | 4463 | goto out; |
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c index 7bdc7a5ae723..e096a5d9c292 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c | |||
@@ -2043,6 +2043,7 @@ nv120_chipset = { | |||
2043 | .mxm = nv50_mxm_new, | 2043 | .mxm = nv50_mxm_new, |
2044 | .pci = gk104_pci_new, | 2044 | .pci = gk104_pci_new, |
2045 | .pmu = gm107_pmu_new, | 2045 | .pmu = gm107_pmu_new, |
2046 | .therm = gm200_therm_new, | ||
2046 | .secboot = gm200_secboot_new, | 2047 | .secboot = gm200_secboot_new, |
2047 | .timer = gk20a_timer_new, | 2048 | .timer = gk20a_timer_new, |
2048 | .top = gk104_top_new, | 2049 | .top = gk104_top_new, |
@@ -2077,6 +2078,7 @@ nv124_chipset = { | |||
2077 | .mxm = nv50_mxm_new, | 2078 | .mxm = nv50_mxm_new, |
2078 | .pci = gk104_pci_new, | 2079 | .pci = gk104_pci_new, |
2079 | .pmu = gm107_pmu_new, | 2080 | .pmu = gm107_pmu_new, |
2081 | .therm = gm200_therm_new, | ||
2080 | .secboot = gm200_secboot_new, | 2082 | .secboot = gm200_secboot_new, |
2081 | .timer = gk20a_timer_new, | 2083 | .timer = gk20a_timer_new, |
2082 | .top = gk104_top_new, | 2084 | .top = gk104_top_new, |
@@ -2111,6 +2113,7 @@ nv126_chipset = { | |||
2111 | .mxm = nv50_mxm_new, | 2113 | .mxm = nv50_mxm_new, |
2112 | .pci = gk104_pci_new, | 2114 | .pci = gk104_pci_new, |
2113 | .pmu = gm107_pmu_new, | 2115 | .pmu = gm107_pmu_new, |
2116 | .therm = gm200_therm_new, | ||
2114 | .secboot = gm200_secboot_new, | 2117 | .secboot = gm200_secboot_new, |
2115 | .timer = gk20a_timer_new, | 2118 | .timer = gk20a_timer_new, |
2116 | .top = gk104_top_new, | 2119 | .top = gk104_top_new, |
@@ -2321,6 +2324,35 @@ nv137_chipset = { | |||
2321 | }; | 2324 | }; |
2322 | 2325 | ||
2323 | static const struct nvkm_device_chip | 2326 | static const struct nvkm_device_chip |
2327 | nv138_chipset = { | ||
2328 | .name = "GP108", | ||
2329 | .bar = gf100_bar_new, | ||
2330 | .bios = nvkm_bios_new, | ||
2331 | .bus = gf100_bus_new, | ||
2332 | .devinit = gm200_devinit_new, | ||
2333 | .fb = gp102_fb_new, | ||
2334 | .fuse = gm107_fuse_new, | ||
2335 | .gpio = gk104_gpio_new, | ||
2336 | .i2c = gm200_i2c_new, | ||
2337 | .ibus = gm200_ibus_new, | ||
2338 | .imem = nv50_instmem_new, | ||
2339 | .ltc = gp100_ltc_new, | ||
2340 | .mc = gp100_mc_new, | ||
2341 | .mmu = gf100_mmu_new, | ||
2342 | .pci = gp100_pci_new, | ||
2343 | .pmu = gp102_pmu_new, | ||
2344 | .timer = gk20a_timer_new, | ||
2345 | .top = gk104_top_new, | ||
2346 | .ce[0] = gp102_ce_new, | ||
2347 | .ce[1] = gp102_ce_new, | ||
2348 | .ce[2] = gp102_ce_new, | ||
2349 | .ce[3] = gp102_ce_new, | ||
2350 | .disp = gp102_disp_new, | ||
2351 | .dma = gf119_dma_new, | ||
2352 | .fifo = gp100_fifo_new, | ||
2353 | }; | ||
2354 | |||
2355 | static const struct nvkm_device_chip | ||
2324 | nv13b_chipset = { | 2356 | nv13b_chipset = { |
2325 | .name = "GP10B", | 2357 | .name = "GP10B", |
2326 | .bar = gk20a_bar_new, | 2358 | .bar = gk20a_bar_new, |
@@ -2782,6 +2814,7 @@ nvkm_device_ctor(const struct nvkm_device_func *func, | |||
2782 | case 0x134: device->chip = &nv134_chipset; break; | 2814 | case 0x134: device->chip = &nv134_chipset; break; |
2783 | case 0x136: device->chip = &nv136_chipset; break; | 2815 | case 0x136: device->chip = &nv136_chipset; break; |
2784 | case 0x137: device->chip = &nv137_chipset; break; | 2816 | case 0x137: device->chip = &nv137_chipset; break; |
2817 | case 0x138: device->chip = &nv138_chipset; break; | ||
2785 | case 0x13b: device->chip = &nv13b_chipset; break; | 2818 | case 0x13b: device->chip = &nv13b_chipset; break; |
2786 | default: | 2819 | default: |
2787 | nvdev_error(device, "unknown chipset (%08x)\n", boot0); | 2820 | nvdev_error(device, "unknown chipset (%08x)\n", boot0); |
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c index 88582af8bd89..93a75e5b2791 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c | |||
@@ -285,6 +285,10 @@ nvkm_disp_oneinit(struct nvkm_engine *engine) | |||
285 | case DCB_OUTPUT_DP: | 285 | case DCB_OUTPUT_DP: |
286 | ret = nvkm_dp_new(disp, i, &dcbE, &outp); | 286 | ret = nvkm_dp_new(disp, i, &dcbE, &outp); |
287 | break; | 287 | break; |
288 | case DCB_OUTPUT_WFD: | ||
289 | /* No support for WFD yet. */ | ||
290 | ret = -ENODEV; | ||
291 | continue; | ||
288 | default: | 292 | default: |
289 | nvkm_warn(subdev, "dcb %d type %d unknown\n", | 293 | nvkm_warn(subdev, "dcb %d type %d unknown\n", |
290 | i, dcbE.type); | 294 | i, dcbE.type); |
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/headgf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/headgf119.c index b33552757647..9fd7ae331308 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/headgf119.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/headgf119.c | |||
@@ -92,5 +92,8 @@ gf119_head = { | |||
92 | int | 92 | int |
93 | gf119_head_new(struct nvkm_disp *disp, int id) | 93 | gf119_head_new(struct nvkm_disp *disp, int id) |
94 | { | 94 | { |
95 | struct nvkm_device *device = disp->engine.subdev.device; | ||
96 | if (!(nvkm_rd32(device, 0x612004) & (0x00000001 << id))) | ||
97 | return 0; | ||
95 | return nvkm_head_new_(&gf119_head, disp, id); | 98 | return nvkm_head_new_(&gf119_head, disp, id); |
96 | } | 99 | } |
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv31.c b/drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv31.c index 8a8895246d26..7fea7d45202f 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv31.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv31.c | |||
@@ -124,6 +124,8 @@ nv31_mpeg_tile(struct nvkm_engine *engine, int i, struct nvkm_fb_tile *tile) | |||
124 | static bool | 124 | static bool |
125 | nv31_mpeg_mthd_dma(struct nvkm_device *device, u32 mthd, u32 data) | 125 | nv31_mpeg_mthd_dma(struct nvkm_device *device, u32 mthd, u32 data) |
126 | { | 126 | { |
127 | struct nv31_mpeg *mpeg = nv31_mpeg(device->mpeg); | ||
128 | struct nvkm_subdev *subdev = &mpeg->engine.subdev; | ||
127 | u32 inst = data << 4; | 129 | u32 inst = data << 4; |
128 | u32 dma0 = nvkm_rd32(device, 0x700000 + inst); | 130 | u32 dma0 = nvkm_rd32(device, 0x700000 + inst); |
129 | u32 dma1 = nvkm_rd32(device, 0x700004 + inst); | 131 | u32 dma1 = nvkm_rd32(device, 0x700004 + inst); |
@@ -132,8 +134,11 @@ nv31_mpeg_mthd_dma(struct nvkm_device *device, u32 mthd, u32 data) | |||
132 | u32 size = dma1 + 1; | 134 | u32 size = dma1 + 1; |
133 | 135 | ||
134 | /* only allow linear DMA objects */ | 136 | /* only allow linear DMA objects */ |
135 | if (!(dma0 & 0x00002000)) | 137 | if (!(dma0 & 0x00002000)) { |
138 | nvkm_error(subdev, "inst %08x dma0 %08x dma1 %08x dma2 %08x\n", | ||
139 | inst, dma0, dma1, dma2); | ||
136 | return false; | 140 | return false; |
141 | } | ||
137 | 142 | ||
138 | if (mthd == 0x0190) { | 143 | if (mthd == 0x0190) { |
139 | /* DMA_CMD */ | 144 | /* DMA_CMD */ |
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv40.c b/drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv40.c index 16de5bd94b14..b5ec7c504dc6 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv40.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv40.c | |||
@@ -31,6 +31,8 @@ bool | |||
31 | nv40_mpeg_mthd_dma(struct nvkm_device *device, u32 mthd, u32 data) | 31 | nv40_mpeg_mthd_dma(struct nvkm_device *device, u32 mthd, u32 data) |
32 | { | 32 | { |
33 | struct nvkm_instmem *imem = device->imem; | 33 | struct nvkm_instmem *imem = device->imem; |
34 | struct nv31_mpeg *mpeg = nv31_mpeg(device->mpeg); | ||
35 | struct nvkm_subdev *subdev = &mpeg->engine.subdev; | ||
34 | u32 inst = data << 4; | 36 | u32 inst = data << 4; |
35 | u32 dma0 = nvkm_instmem_rd32(imem, inst + 0); | 37 | u32 dma0 = nvkm_instmem_rd32(imem, inst + 0); |
36 | u32 dma1 = nvkm_instmem_rd32(imem, inst + 4); | 38 | u32 dma1 = nvkm_instmem_rd32(imem, inst + 4); |
@@ -39,8 +41,11 @@ nv40_mpeg_mthd_dma(struct nvkm_device *device, u32 mthd, u32 data) | |||
39 | u32 size = dma1 + 1; | 41 | u32 size = dma1 + 1; |
40 | 42 | ||
41 | /* only allow linear DMA objects */ | 43 | /* only allow linear DMA objects */ |
42 | if (!(dma0 & 0x00002000)) | 44 | if (!(dma0 & 0x00002000)) { |
45 | nvkm_error(subdev, "inst %08x dma0 %08x dma1 %08x dma2 %08x\n", | ||
46 | inst, dma0, dma1, dma2); | ||
43 | return false; | 47 | return false; |
48 | } | ||
44 | 49 | ||
45 | if (mthd == 0x0190) { | 50 | if (mthd == 0x0190) { |
46 | /* DMA_CMD */ | 51 | /* DMA_CMD */ |
diff --git a/drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue.c b/drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue.c index d45d7947a964..77273b53672c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue.c +++ b/drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue.c | |||
@@ -251,7 +251,7 @@ cmd_write(struct nvkm_msgqueue *priv, struct nvkm_msgqueue_hdr *cmd, | |||
251 | struct nvkm_msgqueue_queue *queue) | 251 | struct nvkm_msgqueue_queue *queue) |
252 | { | 252 | { |
253 | const struct nvkm_subdev *subdev = priv->falcon->owner; | 253 | const struct nvkm_subdev *subdev = priv->falcon->owner; |
254 | static unsigned long timeout = ~0; | 254 | static unsigned timeout = 2000; |
255 | unsigned long end_jiffies = jiffies + msecs_to_jiffies(timeout); | 255 | unsigned long end_jiffies = jiffies + msecs_to_jiffies(timeout); |
256 | int ret = -EAGAIN; | 256 | int ret = -EAGAIN; |
257 | bool commit = true; | 257 | bool commit = true; |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c index 6d8f21290aa2..676c167c95b9 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include "gf100.h" | 24 | #include "gf100.h" |
25 | 25 | ||
26 | #include <core/gpuobj.h> | 26 | #include <core/gpuobj.h> |
27 | #include <core/option.h> | ||
27 | #include <subdev/fb.h> | 28 | #include <subdev/fb.h> |
28 | #include <subdev/mmu.h> | 29 | #include <subdev/mmu.h> |
29 | 30 | ||
@@ -59,6 +60,8 @@ gf100_bar_ctor_vm(struct gf100_bar *bar, struct gf100_bar_vm *bar_vm, | |||
59 | return ret; | 60 | return ret; |
60 | 61 | ||
61 | bar_len = device->func->resource_size(device, bar_nr); | 62 | bar_len = device->func->resource_size(device, bar_nr); |
63 | if (bar_nr == 3 && bar->bar2_halve) | ||
64 | bar_len >>= 1; | ||
62 | 65 | ||
63 | ret = nvkm_vm_new(device, 0, bar_len, 0, key, &vm); | 66 | ret = nvkm_vm_new(device, 0, bar_len, 0, key, &vm); |
64 | if (ret) | 67 | if (ret) |
@@ -129,6 +132,8 @@ gf100_bar_init(struct nvkm_bar *base) | |||
129 | 132 | ||
130 | if (bar->bar[0].mem) { | 133 | if (bar->bar[0].mem) { |
131 | addr = nvkm_memory_addr(bar->bar[0].mem) >> 12; | 134 | addr = nvkm_memory_addr(bar->bar[0].mem) >> 12; |
135 | if (bar->bar2_halve) | ||
136 | addr |= 0x40000000; | ||
132 | nvkm_wr32(device, 0x001714, 0x80000000 | addr); | 137 | nvkm_wr32(device, 0x001714, 0x80000000 | addr); |
133 | } | 138 | } |
134 | 139 | ||
@@ -161,6 +166,7 @@ gf100_bar_new_(const struct nvkm_bar_func *func, struct nvkm_device *device, | |||
161 | if (!(bar = kzalloc(sizeof(*bar), GFP_KERNEL))) | 166 | if (!(bar = kzalloc(sizeof(*bar), GFP_KERNEL))) |
162 | return -ENOMEM; | 167 | return -ENOMEM; |
163 | nvkm_bar_ctor(func, device, index, &bar->base); | 168 | nvkm_bar_ctor(func, device, index, &bar->base); |
169 | bar->bar2_halve = nvkm_boolopt(device->cfgopt, "NvBar2Halve", false); | ||
164 | *pbar = &bar->base; | 170 | *pbar = &bar->base; |
165 | return 0; | 171 | return 0; |
166 | } | 172 | } |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.h b/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.h index f7dea69640d8..20a5255362ba 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.h +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.h | |||
@@ -11,6 +11,7 @@ struct gf100_bar_vm { | |||
11 | 11 | ||
12 | struct gf100_bar { | 12 | struct gf100_bar { |
13 | struct nvkm_bar base; | 13 | struct nvkm_bar base; |
14 | bool bar2_halve; | ||
14 | struct gf100_bar_vm bar[2]; | 15 | struct gf100_bar_vm bar[2]; |
15 | }; | 16 | }; |
16 | 17 | ||
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf100.c index 3841ad6be99e..a239e73562c8 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf100.c | |||
@@ -60,12 +60,12 @@ gf100_fb_oneinit(struct nvkm_fb *base) | |||
60 | size = min(size, 0x1000); | 60 | size = min(size, 0x1000); |
61 | 61 | ||
62 | ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, size, 0x1000, | 62 | ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, size, 0x1000, |
63 | false, &fb->base.mmu_rd); | 63 | true, &fb->base.mmu_rd); |
64 | if (ret) | 64 | if (ret) |
65 | return ret; | 65 | return ret; |
66 | 66 | ||
67 | ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, size, 0x1000, | 67 | ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, size, 0x1000, |
68 | false, &fb->base.mmu_wr); | 68 | true, &fb->base.mmu_wr); |
69 | if (ret) | 69 | if (ret) |
70 | return ret; | 70 | return ret; |
71 | 71 | ||
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c index d2c4d6033abb..f93766418056 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c | |||
@@ -27,6 +27,7 @@ static const struct nvkm_mc_map | |||
27 | gf100_mc_reset[] = { | 27 | gf100_mc_reset[] = { |
28 | { 0x00020000, NVKM_ENGINE_MSPDEC }, | 28 | { 0x00020000, NVKM_ENGINE_MSPDEC }, |
29 | { 0x00008000, NVKM_ENGINE_MSVLD }, | 29 | { 0x00008000, NVKM_ENGINE_MSVLD }, |
30 | { 0x00002000, NVKM_SUBDEV_PMU, true }, | ||
30 | { 0x00001000, NVKM_ENGINE_GR }, | 31 | { 0x00001000, NVKM_ENGINE_GR }, |
31 | { 0x00000100, NVKM_ENGINE_FIFO }, | 32 | { 0x00000100, NVKM_ENGINE_FIFO }, |
32 | { 0x00000080, NVKM_ENGINE_CE1 }, | 33 | { 0x00000080, NVKM_ENGINE_CE1 }, |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.c index eb9b278198b2..a4cb82495cee 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.c | |||
@@ -192,6 +192,10 @@ nvkm_pci_new_(const struct nvkm_pci_func *func, struct nvkm_device *device, | |||
192 | } | 192 | } |
193 | } | 193 | } |
194 | 194 | ||
195 | #ifdef __BIG_ENDIAN | ||
196 | pci->msi = false; | ||
197 | #endif | ||
198 | |||
195 | pci->msi = nvkm_boolopt(device->cfgopt, "NvMSI", pci->msi); | 199 | pci->msi = nvkm_boolopt(device->cfgopt, "NvMSI", pci->msi); |
196 | if (pci->msi && func->msi_rearm) { | 200 | if (pci->msi && func->msi_rearm) { |
197 | pci->msi = pci_enable_msi(pci->pdev) == 0; | 201 | pci->msi = pci_enable_msi(pci->pdev) == 0; |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/base.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/base.c index 3306f9fe7140..ce70a193caa7 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/base.c | |||
@@ -75,7 +75,7 @@ nvkm_pmu_reset(struct nvkm_pmu *pmu) | |||
75 | { | 75 | { |
76 | struct nvkm_device *device = pmu->subdev.device; | 76 | struct nvkm_device *device = pmu->subdev.device; |
77 | 77 | ||
78 | if (!(nvkm_rd32(device, 0x000200) & 0x00002000)) | 78 | if (!pmu->func->enabled(pmu)) |
79 | return 0; | 79 | return 0; |
80 | 80 | ||
81 | /* Inhibit interrupts, and wait for idle. */ | 81 | /* Inhibit interrupts, and wait for idle. */ |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gf100.c index 0e36d4cb7201..0b458656e870 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gf100.c | |||
@@ -24,13 +24,30 @@ | |||
24 | #include "priv.h" | 24 | #include "priv.h" |
25 | #include "fuc/gf100.fuc3.h" | 25 | #include "fuc/gf100.fuc3.h" |
26 | 26 | ||
27 | #include <subdev/mc.h> | ||
28 | |||
29 | void | ||
30 | gf100_pmu_reset(struct nvkm_pmu *pmu) | ||
31 | { | ||
32 | struct nvkm_device *device = pmu->subdev.device; | ||
33 | nvkm_mc_disable(device, NVKM_SUBDEV_PMU); | ||
34 | nvkm_mc_enable(device, NVKM_SUBDEV_PMU); | ||
35 | } | ||
36 | |||
37 | bool | ||
38 | gf100_pmu_enabled(struct nvkm_pmu *pmu) | ||
39 | { | ||
40 | return nvkm_mc_enabled(pmu->subdev.device, NVKM_SUBDEV_PMU); | ||
41 | } | ||
42 | |||
27 | static const struct nvkm_pmu_func | 43 | static const struct nvkm_pmu_func |
28 | gf100_pmu = { | 44 | gf100_pmu = { |
29 | .code.data = gf100_pmu_code, | 45 | .code.data = gf100_pmu_code, |
30 | .code.size = sizeof(gf100_pmu_code), | 46 | .code.size = sizeof(gf100_pmu_code), |
31 | .data.data = gf100_pmu_data, | 47 | .data.data = gf100_pmu_data, |
32 | .data.size = sizeof(gf100_pmu_data), | 48 | .data.size = sizeof(gf100_pmu_data), |
33 | .reset = gt215_pmu_reset, | 49 | .enabled = gf100_pmu_enabled, |
50 | .reset = gf100_pmu_reset, | ||
34 | .init = gt215_pmu_init, | 51 | .init = gt215_pmu_init, |
35 | .fini = gt215_pmu_fini, | 52 | .fini = gt215_pmu_fini, |
36 | .intr = gt215_pmu_intr, | 53 | .intr = gt215_pmu_intr, |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gf119.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gf119.c index 0e4ba4248b15..3dfa79d4fb13 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gf119.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gf119.c | |||
@@ -30,7 +30,8 @@ gf119_pmu = { | |||
30 | .code.size = sizeof(gf119_pmu_code), | 30 | .code.size = sizeof(gf119_pmu_code), |
31 | .data.data = gf119_pmu_data, | 31 | .data.data = gf119_pmu_data, |
32 | .data.size = sizeof(gf119_pmu_data), | 32 | .data.size = sizeof(gf119_pmu_data), |
33 | .reset = gt215_pmu_reset, | 33 | .enabled = gf100_pmu_enabled, |
34 | .reset = gf100_pmu_reset, | ||
34 | .init = gt215_pmu_init, | 35 | .init = gt215_pmu_init, |
35 | .fini = gt215_pmu_fini, | 36 | .fini = gt215_pmu_fini, |
36 | .intr = gt215_pmu_intr, | 37 | .intr = gt215_pmu_intr, |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk104.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk104.c index 2ad858d825ac..8f7ec10fd2a4 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk104.c | |||
@@ -109,7 +109,8 @@ gk104_pmu = { | |||
109 | .code.size = sizeof(gk104_pmu_code), | 109 | .code.size = sizeof(gk104_pmu_code), |
110 | .data.data = gk104_pmu_data, | 110 | .data.data = gk104_pmu_data, |
111 | .data.size = sizeof(gk104_pmu_data), | 111 | .data.size = sizeof(gk104_pmu_data), |
112 | .reset = gt215_pmu_reset, | 112 | .enabled = gf100_pmu_enabled, |
113 | .reset = gf100_pmu_reset, | ||
113 | .init = gt215_pmu_init, | 114 | .init = gt215_pmu_init, |
114 | .fini = gt215_pmu_fini, | 115 | .fini = gt215_pmu_fini, |
115 | .intr = gt215_pmu_intr, | 116 | .intr = gt215_pmu_intr, |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk110.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk110.c index fc4b8ecfdaeb..345741d55a56 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk110.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk110.c | |||
@@ -88,7 +88,8 @@ gk110_pmu = { | |||
88 | .code.size = sizeof(gk110_pmu_code), | 88 | .code.size = sizeof(gk110_pmu_code), |
89 | .data.data = gk110_pmu_data, | 89 | .data.data = gk110_pmu_data, |
90 | .data.size = sizeof(gk110_pmu_data), | 90 | .data.size = sizeof(gk110_pmu_data), |
91 | .reset = gt215_pmu_reset, | 91 | .enabled = gf100_pmu_enabled, |
92 | .reset = gf100_pmu_reset, | ||
92 | .init = gt215_pmu_init, | 93 | .init = gt215_pmu_init, |
93 | .fini = gt215_pmu_fini, | 94 | .fini = gt215_pmu_fini, |
94 | .intr = gt215_pmu_intr, | 95 | .intr = gt215_pmu_intr, |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk208.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk208.c index e9a91277683a..e4acf7876ea1 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk208.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk208.c | |||
@@ -30,7 +30,8 @@ gk208_pmu = { | |||
30 | .code.size = sizeof(gk208_pmu_code), | 30 | .code.size = sizeof(gk208_pmu_code), |
31 | .data.data = gk208_pmu_data, | 31 | .data.data = gk208_pmu_data, |
32 | .data.size = sizeof(gk208_pmu_data), | 32 | .data.size = sizeof(gk208_pmu_data), |
33 | .reset = gt215_pmu_reset, | 33 | .enabled = gf100_pmu_enabled, |
34 | .reset = gf100_pmu_reset, | ||
34 | .init = gt215_pmu_init, | 35 | .init = gt215_pmu_init, |
35 | .fini = gt215_pmu_fini, | 36 | .fini = gt215_pmu_fini, |
36 | .intr = gt215_pmu_intr, | 37 | .intr = gt215_pmu_intr, |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c index 978aae3c1001..05e81855c367 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c | |||
@@ -196,9 +196,10 @@ gk20a_dvfs_data= { | |||
196 | 196 | ||
197 | static const struct nvkm_pmu_func | 197 | static const struct nvkm_pmu_func |
198 | gk20a_pmu = { | 198 | gk20a_pmu = { |
199 | .enabled = gf100_pmu_enabled, | ||
199 | .init = gk20a_pmu_init, | 200 | .init = gk20a_pmu_init, |
200 | .fini = gk20a_pmu_fini, | 201 | .fini = gk20a_pmu_fini, |
201 | .reset = gt215_pmu_reset, | 202 | .reset = gf100_pmu_reset, |
202 | }; | 203 | }; |
203 | 204 | ||
204 | int | 205 | int |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm107.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm107.c index 9a248ed75f09..459df1ef9e70 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm107.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm107.c | |||
@@ -32,7 +32,8 @@ gm107_pmu = { | |||
32 | .code.size = sizeof(gm107_pmu_code), | 32 | .code.size = sizeof(gm107_pmu_code), |
33 | .data.data = gm107_pmu_data, | 33 | .data.data = gm107_pmu_data, |
34 | .data.size = sizeof(gm107_pmu_data), | 34 | .data.size = sizeof(gm107_pmu_data), |
35 | .reset = gt215_pmu_reset, | 35 | .enabled = gf100_pmu_enabled, |
36 | .reset = gf100_pmu_reset, | ||
36 | .init = gt215_pmu_init, | 37 | .init = gt215_pmu_init, |
37 | .fini = gt215_pmu_fini, | 38 | .fini = gt215_pmu_fini, |
38 | .intr = gt215_pmu_intr, | 39 | .intr = gt215_pmu_intr, |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c index 44bef22bce52..31c843145c7a 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c | |||
@@ -38,6 +38,7 @@ gm20b_pmu_recv(struct nvkm_pmu *pmu) | |||
38 | 38 | ||
39 | static const struct nvkm_pmu_func | 39 | static const struct nvkm_pmu_func |
40 | gm20b_pmu = { | 40 | gm20b_pmu = { |
41 | .enabled = gf100_pmu_enabled, | ||
41 | .intr = gt215_pmu_intr, | 42 | .intr = gt215_pmu_intr, |
42 | .recv = gm20b_pmu_recv, | 43 | .recv = gm20b_pmu_recv, |
43 | }; | 44 | }; |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp100.c index 6c41c20c85a7..e210cd6af816 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp100.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp100.c | |||
@@ -25,7 +25,8 @@ | |||
25 | 25 | ||
26 | static const struct nvkm_pmu_func | 26 | static const struct nvkm_pmu_func |
27 | gp100_pmu = { | 27 | gp100_pmu = { |
28 | .reset = gt215_pmu_reset, | 28 | .enabled = gf100_pmu_enabled, |
29 | .reset = gf100_pmu_reset, | ||
29 | }; | 30 | }; |
30 | 31 | ||
31 | int | 32 | int |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp102.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp102.c index f017352206c9..98c7a2a8afc4 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp102.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp102.c | |||
@@ -31,8 +31,15 @@ gp102_pmu_reset(struct nvkm_pmu *pmu) | |||
31 | nvkm_mask(device, 0x10a3c0, 0x00000001, 0x00000000); | 31 | nvkm_mask(device, 0x10a3c0, 0x00000001, 0x00000000); |
32 | } | 32 | } |
33 | 33 | ||
34 | static bool | ||
35 | gp102_pmu_enabled(struct nvkm_pmu *pmu) | ||
36 | { | ||
37 | return !(nvkm_rd32(pmu->subdev.device, 0x10a3c0) & 0x00000001); | ||
38 | } | ||
39 | |||
34 | static const struct nvkm_pmu_func | 40 | static const struct nvkm_pmu_func |
35 | gp102_pmu = { | 41 | gp102_pmu = { |
42 | .enabled = gp102_pmu_enabled, | ||
36 | .reset = gp102_pmu_reset, | 43 | .reset = gp102_pmu_reset, |
37 | }; | 44 | }; |
38 | 45 | ||
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gt215.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gt215.c index 90d428b3be97..e04216daea58 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gt215.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gt215.c | |||
@@ -180,13 +180,19 @@ gt215_pmu_fini(struct nvkm_pmu *pmu) | |||
180 | nvkm_wr32(pmu->subdev.device, 0x10a014, 0x00000060); | 180 | nvkm_wr32(pmu->subdev.device, 0x10a014, 0x00000060); |
181 | } | 181 | } |
182 | 182 | ||
183 | void | 183 | static void |
184 | gt215_pmu_reset(struct nvkm_pmu *pmu) | 184 | gt215_pmu_reset(struct nvkm_pmu *pmu) |
185 | { | 185 | { |
186 | struct nvkm_device *device = pmu->subdev.device; | 186 | struct nvkm_device *device = pmu->subdev.device; |
187 | nvkm_mask(device, 0x000200, 0x00002000, 0x00000000); | 187 | nvkm_mask(device, 0x022210, 0x00000001, 0x00000000); |
188 | nvkm_mask(device, 0x000200, 0x00002000, 0x00002000); | 188 | nvkm_mask(device, 0x022210, 0x00000001, 0x00000001); |
189 | nvkm_rd32(device, 0x000200); | 189 | nvkm_rd32(device, 0x022210); |
190 | } | ||
191 | |||
192 | static bool | ||
193 | gt215_pmu_enabled(struct nvkm_pmu *pmu) | ||
194 | { | ||
195 | return nvkm_rd32(pmu->subdev.device, 0x022210) & 0x00000001; | ||
190 | } | 196 | } |
191 | 197 | ||
192 | int | 198 | int |
@@ -241,6 +247,7 @@ gt215_pmu = { | |||
241 | .code.size = sizeof(gt215_pmu_code), | 247 | .code.size = sizeof(gt215_pmu_code), |
242 | .data.data = gt215_pmu_data, | 248 | .data.data = gt215_pmu_data, |
243 | .data.size = sizeof(gt215_pmu_data), | 249 | .data.size = sizeof(gt215_pmu_data), |
250 | .enabled = gt215_pmu_enabled, | ||
244 | .reset = gt215_pmu_reset, | 251 | .reset = gt215_pmu_reset, |
245 | .init = gt215_pmu_init, | 252 | .init = gt215_pmu_init, |
246 | .fini = gt215_pmu_fini, | 253 | .fini = gt215_pmu_fini, |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/priv.h b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/priv.h index 096cba069f72..a4c48a10cd47 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/priv.h +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/priv.h | |||
@@ -20,6 +20,7 @@ struct nvkm_pmu_func { | |||
20 | u32 size; | 20 | u32 size; |
21 | } data; | 21 | } data; |
22 | 22 | ||
23 | bool (*enabled)(struct nvkm_pmu *); | ||
23 | void (*reset)(struct nvkm_pmu *); | 24 | void (*reset)(struct nvkm_pmu *); |
24 | int (*init)(struct nvkm_pmu *); | 25 | int (*init)(struct nvkm_pmu *); |
25 | void (*fini)(struct nvkm_pmu *); | 26 | void (*fini)(struct nvkm_pmu *); |
@@ -30,12 +31,14 @@ struct nvkm_pmu_func { | |||
30 | void (*pgob)(struct nvkm_pmu *, bool); | 31 | void (*pgob)(struct nvkm_pmu *, bool); |
31 | }; | 32 | }; |
32 | 33 | ||
33 | void gt215_pmu_reset(struct nvkm_pmu *); | ||
34 | int gt215_pmu_init(struct nvkm_pmu *); | 34 | int gt215_pmu_init(struct nvkm_pmu *); |
35 | void gt215_pmu_fini(struct nvkm_pmu *); | 35 | void gt215_pmu_fini(struct nvkm_pmu *); |
36 | void gt215_pmu_intr(struct nvkm_pmu *); | 36 | void gt215_pmu_intr(struct nvkm_pmu *); |
37 | void gt215_pmu_recv(struct nvkm_pmu *); | 37 | void gt215_pmu_recv(struct nvkm_pmu *); |
38 | int gt215_pmu_send(struct nvkm_pmu *, u32[2], u32, u32, u32, u32); | 38 | int gt215_pmu_send(struct nvkm_pmu *, u32[2], u32, u32, u32, u32); |
39 | 39 | ||
40 | bool gf100_pmu_enabled(struct nvkm_pmu *); | ||
41 | void gf100_pmu_reset(struct nvkm_pmu *); | ||
42 | |||
40 | void gk110_pmu_pgob(struct nvkm_pmu *, bool); | 43 | void gk110_pmu_pgob(struct nvkm_pmu *, bool); |
41 | #endif | 44 | #endif |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/Kbuild b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/Kbuild index 135758ba3e28..2bafcc1d1818 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/Kbuild +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/Kbuild | |||
@@ -11,3 +11,4 @@ nvkm-y += nvkm/subdev/therm/g84.o | |||
11 | nvkm-y += nvkm/subdev/therm/gt215.o | 11 | nvkm-y += nvkm/subdev/therm/gt215.o |
12 | nvkm-y += nvkm/subdev/therm/gf119.o | 12 | nvkm-y += nvkm/subdev/therm/gf119.o |
13 | nvkm-y += nvkm/subdev/therm/gm107.o | 13 | nvkm-y += nvkm/subdev/therm/gm107.o |
14 | nvkm-y += nvkm/subdev/therm/gm200.o | ||
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c index 86e81930d8ee..96f8da40ac82 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c | |||
@@ -203,7 +203,7 @@ g84_therm_fini(struct nvkm_therm *therm) | |||
203 | nvkm_wr32(device, 0x1100, 0x10000); /* PBUS */ | 203 | nvkm_wr32(device, 0x1100, 0x10000); /* PBUS */ |
204 | } | 204 | } |
205 | 205 | ||
206 | static void | 206 | void |
207 | g84_therm_init(struct nvkm_therm *therm) | 207 | g84_therm_init(struct nvkm_therm *therm) |
208 | { | 208 | { |
209 | g84_sensor_setup(therm); | 209 | g84_sensor_setup(therm); |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gm200.c b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gm200.c new file mode 100644 index 000000000000..73dc78093d5d --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gm200.c | |||
@@ -0,0 +1,39 @@ | |||
1 | /* | ||
2 | * Copyright 2017 Karol Herbst | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | ||
20 | * OTHER DEALINGS IN THE SOFTWARE. | ||
21 | * | ||
22 | * Authors: Karol Herbst | ||
23 | */ | ||
24 | #include "priv.h" | ||
25 | |||
26 | static const struct nvkm_therm_func | ||
27 | gm200_therm = { | ||
28 | .init = g84_therm_init, | ||
29 | .fini = g84_therm_fini, | ||
30 | .temp_get = g84_temp_get, | ||
31 | .program_alarms = nvkm_therm_program_alarms_polling, | ||
32 | }; | ||
33 | |||
34 | int | ||
35 | gm200_therm_new(struct nvkm_device *device, int index, | ||
36 | struct nvkm_therm **ptherm) | ||
37 | { | ||
38 | return nvkm_therm_new_(&gm200_therm, device, index, ptherm); | ||
39 | } | ||
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/priv.h b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/priv.h index 235a5d8daff6..1f46e371d7c4 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/priv.h +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/priv.h | |||
@@ -111,6 +111,7 @@ void g84_therm_fini(struct nvkm_therm *); | |||
111 | 111 | ||
112 | int gt215_therm_fan_sense(struct nvkm_therm *); | 112 | int gt215_therm_fan_sense(struct nvkm_therm *); |
113 | 113 | ||
114 | void g84_therm_init(struct nvkm_therm *); | ||
114 | void gf119_therm_init(struct nvkm_therm *); | 115 | void gf119_therm_init(struct nvkm_therm *); |
115 | 116 | ||
116 | int nvkm_fanpwm_create(struct nvkm_therm *, struct dcb_gpio_func *); | 117 | int nvkm_fanpwm_create(struct nvkm_therm *, struct dcb_gpio_func *); |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/temp.c b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/temp.c index e93b2410c38b..ddb2b2c600ca 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/temp.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/temp.c | |||
@@ -83,7 +83,7 @@ nvkm_therm_sensor_event(struct nvkm_therm *therm, enum nvkm_therm_thrs thrs, | |||
83 | { | 83 | { |
84 | struct nvkm_subdev *subdev = &therm->subdev; | 84 | struct nvkm_subdev *subdev = &therm->subdev; |
85 | bool active; | 85 | bool active; |
86 | const char *thresolds[] = { | 86 | static const char * const thresholds[] = { |
87 | "fanboost", "downclock", "critical", "shutdown" | 87 | "fanboost", "downclock", "critical", "shutdown" |
88 | }; | 88 | }; |
89 | int temperature = therm->func->temp_get(therm); | 89 | int temperature = therm->func->temp_get(therm); |
@@ -94,10 +94,10 @@ nvkm_therm_sensor_event(struct nvkm_therm *therm, enum nvkm_therm_thrs thrs, | |||
94 | if (dir == NVKM_THERM_THRS_FALLING) | 94 | if (dir == NVKM_THERM_THRS_FALLING) |
95 | nvkm_info(subdev, | 95 | nvkm_info(subdev, |
96 | "temperature (%i C) went below the '%s' threshold\n", | 96 | "temperature (%i C) went below the '%s' threshold\n", |
97 | temperature, thresolds[thrs]); | 97 | temperature, thresholds[thrs]); |
98 | else | 98 | else |
99 | nvkm_info(subdev, "temperature (%i C) hit the '%s' threshold\n", | 99 | nvkm_info(subdev, "temperature (%i C) hit the '%s' threshold\n", |
100 | temperature, thresolds[thrs]); | 100 | temperature, thresholds[thrs]); |
101 | 101 | ||
102 | active = (dir == NVKM_THERM_THRS_RISING); | 102 | active = (dir == NVKM_THERM_THRS_RISING); |
103 | switch (thrs) { | 103 | switch (thrs) { |