diff options
author | William Breathitt Gray <vilhelm.gray@gmail.com> | 2017-01-30 13:32:58 -0500 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2017-02-01 10:02:50 -0500 |
commit | 7bdba73effe286fd607da9bb7448dd07a4452a33 (patch) | |
tree | b31c5116ad3a99fba5b88219b610c879783ad3f7 | |
parent | 9e1b487bb494f1fd45ce4952aa665ba1611d34b4 (diff) |
gpio: 104-dio-48e: Add support for GPIO names
This patch sets the gpio_chip names option with an array of GPIO line
names that match the manual documentation for the ACCES 104-DIO-48E.
This should make it easier for users to identify which GPIO line
corresponds to a respective GPIO pin on the device.
Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r-- | drivers/gpio/gpio-104-dio-48e.c | 23 |
1 files changed, 22 insertions, 1 deletions
diff --git a/drivers/gpio/gpio-104-dio-48e.c b/drivers/gpio/gpio-104-dio-48e.c index b6b0378166c4..17bd2ab4ebe2 100644 --- a/drivers/gpio/gpio-104-dio-48e.c +++ b/drivers/gpio/gpio-104-dio-48e.c | |||
@@ -338,6 +338,26 @@ static irqreturn_t dio48e_irq_handler(int irq, void *dev_id) | |||
338 | return IRQ_HANDLED; | 338 | return IRQ_HANDLED; |
339 | } | 339 | } |
340 | 340 | ||
341 | #define DIO48E_NGPIO 48 | ||
342 | static const char *dio48e_names[DIO48E_NGPIO] = { | ||
343 | "PPI Group 0 Port A 0", "PPI Group 0 Port A 1", "PPI Group 0 Port A 2", | ||
344 | "PPI Group 0 Port A 3", "PPI Group 0 Port A 4", "PPI Group 0 Port A 5", | ||
345 | "PPI Group 0 Port A 6", "PPI Group 0 Port A 7", "PPI Group 0 Port B 0", | ||
346 | "PPI Group 0 Port B 1", "PPI Group 0 Port B 2", "PPI Group 0 Port B 3", | ||
347 | "PPI Group 0 Port B 4", "PPI Group 0 Port B 5", "PPI Group 0 Port B 6", | ||
348 | "PPI Group 0 Port B 7", "PPI Group 0 Port C 0", "PPI Group 0 Port C 1", | ||
349 | "PPI Group 0 Port C 2", "PPI Group 0 Port C 3", "PPI Group 0 Port C 4", | ||
350 | "PPI Group 0 Port C 5", "PPI Group 0 Port C 6", "PPI Group 0 Port C 7", | ||
351 | "PPI Group 1 Port A 0", "PPI Group 1 Port A 1", "PPI Group 1 Port A 2", | ||
352 | "PPI Group 1 Port A 3", "PPI Group 1 Port A 4", "PPI Group 1 Port A 5", | ||
353 | "PPI Group 1 Port A 6", "PPI Group 1 Port A 7", "PPI Group 1 Port B 0", | ||
354 | "PPI Group 1 Port B 1", "PPI Group 1 Port B 2", "PPI Group 1 Port B 3", | ||
355 | "PPI Group 1 Port B 4", "PPI Group 1 Port B 5", "PPI Group 1 Port B 6", | ||
356 | "PPI Group 1 Port B 7", "PPI Group 1 Port C 0", "PPI Group 1 Port C 1", | ||
357 | "PPI Group 1 Port C 2", "PPI Group 1 Port C 3", "PPI Group 1 Port C 4", | ||
358 | "PPI Group 1 Port C 5", "PPI Group 1 Port C 6", "PPI Group 1 Port C 7" | ||
359 | }; | ||
360 | |||
341 | static int dio48e_probe(struct device *dev, unsigned int id) | 361 | static int dio48e_probe(struct device *dev, unsigned int id) |
342 | { | 362 | { |
343 | struct dio48e_gpio *dio48egpio; | 363 | struct dio48e_gpio *dio48egpio; |
@@ -358,7 +378,8 @@ static int dio48e_probe(struct device *dev, unsigned int id) | |||
358 | dio48egpio->chip.parent = dev; | 378 | dio48egpio->chip.parent = dev; |
359 | dio48egpio->chip.owner = THIS_MODULE; | 379 | dio48egpio->chip.owner = THIS_MODULE; |
360 | dio48egpio->chip.base = -1; | 380 | dio48egpio->chip.base = -1; |
361 | dio48egpio->chip.ngpio = 48; | 381 | dio48egpio->chip.ngpio = DIO48E_NGPIO; |
382 | dio48egpio->chip.names = dio48e_names; | ||
362 | dio48egpio->chip.get_direction = dio48e_gpio_get_direction; | 383 | dio48egpio->chip.get_direction = dio48e_gpio_get_direction; |
363 | dio48egpio->chip.direction_input = dio48e_gpio_direction_input; | 384 | dio48egpio->chip.direction_input = dio48e_gpio_direction_input; |
364 | dio48egpio->chip.direction_output = dio48e_gpio_direction_output; | 385 | dio48egpio->chip.direction_output = dio48e_gpio_direction_output; |