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authorAndrzej Hajda <a.hajda@samsung.com>2015-10-20 05:22:38 -0400
committerInki Dae <inki.dae@samsung.com>2015-11-02 21:46:37 -0500
commit7b6bb6ed01e9f9c20c86b722c733d7219c4c55f6 (patch)
tree00c77f5351ed25da9dfa0a241810eefd357de9ad
parentb219207385dbd575ebd7e1cbf560636c8e780467 (diff)
drm/exynos/decon5433: merge different flag fields
Driver uses four different fields for internal flags. They can be merged into one. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
-rw-r--r--drivers/gpu/drm/exynos/exynos5433_drm_decon.c61
1 files changed, 30 insertions, 31 deletions
diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index 722c11a0a5ee..265a77f5dece 100644
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -37,6 +37,13 @@ static const char * const decon_clks_name[] = {
37 "sclk_decon_eclk", 37 "sclk_decon_eclk",
38}; 38};
39 39
40enum decon_flag_bits {
41 BIT_CLKS_ENABLED,
42 BIT_IRQS_ENABLED,
43 BIT_WIN_UPDATED,
44 BIT_SUSPENDED
45};
46
40struct decon_context { 47struct decon_context {
41 struct device *dev; 48 struct device *dev;
42 struct drm_device *drm_dev; 49 struct drm_device *drm_dev;
@@ -44,15 +51,9 @@ struct decon_context {
44 struct exynos_drm_plane planes[WINDOWS_NR]; 51 struct exynos_drm_plane planes[WINDOWS_NR];
45 void __iomem *addr; 52 void __iomem *addr;
46 struct clk *clks[ARRAY_SIZE(decon_clks_name)]; 53 struct clk *clks[ARRAY_SIZE(decon_clks_name)];
47 unsigned long irq_flags;
48 int pipe; 54 int pipe;
49 bool suspended; 55 unsigned long flags;
50
51#define BIT_CLKS_ENABLED 0
52#define BIT_IRQS_ENABLED 1
53 unsigned long enabled;
54 bool i80_if; 56 bool i80_if;
55 atomic_t win_updated;
56}; 57};
57 58
58static const uint32_t decon_formats[] = { 59static const uint32_t decon_formats[] = {
@@ -74,10 +75,10 @@ static int decon_enable_vblank(struct exynos_drm_crtc *crtc)
74 struct decon_context *ctx = crtc->ctx; 75 struct decon_context *ctx = crtc->ctx;
75 u32 val; 76 u32 val;
76 77
77 if (ctx->suspended) 78 if (test_bit(BIT_SUSPENDED, &ctx->flags))
78 return -EPERM; 79 return -EPERM;
79 80
80 if (test_and_set_bit(0, &ctx->irq_flags)) { 81 if (test_and_set_bit(BIT_IRQS_ENABLED, &ctx->flags)) {
81 val = VIDINTCON0_INTEN; 82 val = VIDINTCON0_INTEN;
82 if (ctx->i80_if) 83 if (ctx->i80_if)
83 val |= VIDINTCON0_FRAMEDONE; 84 val |= VIDINTCON0_FRAMEDONE;
@@ -94,10 +95,10 @@ static void decon_disable_vblank(struct exynos_drm_crtc *crtc)
94{ 95{
95 struct decon_context *ctx = crtc->ctx; 96 struct decon_context *ctx = crtc->ctx;
96 97
97 if (ctx->suspended) 98 if (test_bit(BIT_SUSPENDED, &ctx->flags))
98 return; 99 return;
99 100
100 if (test_and_clear_bit(0, &ctx->irq_flags)) 101 if (test_and_clear_bit(BIT_IRQS_ENABLED, &ctx->flags))
101 writel(0, ctx->addr + DECON_VIDINTCON0); 102 writel(0, ctx->addr + DECON_VIDINTCON0);
102} 103}
103 104
@@ -114,7 +115,7 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
114 struct drm_display_mode *m = &crtc->base.mode; 115 struct drm_display_mode *m = &crtc->base.mode;
115 u32 val; 116 u32 val;
116 117
117 if (ctx->suspended) 118 if (test_bit(BIT_SUSPENDED, &ctx->flags))
118 return; 119 return;
119 120
120 /* enable clock gate */ 121 /* enable clock gate */
@@ -231,7 +232,7 @@ static void decon_atomic_begin(struct exynos_drm_crtc *crtc,
231{ 232{
232 struct decon_context *ctx = crtc->ctx; 233 struct decon_context *ctx = crtc->ctx;
233 234
234 if (ctx->suspended) 235 if (test_bit(BIT_SUSPENDED, &ctx->flags))
235 return; 236 return;
236 237
237 decon_shadow_protect_win(ctx, plane->zpos, true); 238 decon_shadow_protect_win(ctx, plane->zpos, true);
@@ -247,7 +248,7 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc,
247 unsigned int pitch = state->fb->pitches[0]; 248 unsigned int pitch = state->fb->pitches[0];
248 u32 val; 249 u32 val;
249 250
250 if (ctx->suspended) 251 if (test_bit(BIT_SUSPENDED, &ctx->flags))
251 return; 252 return;
252 253
253 val = COORDINATE_X(plane->crtc_x) | COORDINATE_Y(plane->crtc_y); 254 val = COORDINATE_X(plane->crtc_x) | COORDINATE_Y(plane->crtc_y);
@@ -289,7 +290,7 @@ static void decon_disable_plane(struct exynos_drm_crtc *crtc,
289 struct decon_context *ctx = crtc->ctx; 290 struct decon_context *ctx = crtc->ctx;
290 unsigned int win = plane->zpos; 291 unsigned int win = plane->zpos;
291 292
292 if (ctx->suspended) 293 if (test_bit(BIT_SUSPENDED, &ctx->flags))
293 return; 294 return;
294 295
295 decon_shadow_protect_win(ctx, win, true); 296 decon_shadow_protect_win(ctx, win, true);
@@ -308,13 +309,13 @@ static void decon_atomic_flush(struct exynos_drm_crtc *crtc,
308{ 309{
309 struct decon_context *ctx = crtc->ctx; 310 struct decon_context *ctx = crtc->ctx;
310 311
311 if (ctx->suspended) 312 if (test_bit(BIT_SUSPENDED, &ctx->flags))
312 return; 313 return;
313 314
314 decon_shadow_protect_win(ctx, plane->zpos, false); 315 decon_shadow_protect_win(ctx, plane->zpos, false);
315 316
316 if (ctx->i80_if) 317 if (ctx->i80_if)
317 atomic_set(&ctx->win_updated, 1); 318 set_bit(BIT_WIN_UPDATED, &ctx->flags);
318} 319}
319 320
320static void decon_swreset(struct decon_context *ctx) 321static void decon_swreset(struct decon_context *ctx)
@@ -346,11 +347,9 @@ static void decon_enable(struct exynos_drm_crtc *crtc)
346 int ret; 347 int ret;
347 int i; 348 int i;
348 349
349 if (!ctx->suspended) 350 if (!test_and_clear_bit(BIT_SUSPENDED, &ctx->flags))
350 return; 351 return;
351 352
352 ctx->suspended = false;
353
354 pm_runtime_get_sync(ctx->dev); 353 pm_runtime_get_sync(ctx->dev);
355 354
356 for (i = 0; i < ARRAY_SIZE(decon_clks_name); i++) { 355 for (i = 0; i < ARRAY_SIZE(decon_clks_name); i++) {
@@ -359,10 +358,10 @@ static void decon_enable(struct exynos_drm_crtc *crtc)
359 goto err; 358 goto err;
360 } 359 }
361 360
362 set_bit(BIT_CLKS_ENABLED, &ctx->enabled); 361 set_bit(BIT_CLKS_ENABLED, &ctx->flags);
363 362
364 /* if vblank was enabled status, enable it again. */ 363 /* if vblank was enabled status, enable it again. */
365 if (test_and_clear_bit(0, &ctx->irq_flags)) 364 if (test_and_clear_bit(BIT_IRQS_ENABLED, &ctx->flags))
366 decon_enable_vblank(ctx->crtc); 365 decon_enable_vblank(ctx->crtc);
367 366
368 decon_commit(ctx->crtc); 367 decon_commit(ctx->crtc);
@@ -372,7 +371,7 @@ err:
372 while (--i >= 0) 371 while (--i >= 0)
373 clk_disable_unprepare(ctx->clks[i]); 372 clk_disable_unprepare(ctx->clks[i]);
374 373
375 ctx->suspended = true; 374 set_bit(BIT_SUSPENDED, &ctx->flags);
376} 375}
377 376
378static void decon_disable(struct exynos_drm_crtc *crtc) 377static void decon_disable(struct exynos_drm_crtc *crtc)
@@ -380,7 +379,7 @@ static void decon_disable(struct exynos_drm_crtc *crtc)
380 struct decon_context *ctx = crtc->ctx; 379 struct decon_context *ctx = crtc->ctx;
381 int i; 380 int i;
382 381
383 if (ctx->suspended) 382 if (test_bit(BIT_SUSPENDED, &ctx->flags))
384 return; 383 return;
385 384
386 /* 385 /*
@@ -396,21 +395,21 @@ static void decon_disable(struct exynos_drm_crtc *crtc)
396 for (i = 0; i < ARRAY_SIZE(decon_clks_name); i++) 395 for (i = 0; i < ARRAY_SIZE(decon_clks_name); i++)
397 clk_disable_unprepare(ctx->clks[i]); 396 clk_disable_unprepare(ctx->clks[i]);
398 397
399 clear_bit(BIT_CLKS_ENABLED, &ctx->enabled); 398 clear_bit(BIT_CLKS_ENABLED, &ctx->flags);
400 399
401 pm_runtime_put_sync(ctx->dev); 400 pm_runtime_put_sync(ctx->dev);
402 401
403 ctx->suspended = true; 402 set_bit(BIT_SUSPENDED, &ctx->flags);
404} 403}
405 404
406void decon_te_irq_handler(struct exynos_drm_crtc *crtc) 405void decon_te_irq_handler(struct exynos_drm_crtc *crtc)
407{ 406{
408 struct decon_context *ctx = crtc->ctx; 407 struct decon_context *ctx = crtc->ctx;
409 408
410 if (!test_bit(BIT_CLKS_ENABLED, &ctx->enabled)) 409 if (!test_bit(BIT_CLKS_ENABLED, &ctx->flags))
411 return; 410 return;
412 411
413 if (atomic_add_unless(&ctx->win_updated, -1, 0)) 412 if (test_and_clear_bit(BIT_WIN_UPDATED, &ctx->flags))
414 decon_set_bits(ctx, DECON_TRIGCON, TRIGCON_SWTRIGCMD, ~0); 413 decon_set_bits(ctx, DECON_TRIGCON, TRIGCON_SWTRIGCMD, ~0);
415 414
416 drm_crtc_handle_vblank(&ctx->crtc->base); 415 drm_crtc_handle_vblank(&ctx->crtc->base);
@@ -520,7 +519,7 @@ static irqreturn_t decon_vsync_irq_handler(int irq, void *dev_id)
520 struct decon_context *ctx = dev_id; 519 struct decon_context *ctx = dev_id;
521 u32 val; 520 u32 val;
522 521
523 if (!test_bit(BIT_CLKS_ENABLED, &ctx->enabled)) 522 if (!test_bit(BIT_CLKS_ENABLED, &ctx->flags))
524 goto out; 523 goto out;
525 524
526 val = readl(ctx->addr + DECON_VIDINTCON1); 525 val = readl(ctx->addr + DECON_VIDINTCON1);
@@ -541,7 +540,7 @@ static irqreturn_t decon_lcd_sys_irq_handler(int irq, void *dev_id)
541 u32 val; 540 u32 val;
542 int win; 541 int win;
543 542
544 if (!test_bit(BIT_CLKS_ENABLED, &ctx->enabled)) 543 if (!test_bit(BIT_CLKS_ENABLED, &ctx->flags))
545 goto out; 544 goto out;
546 545
547 val = readl(ctx->addr + DECON_VIDINTCON1); 546 val = readl(ctx->addr + DECON_VIDINTCON1);
@@ -576,7 +575,7 @@ static int exynos5433_decon_probe(struct platform_device *pdev)
576 if (!ctx) 575 if (!ctx)
577 return -ENOMEM; 576 return -ENOMEM;
578 577
579 ctx->suspended = true; 578 __set_bit(BIT_SUSPENDED, &ctx->flags);
580 ctx->dev = dev; 579 ctx->dev = dev;
581 if (of_get_child_by_name(dev->of_node, "i80-if-timings")) 580 if (of_get_child_by_name(dev->of_node, "i80-if-timings"))
582 ctx->i80_if = true; 581 ctx->i80_if = true;