diff options
author | Caesar Wang <wxt@rock-chips.com> | 2015-12-03 03:48:42 -0500 |
---|---|---|
committer | Eduardo Valentin <edubezval@gmail.com> | 2016-01-06 21:06:38 -0500 |
commit | 7b02a5e782fa151a610c455ac06e5a998e9cb3f3 (patch) | |
tree | a19b4255f00c2f08817aca621b97b8b56720c528 | |
parent | 4be02530fc76b4b01372dc03ab098674bf059f0b (diff) |
thermal: rockchip: Support the RK3228 SoCs in thermal driver
The RK3228 SoCs has one Temperature Sensor, channel 0 is for CPU.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
-rw-r--r-- | drivers/thermal/rockchip_thermal.c | 81 |
1 files changed, 81 insertions, 0 deletions
diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c index ae796eca2ff5..e118e42c0326 100644 --- a/drivers/thermal/rockchip_thermal.c +++ b/drivers/thermal/rockchip_thermal.c | |||
@@ -154,6 +154,7 @@ struct rockchip_thermal_data { | |||
154 | #define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn)) | 154 | #define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn)) |
155 | #define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn)) | 155 | #define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn)) |
156 | 156 | ||
157 | #define TSADCV1_INT_PD_CLEAR_MASK ~BIT(16) | ||
157 | #define TSADCV2_INT_PD_CLEAR_MASK ~BIT(8) | 158 | #define TSADCV2_INT_PD_CLEAR_MASK ~BIT(8) |
158 | 159 | ||
159 | #define TSADCV2_DATA_MASK 0xfff | 160 | #define TSADCV2_DATA_MASK 0xfff |
@@ -169,6 +170,51 @@ struct tsadc_table { | |||
169 | int temp; | 170 | int temp; |
170 | }; | 171 | }; |
171 | 172 | ||
173 | /** | ||
174 | * Note: | ||
175 | * Code to Temperature mapping of the Temperature sensor is a piece wise linear | ||
176 | * curve.Any temperature, code faling between to 2 give temperatures can be | ||
177 | * linearly interpolated. | ||
178 | * Code to Temperature mapping should be updated based on sillcon results. | ||
179 | */ | ||
180 | static const struct tsadc_table v1_code_table[] = { | ||
181 | {TSADCV3_DATA_MASK, -40000}, | ||
182 | {436, -40000}, | ||
183 | {431, -35000}, | ||
184 | {426, -30000}, | ||
185 | {421, -25000}, | ||
186 | {416, -20000}, | ||
187 | {411, -15000}, | ||
188 | {406, -10000}, | ||
189 | {401, -5000}, | ||
190 | {395, 0}, | ||
191 | {390, 5000}, | ||
192 | {385, 10000}, | ||
193 | {380, 15000}, | ||
194 | {375, 20000}, | ||
195 | {370, 25000}, | ||
196 | {364, 30000}, | ||
197 | {359, 35000}, | ||
198 | {354, 40000}, | ||
199 | {349, 45000}, | ||
200 | {343, 50000}, | ||
201 | {338, 55000}, | ||
202 | {333, 60000}, | ||
203 | {328, 65000}, | ||
204 | {322, 70000}, | ||
205 | {317, 75000}, | ||
206 | {312, 80000}, | ||
207 | {307, 85000}, | ||
208 | {301, 90000}, | ||
209 | {296, 95000}, | ||
210 | {291, 100000}, | ||
211 | {286, 105000}, | ||
212 | {280, 110000}, | ||
213 | {275, 115000}, | ||
214 | {270, 120000}, | ||
215 | {264, 125000}, | ||
216 | }; | ||
217 | |||
172 | static const struct tsadc_table v2_code_table[] = { | 218 | static const struct tsadc_table v2_code_table[] = { |
173 | {TSADCV2_DATA_MASK, -40000}, | 219 | {TSADCV2_DATA_MASK, -40000}, |
174 | {3800, -40000}, | 220 | {3800, -40000}, |
@@ -369,6 +415,14 @@ static void rk_tsadcv2_initialize(void __iomem *regs, | |||
369 | regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE); | 415 | regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE); |
370 | } | 416 | } |
371 | 417 | ||
418 | static void rk_tsadcv1_irq_ack(void __iomem *regs) | ||
419 | { | ||
420 | u32 val; | ||
421 | |||
422 | val = readl_relaxed(regs + TSADCV2_INT_PD); | ||
423 | writel_relaxed(val & TSADCV1_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD); | ||
424 | } | ||
425 | |||
372 | static void rk_tsadcv2_irq_ack(void __iomem *regs) | 426 | static void rk_tsadcv2_irq_ack(void __iomem *regs) |
373 | { | 427 | { |
374 | u32 val; | 428 | u32 val; |
@@ -430,6 +484,29 @@ static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs, | |||
430 | writel_relaxed(val, regs + TSADCV2_INT_EN); | 484 | writel_relaxed(val, regs + TSADCV2_INT_EN); |
431 | } | 485 | } |
432 | 486 | ||
487 | static const struct rockchip_tsadc_chip rk3228_tsadc_data = { | ||
488 | .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */ | ||
489 | .chn_num = 1, /* one channel for tsadc */ | ||
490 | |||
491 | .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */ | ||
492 | .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */ | ||
493 | .tshut_temp = 95000, | ||
494 | |||
495 | .initialize = rk_tsadcv2_initialize, | ||
496 | .irq_ack = rk_tsadcv1_irq_ack, | ||
497 | .control = rk_tsadcv2_control, | ||
498 | .get_temp = rk_tsadcv2_get_temp, | ||
499 | .set_tshut_temp = rk_tsadcv2_tshut_temp, | ||
500 | .set_tshut_mode = rk_tsadcv2_tshut_mode, | ||
501 | |||
502 | .table = { | ||
503 | .id = v1_code_table, | ||
504 | .length = ARRAY_SIZE(v1_code_table), | ||
505 | .data_mask = TSADCV3_DATA_MASK, | ||
506 | .mode = ADC_DECREMENT, | ||
507 | }, | ||
508 | }; | ||
509 | |||
433 | static const struct rockchip_tsadc_chip rk3288_tsadc_data = { | 510 | static const struct rockchip_tsadc_chip rk3288_tsadc_data = { |
434 | .chn_id[SENSOR_CPU] = 1, /* cpu sensor is channel 1 */ | 511 | .chn_id[SENSOR_CPU] = 1, /* cpu sensor is channel 1 */ |
435 | .chn_id[SENSOR_GPU] = 2, /* gpu sensor is channel 2 */ | 512 | .chn_id[SENSOR_GPU] = 2, /* gpu sensor is channel 2 */ |
@@ -480,6 +557,10 @@ static const struct rockchip_tsadc_chip rk3368_tsadc_data = { | |||
480 | 557 | ||
481 | static const struct of_device_id of_rockchip_thermal_match[] = { | 558 | static const struct of_device_id of_rockchip_thermal_match[] = { |
482 | { | 559 | { |
560 | .compatible = "rockchip,rk3228-tsadc", | ||
561 | .data = (void *)&rk3228_tsadc_data, | ||
562 | }, | ||
563 | { | ||
483 | .compatible = "rockchip,rk3288-tsadc", | 564 | .compatible = "rockchip,rk3288-tsadc", |
484 | .data = (void *)&rk3288_tsadc_data, | 565 | .data = (void *)&rk3288_tsadc_data, |
485 | }, | 566 | }, |