diff options
author | Dave Airlie <airlied@redhat.com> | 2013-03-24 22:20:00 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2013-03-24 22:20:00 -0400 |
commit | 7ac8833f5920a4a58190743697c9c8920c2fab4e (patch) | |
tree | 74c788686275e1c2d281502eb51f7701f34c4279 | |
parent | ac165b006bd877e240174edecd855d4eb005ffae (diff) | |
parent | b1289371fcd580b4c412e6d05c4cb8ac8d277239 (diff) |
Merge branch 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel into HEAD
Daniel writes:
"Just three revert/disable by default patches, one of them cc: stable
(since the offending commit was cc: stable, too)."
* 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel:
Revert "drm/i915: write backlight harder"
drm/i915: don't disable the power well yet
Revert "drm/i915: set TRANSCODER_EDP even earlier"
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.c | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_panel.c | 13 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 3 |
5 files changed, 19 insertions, 13 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 0a8eceb75902..e9b57893db2b 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c | |||
@@ -125,6 +125,11 @@ MODULE_PARM_DESC(preliminary_hw_support, | |||
125 | "Enable Haswell and ValleyView Support. " | 125 | "Enable Haswell and ValleyView Support. " |
126 | "(default: false)"); | 126 | "(default: false)"); |
127 | 127 | ||
128 | int i915_disable_power_well __read_mostly = 0; | ||
129 | module_param_named(disable_power_well, i915_disable_power_well, int, 0600); | ||
130 | MODULE_PARM_DESC(disable_power_well, | ||
131 | "Disable the power well when possible (default: false)"); | ||
132 | |||
128 | static struct drm_driver driver; | 133 | static struct drm_driver driver; |
129 | extern int intel_agp_enabled; | 134 | extern int intel_agp_enabled; |
130 | 135 | ||
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index e95337c97459..01769e2a9953 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -1398,6 +1398,7 @@ extern int i915_enable_fbc __read_mostly; | |||
1398 | extern bool i915_enable_hangcheck __read_mostly; | 1398 | extern bool i915_enable_hangcheck __read_mostly; |
1399 | extern int i915_enable_ppgtt __read_mostly; | 1399 | extern int i915_enable_ppgtt __read_mostly; |
1400 | extern unsigned int i915_preliminary_hw_support __read_mostly; | 1400 | extern unsigned int i915_preliminary_hw_support __read_mostly; |
1401 | extern int i915_disable_power_well __read_mostly; | ||
1401 | 1402 | ||
1402 | extern int i915_suspend(struct drm_device *dev, pm_message_t state); | 1403 | extern int i915_suspend(struct drm_device *dev, pm_message_t state); |
1403 | extern int i915_resume(struct drm_device *dev); | 1404 | extern int i915_resume(struct drm_device *dev); |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 287b42c9d1a8..b20d50192fcc 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -5771,6 +5771,11 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc, | |||
5771 | num_connectors++; | 5771 | num_connectors++; |
5772 | } | 5772 | } |
5773 | 5773 | ||
5774 | if (is_cpu_edp) | ||
5775 | intel_crtc->cpu_transcoder = TRANSCODER_EDP; | ||
5776 | else | ||
5777 | intel_crtc->cpu_transcoder = pipe; | ||
5778 | |||
5774 | /* We are not sure yet this won't happen. */ | 5779 | /* We are not sure yet this won't happen. */ |
5775 | WARN(!HAS_PCH_LPT(dev), "Unexpected PCH type %d\n", | 5780 | WARN(!HAS_PCH_LPT(dev), "Unexpected PCH type %d\n", |
5776 | INTEL_PCH_TYPE(dev)); | 5781 | INTEL_PCH_TYPE(dev)); |
@@ -5837,11 +5842,6 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, | |||
5837 | int pipe = intel_crtc->pipe; | 5842 | int pipe = intel_crtc->pipe; |
5838 | int ret; | 5843 | int ret; |
5839 | 5844 | ||
5840 | if (IS_HASWELL(dev) && intel_pipe_has_type(crtc, INTEL_OUTPUT_EDP)) | ||
5841 | intel_crtc->cpu_transcoder = TRANSCODER_EDP; | ||
5842 | else | ||
5843 | intel_crtc->cpu_transcoder = pipe; | ||
5844 | |||
5845 | drm_vblank_pre_modeset(dev, pipe); | 5845 | drm_vblank_pre_modeset(dev, pipe); |
5846 | 5846 | ||
5847 | ret = dev_priv->display.crtc_mode_set(crtc, mode, adjusted_mode, | 5847 | ret = dev_priv->display.crtc_mode_set(crtc, mode, adjusted_mode, |
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index a3730e0289e5..bee8cb6108a7 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c | |||
@@ -321,9 +321,6 @@ void intel_panel_enable_backlight(struct drm_device *dev, | |||
321 | if (dev_priv->backlight_level == 0) | 321 | if (dev_priv->backlight_level == 0) |
322 | dev_priv->backlight_level = intel_panel_get_max_backlight(dev); | 322 | dev_priv->backlight_level = intel_panel_get_max_backlight(dev); |
323 | 323 | ||
324 | dev_priv->backlight_enabled = true; | ||
325 | intel_panel_actually_set_backlight(dev, dev_priv->backlight_level); | ||
326 | |||
327 | if (INTEL_INFO(dev)->gen >= 4) { | 324 | if (INTEL_INFO(dev)->gen >= 4) { |
328 | uint32_t reg, tmp; | 325 | uint32_t reg, tmp; |
329 | 326 | ||
@@ -359,12 +356,12 @@ void intel_panel_enable_backlight(struct drm_device *dev, | |||
359 | } | 356 | } |
360 | 357 | ||
361 | set_level: | 358 | set_level: |
362 | /* Check the current backlight level and try to set again if it's zero. | 359 | /* Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1. |
363 | * On some machines, BLC_PWM_CPU_CTL is cleared to zero automatically | 360 | * BLC_PWM_CPU_CTL may be cleared to zero automatically when these |
364 | * when BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1 are written. | 361 | * registers are set. |
365 | */ | 362 | */ |
366 | if (!intel_panel_get_backlight(dev)) | 363 | dev_priv->backlight_enabled = true; |
367 | intel_panel_actually_set_backlight(dev, dev_priv->backlight_level); | 364 | intel_panel_actually_set_backlight(dev, dev_priv->backlight_level); |
368 | } | 365 | } |
369 | 366 | ||
370 | static void intel_panel_init_backlight(struct drm_device *dev) | 367 | static void intel_panel_init_backlight(struct drm_device *dev) |
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index a1794c6df1bf..adca00783e61 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c | |||
@@ -4079,6 +4079,9 @@ void intel_set_power_well(struct drm_device *dev, bool enable) | |||
4079 | if (!IS_HASWELL(dev)) | 4079 | if (!IS_HASWELL(dev)) |
4080 | return; | 4080 | return; |
4081 | 4081 | ||
4082 | if (!i915_disable_power_well && !enable) | ||
4083 | return; | ||
4084 | |||
4082 | tmp = I915_READ(HSW_PWR_WELL_DRIVER); | 4085 | tmp = I915_READ(HSW_PWR_WELL_DRIVER); |
4083 | is_enabled = tmp & HSW_PWR_WELL_STATE; | 4086 | is_enabled = tmp & HSW_PWR_WELL_STATE; |
4084 | enable_requested = tmp & HSW_PWR_WELL_ENABLE; | 4087 | enable_requested = tmp & HSW_PWR_WELL_ENABLE; |