diff options
| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2016-11-21 02:08:05 -0500 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2016-11-21 22:53:27 -0500 |
| commit | 7a43906f5cbfb74712af168988455e350707e310 (patch) | |
| tree | 2bd007a322f318e7a1903941b2bfd5d8251bfc93 | |
| parent | cac4a185405d4415eca269cae976438b44a37ae0 (diff) | |
powerpc: Set missing wakeup bit in LPCR on POWER9
There is a new bit, LPCR_PECE_HVEE (Hypervisor Virtualization Exit
Enable), which controls wakeup from STOP states on Hypervisor
Virtualization Interrupts (which happen to also be all external
interrupts in host or bare metal mode).
It needs to be set or we will miss wakeups.
Fixes: 9baaef0a22c8 ("powerpc/irq: Add support for HV virtualization interrupts")
Cc: stable@vger.kernel.org # v4.8+
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[mpe: Rename it to HVEE to match the name in the ISA]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
| -rw-r--r-- | arch/powerpc/include/asm/reg.h | 1 | ||||
| -rw-r--r-- | arch/powerpc/kernel/cpu_setup_power.S | 8 |
2 files changed, 5 insertions, 4 deletions
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index 9cd4e8cbc78c..9e1499f98def 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h | |||
| @@ -355,6 +355,7 @@ | |||
| 355 | #define LPCR_PECE0 ASM_CONST(0x0000000000004000) /* ext. exceptions can cause exit */ | 355 | #define LPCR_PECE0 ASM_CONST(0x0000000000004000) /* ext. exceptions can cause exit */ |
| 356 | #define LPCR_PECE1 ASM_CONST(0x0000000000002000) /* decrementer can cause exit */ | 356 | #define LPCR_PECE1 ASM_CONST(0x0000000000002000) /* decrementer can cause exit */ |
| 357 | #define LPCR_PECE2 ASM_CONST(0x0000000000001000) /* machine check etc can cause exit */ | 357 | #define LPCR_PECE2 ASM_CONST(0x0000000000001000) /* machine check etc can cause exit */ |
| 358 | #define LPCR_PECE_HVEE ASM_CONST(0x0000400000000000) /* P9 Wakeup on HV interrupts */ | ||
| 358 | #define LPCR_MER ASM_CONST(0x0000000000000800) /* Mediated External Exception */ | 359 | #define LPCR_MER ASM_CONST(0x0000000000000800) /* Mediated External Exception */ |
| 359 | #define LPCR_MER_SH 11 | 360 | #define LPCR_MER_SH 11 |
| 360 | #define LPCR_TC ASM_CONST(0x0000000000000200) /* Translation control */ | 361 | #define LPCR_TC ASM_CONST(0x0000000000000200) /* Translation control */ |
diff --git a/arch/powerpc/kernel/cpu_setup_power.S b/arch/powerpc/kernel/cpu_setup_power.S index 52ff3f025437..37c027ca83b2 100644 --- a/arch/powerpc/kernel/cpu_setup_power.S +++ b/arch/powerpc/kernel/cpu_setup_power.S | |||
| @@ -98,8 +98,8 @@ _GLOBAL(__setup_cpu_power9) | |||
| 98 | li r0,0 | 98 | li r0,0 |
| 99 | mtspr SPRN_LPID,r0 | 99 | mtspr SPRN_LPID,r0 |
| 100 | mfspr r3,SPRN_LPCR | 100 | mfspr r3,SPRN_LPCR |
| 101 | ori r3, r3, LPCR_PECEDH | 101 | LOAD_REG_IMMEDIATE(r4, LPCR_PECEDH | LPCR_PECE_HVEE | LPCR_HVICE) |
| 102 | ori r3, r3, LPCR_HVICE | 102 | or r3, r3, r4 |
| 103 | bl __init_LPCR | 103 | bl __init_LPCR |
| 104 | bl __init_HFSCR | 104 | bl __init_HFSCR |
| 105 | bl __init_tlb_power9 | 105 | bl __init_tlb_power9 |
| @@ -118,8 +118,8 @@ _GLOBAL(__restore_cpu_power9) | |||
| 118 | li r0,0 | 118 | li r0,0 |
| 119 | mtspr SPRN_LPID,r0 | 119 | mtspr SPRN_LPID,r0 |
| 120 | mfspr r3,SPRN_LPCR | 120 | mfspr r3,SPRN_LPCR |
| 121 | ori r3, r3, LPCR_PECEDH | 121 | LOAD_REG_IMMEDIATE(r4, LPCR_PECEDH | LPCR_PECE_HVEE | LPCR_HVICE) |
| 122 | ori r3, r3, LPCR_HVICE | 122 | or r3, r3, r4 |
| 123 | bl __init_LPCR | 123 | bl __init_LPCR |
| 124 | bl __init_HFSCR | 124 | bl __init_HFSCR |
| 125 | bl __init_tlb_power9 | 125 | bl __init_tlb_power9 |