diff options
author | Rob Herring <robh@kernel.org> | 2018-05-15 09:44:35 -0400 |
---|---|---|
committer | Rob Herring <robh@kernel.org> | 2018-10-11 15:48:33 -0400 |
commit | 79fbf76dc334813d72b92c8b97d081f2df63d81e (patch) | |
tree | 624650c67167b2049ee99ee22279ffce7c0a3296 | |
parent | 7ac48a81980f9066e59e613b769d341df48cf4f1 (diff) |
dt-bindings: arm: atmel: Move various sys registers out of SoC binding doc
In preparation to convert board-level bindings to json-schema, move
various misc SoC bindings out to their own file.
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
-rw-r--r-- | Documentation/devicetree/bindings/arm/atmel-at91.txt | 170 | ||||
-rw-r--r-- | Documentation/devicetree/bindings/arm/atmel-sysregs.txt | 171 |
2 files changed, 171 insertions, 170 deletions
diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt index 31220b54d85d..4bf1b4da7659 100644 --- a/Documentation/devicetree/bindings/arm/atmel-at91.txt +++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt | |||
@@ -70,173 +70,3 @@ compatible: must be one of: | |||
70 | - "atmel,samv71q19" | 70 | - "atmel,samv71q19" |
71 | - "atmel,samv71q20" | 71 | - "atmel,samv71q20" |
72 | - "atmel,samv71q21" | 72 | - "atmel,samv71q21" |
73 | |||
74 | Chipid required properties: | ||
75 | - compatible: Should be "atmel,sama5d2-chipid" | ||
76 | - reg : Should contain registers location and length | ||
77 | |||
78 | PIT Timer required properties: | ||
79 | - compatible: Should be "atmel,at91sam9260-pit" | ||
80 | - reg: Should contain registers location and length | ||
81 | - interrupts: Should contain interrupt for the PIT which is the IRQ line | ||
82 | shared across all System Controller members. | ||
83 | |||
84 | System Timer (ST) required properties: | ||
85 | - compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd" | ||
86 | - reg: Should contain registers location and length | ||
87 | - interrupts: Should contain interrupt for the ST which is the IRQ line | ||
88 | shared across all System Controller members. | ||
89 | - clocks: phandle to input clock. | ||
90 | Its subnodes can be: | ||
91 | - watchdog: compatible should be "atmel,at91rm9200-wdt" | ||
92 | |||
93 | RSTC Reset Controller required properties: | ||
94 | - compatible: Should be "atmel,<chip>-rstc". | ||
95 | <chip> can be "at91sam9260" or "at91sam9g45" or "sama5d3" | ||
96 | - reg: Should contain registers location and length | ||
97 | - clocks: phandle to input clock. | ||
98 | |||
99 | Example: | ||
100 | |||
101 | rstc@fffffd00 { | ||
102 | compatible = "atmel,at91sam9260-rstc"; | ||
103 | reg = <0xfffffd00 0x10>; | ||
104 | clocks = <&clk32k>; | ||
105 | }; | ||
106 | |||
107 | RAMC SDRAM/DDR Controller required properties: | ||
108 | - compatible: Should be "atmel,at91rm9200-sdramc", "syscon" | ||
109 | "atmel,at91sam9260-sdramc", | ||
110 | "atmel,at91sam9g45-ddramc", | ||
111 | "atmel,sama5d3-ddramc", | ||
112 | - reg: Should contain registers location and length | ||
113 | |||
114 | Examples: | ||
115 | |||
116 | ramc0: ramc@ffffe800 { | ||
117 | compatible = "atmel,at91sam9g45-ddramc"; | ||
118 | reg = <0xffffe800 0x200>; | ||
119 | }; | ||
120 | |||
121 | SHDWC Shutdown Controller | ||
122 | |||
123 | required properties: | ||
124 | - compatible: Should be "atmel,<chip>-shdwc". | ||
125 | <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5". | ||
126 | - reg: Should contain registers location and length | ||
127 | - clocks: phandle to input clock. | ||
128 | |||
129 | optional properties: | ||
130 | - atmel,wakeup-mode: String, operation mode of the wakeup mode. | ||
131 | Supported values are: "none", "high", "low", "any". | ||
132 | - atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf). | ||
133 | |||
134 | optional at91sam9260 properties: | ||
135 | - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up. | ||
136 | |||
137 | optional at91sam9rl properties: | ||
138 | - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up. | ||
139 | - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up. | ||
140 | |||
141 | optional at91sam9x5 properties: | ||
142 | - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up. | ||
143 | |||
144 | Example: | ||
145 | |||
146 | shdwc@fffffd10 { | ||
147 | compatible = "atmel,at91sam9260-shdwc"; | ||
148 | reg = <0xfffffd10 0x10>; | ||
149 | clocks = <&clk32k>; | ||
150 | }; | ||
151 | |||
152 | SHDWC SAMA5D2-Compatible Shutdown Controller | ||
153 | |||
154 | 1) shdwc node | ||
155 | |||
156 | required properties: | ||
157 | - compatible: should be "atmel,sama5d2-shdwc". | ||
158 | - reg: should contain registers location and length | ||
159 | - clocks: phandle to input clock. | ||
160 | - #address-cells: should be one. The cell is the wake-up input index. | ||
161 | - #size-cells: should be zero. | ||
162 | |||
163 | optional properties: | ||
164 | |||
165 | - debounce-delay-us: minimum wake-up inputs debouncer period in | ||
166 | microseconds. It's usually a board-related property. | ||
167 | - atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up. | ||
168 | |||
169 | The node contains child nodes for each wake-up input that the platform uses. | ||
170 | |||
171 | 2) input nodes | ||
172 | |||
173 | Wake-up input nodes are usually described in the "board" part of the Device | ||
174 | Tree. Note also that input 0 is linked to the wake-up pin and is frequently | ||
175 | used. | ||
176 | |||
177 | Required properties: | ||
178 | - reg: should contain the wake-up input index [0 - 15]. | ||
179 | |||
180 | Optional properties: | ||
181 | - atmel,wakeup-active-high: boolean, the corresponding wake-up input described | ||
182 | by the child, forces the wake-up of the core power supply on a high level. | ||
183 | The default is to be active low. | ||
184 | |||
185 | Example: | ||
186 | |||
187 | On the SoC side: | ||
188 | shdwc@f8048010 { | ||
189 | compatible = "atmel,sama5d2-shdwc"; | ||
190 | reg = <0xf8048010 0x10>; | ||
191 | clocks = <&clk32k>; | ||
192 | #address-cells = <1>; | ||
193 | #size-cells = <0>; | ||
194 | atmel,wakeup-rtc-timer; | ||
195 | }; | ||
196 | |||
197 | On the board side: | ||
198 | shdwc@f8048010 { | ||
199 | debounce-delay-us = <976>; | ||
200 | |||
201 | input@0 { | ||
202 | reg = <0>; | ||
203 | }; | ||
204 | |||
205 | input@1 { | ||
206 | reg = <1>; | ||
207 | atmel,wakeup-active-high; | ||
208 | }; | ||
209 | }; | ||
210 | |||
211 | Special Function Registers (SFR) | ||
212 | |||
213 | Special Function Registers (SFR) manage specific aspects of the integrated | ||
214 | memory, bridge implementations, processor and other functionality not controlled | ||
215 | elsewhere. | ||
216 | |||
217 | required properties: | ||
218 | - compatible: Should be "atmel,<chip>-sfr", "syscon" or | ||
219 | "atmel,<chip>-sfrbu", "syscon" | ||
220 | <chip> can be "sama5d3", "sama5d4" or "sama5d2". | ||
221 | - reg: Should contain registers location and length | ||
222 | |||
223 | sfr@f0038000 { | ||
224 | compatible = "atmel,sama5d3-sfr", "syscon"; | ||
225 | reg = <0xf0038000 0x60>; | ||
226 | }; | ||
227 | |||
228 | Security Module (SECUMOD) | ||
229 | |||
230 | The Security Module macrocell provides all necessary secure functions to avoid | ||
231 | voltage, temperature, frequency and mechanical attacks on the chip. It also | ||
232 | embeds secure memories that can be scrambled | ||
233 | |||
234 | required properties: | ||
235 | - compatible: Should be "atmel,<chip>-secumod", "syscon". | ||
236 | <chip> can be "sama5d2". | ||
237 | - reg: Should contain registers location and length | ||
238 | |||
239 | secumod@fc040000 { | ||
240 | compatible = "atmel,sama5d2-secumod", "syscon"; | ||
241 | reg = <0xfc040000 0x100>; | ||
242 | }; | ||
diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt new file mode 100644 index 000000000000..4b96608ad692 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt | |||
@@ -0,0 +1,171 @@ | |||
1 | Atmel system registers | ||
2 | |||
3 | Chipid required properties: | ||
4 | - compatible: Should be "atmel,sama5d2-chipid" | ||
5 | - reg : Should contain registers location and length | ||
6 | |||
7 | PIT Timer required properties: | ||
8 | - compatible: Should be "atmel,at91sam9260-pit" | ||
9 | - reg: Should contain registers location and length | ||
10 | - interrupts: Should contain interrupt for the PIT which is the IRQ line | ||
11 | shared across all System Controller members. | ||
12 | |||
13 | System Timer (ST) required properties: | ||
14 | - compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd" | ||
15 | - reg: Should contain registers location and length | ||
16 | - interrupts: Should contain interrupt for the ST which is the IRQ line | ||
17 | shared across all System Controller members. | ||
18 | - clocks: phandle to input clock. | ||
19 | Its subnodes can be: | ||
20 | - watchdog: compatible should be "atmel,at91rm9200-wdt" | ||
21 | |||
22 | RSTC Reset Controller required properties: | ||
23 | - compatible: Should be "atmel,<chip>-rstc". | ||
24 | <chip> can be "at91sam9260" or "at91sam9g45" or "sama5d3" | ||
25 | - reg: Should contain registers location and length | ||
26 | - clocks: phandle to input clock. | ||
27 | |||
28 | Example: | ||
29 | |||
30 | rstc@fffffd00 { | ||
31 | compatible = "atmel,at91sam9260-rstc"; | ||
32 | reg = <0xfffffd00 0x10>; | ||
33 | clocks = <&clk32k>; | ||
34 | }; | ||
35 | |||
36 | RAMC SDRAM/DDR Controller required properties: | ||
37 | - compatible: Should be "atmel,at91rm9200-sdramc", "syscon" | ||
38 | "atmel,at91sam9260-sdramc", | ||
39 | "atmel,at91sam9g45-ddramc", | ||
40 | "atmel,sama5d3-ddramc", | ||
41 | - reg: Should contain registers location and length | ||
42 | |||
43 | Examples: | ||
44 | |||
45 | ramc0: ramc@ffffe800 { | ||
46 | compatible = "atmel,at91sam9g45-ddramc"; | ||
47 | reg = <0xffffe800 0x200>; | ||
48 | }; | ||
49 | |||
50 | SHDWC Shutdown Controller | ||
51 | |||
52 | required properties: | ||
53 | - compatible: Should be "atmel,<chip>-shdwc". | ||
54 | <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5". | ||
55 | - reg: Should contain registers location and length | ||
56 | - clocks: phandle to input clock. | ||
57 | |||
58 | optional properties: | ||
59 | - atmel,wakeup-mode: String, operation mode of the wakeup mode. | ||
60 | Supported values are: "none", "high", "low", "any". | ||
61 | - atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf). | ||
62 | |||
63 | optional at91sam9260 properties: | ||
64 | - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up. | ||
65 | |||
66 | optional at91sam9rl properties: | ||
67 | - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up. | ||
68 | - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up. | ||
69 | |||
70 | optional at91sam9x5 properties: | ||
71 | - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up. | ||
72 | |||
73 | Example: | ||
74 | |||
75 | shdwc@fffffd10 { | ||
76 | compatible = "atmel,at91sam9260-shdwc"; | ||
77 | reg = <0xfffffd10 0x10>; | ||
78 | clocks = <&clk32k>; | ||
79 | }; | ||
80 | |||
81 | SHDWC SAMA5D2-Compatible Shutdown Controller | ||
82 | |||
83 | 1) shdwc node | ||
84 | |||
85 | required properties: | ||
86 | - compatible: should be "atmel,sama5d2-shdwc". | ||
87 | - reg: should contain registers location and length | ||
88 | - clocks: phandle to input clock. | ||
89 | - #address-cells: should be one. The cell is the wake-up input index. | ||
90 | - #size-cells: should be zero. | ||
91 | |||
92 | optional properties: | ||
93 | |||
94 | - debounce-delay-us: minimum wake-up inputs debouncer period in | ||
95 | microseconds. It's usually a board-related property. | ||
96 | - atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up. | ||
97 | |||
98 | The node contains child nodes for each wake-up input that the platform uses. | ||
99 | |||
100 | 2) input nodes | ||
101 | |||
102 | Wake-up input nodes are usually described in the "board" part of the Device | ||
103 | Tree. Note also that input 0 is linked to the wake-up pin and is frequently | ||
104 | used. | ||
105 | |||
106 | Required properties: | ||
107 | - reg: should contain the wake-up input index [0 - 15]. | ||
108 | |||
109 | Optional properties: | ||
110 | - atmel,wakeup-active-high: boolean, the corresponding wake-up input described | ||
111 | by the child, forces the wake-up of the core power supply on a high level. | ||
112 | The default is to be active low. | ||
113 | |||
114 | Example: | ||
115 | |||
116 | On the SoC side: | ||
117 | shdwc@f8048010 { | ||
118 | compatible = "atmel,sama5d2-shdwc"; | ||
119 | reg = <0xf8048010 0x10>; | ||
120 | clocks = <&clk32k>; | ||
121 | #address-cells = <1>; | ||
122 | #size-cells = <0>; | ||
123 | atmel,wakeup-rtc-timer; | ||
124 | }; | ||
125 | |||
126 | On the board side: | ||
127 | shdwc@f8048010 { | ||
128 | debounce-delay-us = <976>; | ||
129 | |||
130 | input@0 { | ||
131 | reg = <0>; | ||
132 | }; | ||
133 | |||
134 | input@1 { | ||
135 | reg = <1>; | ||
136 | atmel,wakeup-active-high; | ||
137 | }; | ||
138 | }; | ||
139 | |||
140 | Special Function Registers (SFR) | ||
141 | |||
142 | Special Function Registers (SFR) manage specific aspects of the integrated | ||
143 | memory, bridge implementations, processor and other functionality not controlled | ||
144 | elsewhere. | ||
145 | |||
146 | required properties: | ||
147 | - compatible: Should be "atmel,<chip>-sfr", "syscon" or | ||
148 | "atmel,<chip>-sfrbu", "syscon" | ||
149 | <chip> can be "sama5d3", "sama5d4" or "sama5d2". | ||
150 | - reg: Should contain registers location and length | ||
151 | |||
152 | sfr@f0038000 { | ||
153 | compatible = "atmel,sama5d3-sfr", "syscon"; | ||
154 | reg = <0xf0038000 0x60>; | ||
155 | }; | ||
156 | |||
157 | Security Module (SECUMOD) | ||
158 | |||
159 | The Security Module macrocell provides all necessary secure functions to avoid | ||
160 | voltage, temperature, frequency and mechanical attacks on the chip. It also | ||
161 | embeds secure memories that can be scrambled | ||
162 | |||
163 | required properties: | ||
164 | - compatible: Should be "atmel,<chip>-secumod", "syscon". | ||
165 | <chip> can be "sama5d2". | ||
166 | - reg: Should contain registers location and length | ||
167 | |||
168 | secumod@fc040000 { | ||
169 | compatible = "atmel,sama5d2-secumod", "syscon"; | ||
170 | reg = <0xfc040000 0x100>; | ||
171 | }; | ||