aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2015-12-12 16:39:59 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2015-12-12 16:39:59 -0500
commit79dbddaf8e9613a529d1b07f181f07894bf6fb8e (patch)
tree964ba851b4db3083a91cb4a7e921c6597011637f
parent800f1ac4791fbb515009844d579d4c7bf4b762f6 (diff)
parentdc9c41bd9ece090b54eb8f1bbdfb1930e10d3ae7 (diff)
Merge tag 'powerpc-4.4-4' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc fixes from Michael Ellerman: - opal-irqchip: Fix double endian conversion from Alistair Popple - cxl: Set endianess of kernel contexts from Frederic Barrat - sbc8641: drop bogus PHY IRQ entries from DTS file from Paul Gortmaker - Revert "powerpc/eeh: Don't unfreeze PHB PE after reset" from Andrew Donnellan * tag 'powerpc-4.4-4' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: Revert "powerpc/eeh: Don't unfreeze PHB PE after reset" powerpc/sbc8641: drop bogus PHY IRQ entries from DTS file cxl: Set endianess of kernel contexts powerpc/opal-irqchip: Fix double endian conversion
-rw-r--r--arch/powerpc/boot/dts/sbc8641d.dts8
-rw-r--r--arch/powerpc/kernel/eeh_driver.c14
-rw-r--r--arch/powerpc/platforms/powernv/opal-irqchip.c58
-rw-r--r--drivers/misc/cxl/native.c2
4 files changed, 34 insertions, 48 deletions
diff --git a/arch/powerpc/boot/dts/sbc8641d.dts b/arch/powerpc/boot/dts/sbc8641d.dts
index 631ede72e226..68f0ed7626bd 100644
--- a/arch/powerpc/boot/dts/sbc8641d.dts
+++ b/arch/powerpc/boot/dts/sbc8641d.dts
@@ -227,23 +227,15 @@
227 reg = <0x520 0x20>; 227 reg = <0x520 0x20>;
228 228
229 phy0: ethernet-phy@1f { 229 phy0: ethernet-phy@1f {
230 interrupt-parent = <&mpic>;
231 interrupts = <10 1>;
232 reg = <0x1f>; 230 reg = <0x1f>;
233 }; 231 };
234 phy1: ethernet-phy@0 { 232 phy1: ethernet-phy@0 {
235 interrupt-parent = <&mpic>;
236 interrupts = <10 1>;
237 reg = <0>; 233 reg = <0>;
238 }; 234 };
239 phy2: ethernet-phy@1 { 235 phy2: ethernet-phy@1 {
240 interrupt-parent = <&mpic>;
241 interrupts = <10 1>;
242 reg = <1>; 236 reg = <1>;
243 }; 237 };
244 phy3: ethernet-phy@2 { 238 phy3: ethernet-phy@2 {
245 interrupt-parent = <&mpic>;
246 interrupts = <10 1>;
247 reg = <2>; 239 reg = <2>;
248 }; 240 };
249 tbi0: tbi-phy@11 { 241 tbi0: tbi-phy@11 {
diff --git a/arch/powerpc/kernel/eeh_driver.c b/arch/powerpc/kernel/eeh_driver.c
index 80dfe8965df9..8d14feb40f12 100644
--- a/arch/powerpc/kernel/eeh_driver.c
+++ b/arch/powerpc/kernel/eeh_driver.c
@@ -590,16 +590,10 @@ static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus)
590 eeh_ops->configure_bridge(pe); 590 eeh_ops->configure_bridge(pe);
591 eeh_pe_restore_bars(pe); 591 eeh_pe_restore_bars(pe);
592 592
593 /* 593 /* Clear frozen state */
594 * If it's PHB PE, the frozen state on all available PEs should have 594 rc = eeh_clear_pe_frozen_state(pe, false);
595 * been cleared by the PHB reset. Otherwise, we unfreeze the PE and its 595 if (rc)
596 * child PEs because they might be in frozen state. 596 return rc;
597 */
598 if (!(pe->type & EEH_PE_PHB)) {
599 rc = eeh_clear_pe_frozen_state(pe, false);
600 if (rc)
601 return rc;
602 }
603 597
604 /* Give the system 5 seconds to finish running the user-space 598 /* Give the system 5 seconds to finish running the user-space
605 * hotplug shutdown scripts, e.g. ifdown for ethernet. Yes, 599 * hotplug shutdown scripts, e.g. ifdown for ethernet. Yes,
diff --git a/arch/powerpc/platforms/powernv/opal-irqchip.c b/arch/powerpc/platforms/powernv/opal-irqchip.c
index 6ccfb6c1c707..0a00e2aed393 100644
--- a/arch/powerpc/platforms/powernv/opal-irqchip.c
+++ b/arch/powerpc/platforms/powernv/opal-irqchip.c
@@ -43,11 +43,34 @@ static unsigned int opal_irq_count;
43static unsigned int *opal_irqs; 43static unsigned int *opal_irqs;
44 44
45static void opal_handle_irq_work(struct irq_work *work); 45static void opal_handle_irq_work(struct irq_work *work);
46static __be64 last_outstanding_events; 46static u64 last_outstanding_events;
47static struct irq_work opal_event_irq_work = { 47static struct irq_work opal_event_irq_work = {
48 .func = opal_handle_irq_work, 48 .func = opal_handle_irq_work,
49}; 49};
50 50
51void opal_handle_events(uint64_t events)
52{
53 int virq, hwirq = 0;
54 u64 mask = opal_event_irqchip.mask;
55
56 if (!in_irq() && (events & mask)) {
57 last_outstanding_events = events;
58 irq_work_queue(&opal_event_irq_work);
59 return;
60 }
61
62 while (events & mask) {
63 hwirq = fls64(events) - 1;
64 if (BIT_ULL(hwirq) & mask) {
65 virq = irq_find_mapping(opal_event_irqchip.domain,
66 hwirq);
67 if (virq)
68 generic_handle_irq(virq);
69 }
70 events &= ~BIT_ULL(hwirq);
71 }
72}
73
51static void opal_event_mask(struct irq_data *d) 74static void opal_event_mask(struct irq_data *d)
52{ 75{
53 clear_bit(d->hwirq, &opal_event_irqchip.mask); 76 clear_bit(d->hwirq, &opal_event_irqchip.mask);
@@ -55,12 +78,12 @@ static void opal_event_mask(struct irq_data *d)
55 78
56static void opal_event_unmask(struct irq_data *d) 79static void opal_event_unmask(struct irq_data *d)
57{ 80{
81 __be64 events;
82
58 set_bit(d->hwirq, &opal_event_irqchip.mask); 83 set_bit(d->hwirq, &opal_event_irqchip.mask);
59 84
60 opal_poll_events(&last_outstanding_events); 85 opal_poll_events(&events);
61 if (last_outstanding_events & opal_event_irqchip.mask) 86 opal_handle_events(be64_to_cpu(events));
62 /* Need to retrigger the interrupt */
63 irq_work_queue(&opal_event_irq_work);
64} 87}
65 88
66static int opal_event_set_type(struct irq_data *d, unsigned int flow_type) 89static int opal_event_set_type(struct irq_data *d, unsigned int flow_type)
@@ -96,29 +119,6 @@ static int opal_event_map(struct irq_domain *d, unsigned int irq,
96 return 0; 119 return 0;
97} 120}
98 121
99void opal_handle_events(uint64_t events)
100{
101 int virq, hwirq = 0;
102 u64 mask = opal_event_irqchip.mask;
103
104 if (!in_irq() && (events & mask)) {
105 last_outstanding_events = events;
106 irq_work_queue(&opal_event_irq_work);
107 return;
108 }
109
110 while (events & mask) {
111 hwirq = fls64(events) - 1;
112 if (BIT_ULL(hwirq) & mask) {
113 virq = irq_find_mapping(opal_event_irqchip.domain,
114 hwirq);
115 if (virq)
116 generic_handle_irq(virq);
117 }
118 events &= ~BIT_ULL(hwirq);
119 }
120}
121
122static irqreturn_t opal_interrupt(int irq, void *data) 122static irqreturn_t opal_interrupt(int irq, void *data)
123{ 123{
124 __be64 events; 124 __be64 events;
@@ -131,7 +131,7 @@ static irqreturn_t opal_interrupt(int irq, void *data)
131 131
132static void opal_handle_irq_work(struct irq_work *work) 132static void opal_handle_irq_work(struct irq_work *work)
133{ 133{
134 opal_handle_events(be64_to_cpu(last_outstanding_events)); 134 opal_handle_events(last_outstanding_events);
135} 135}
136 136
137static int opal_event_match(struct irq_domain *h, struct device_node *node, 137static int opal_event_match(struct irq_domain *h, struct device_node *node,
diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c
index d2e75c88f4d2..f40909793490 100644
--- a/drivers/misc/cxl/native.c
+++ b/drivers/misc/cxl/native.c
@@ -497,6 +497,7 @@ static u64 calculate_sr(struct cxl_context *ctx)
497{ 497{
498 u64 sr = 0; 498 u64 sr = 0;
499 499
500 set_endian(sr);
500 if (ctx->master) 501 if (ctx->master)
501 sr |= CXL_PSL_SR_An_MP; 502 sr |= CXL_PSL_SR_An_MP;
502 if (mfspr(SPRN_LPCR) & LPCR_TC) 503 if (mfspr(SPRN_LPCR) & LPCR_TC)
@@ -506,7 +507,6 @@ static u64 calculate_sr(struct cxl_context *ctx)
506 sr |= CXL_PSL_SR_An_HV; 507 sr |= CXL_PSL_SR_An_HV;
507 } else { 508 } else {
508 sr |= CXL_PSL_SR_An_PR | CXL_PSL_SR_An_R; 509 sr |= CXL_PSL_SR_An_PR | CXL_PSL_SR_An_R;
509 set_endian(sr);
510 sr &= ~(CXL_PSL_SR_An_HV); 510 sr &= ~(CXL_PSL_SR_An_HV);
511 if (!test_tsk_thread_flag(current, TIF_32BIT)) 511 if (!test_tsk_thread_flag(current, TIF_32BIT))
512 sr |= CXL_PSL_SR_An_SF; 512 sr |= CXL_PSL_SR_An_SF;