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authorLinus Torvalds <torvalds@linux-foundation.org>2017-02-03 14:32:25 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2017-02-03 14:32:25 -0500
commit79c9089f97d37ffac88c3ddb6d359b2cf75058b7 (patch)
treefe92f453481db4e67a9e4be2a95b42686b98b7e1
parent57480b98af696795ab0daff0a6ed572172060a0f (diff)
parentf63cf464fc379382a271f94ddef36e8c5a0628eb (diff)
Merge tag 'drm-fixes-for-v4.10-rc7' of git://people.freedesktop.org/~airlied/linux
Pull drm fixes from Dave Airlie: "Another fixes pull for v4.10, it's a bit big due to the backport of the VMA fixes for i915 that should fix the oops on shutdown problems that you've worked around. There are also two drm core connector registration fixes, a bunch of nouveau regression fixes and two AMD fixes" * tag 'drm-fixes-for-v4.10-rc7' of git://people.freedesktop.org/~airlied/linux: drm/radeon: Fix vram_size/visible values in DRM_RADEON_GEM_INFO ioctl drm/amdgpu/si: fix crash on headless asics drm/i915: Track pinned vma in intel_plane_state drm/atomic: Unconditionally call prepare_fb. drm/atomic: Fix double free in drm_atomic_state_default_clear drm/nouveau/kms/nv50: request vblank events for commits that send completion events drm/nouveau/nv1a,nv1f/disp: fix memory clock rate retrieval drm/nouveau/disp/gt215: Fix HDA ELD handling (thus, HDMI audio) on gt215 drm/nouveau/nouveau/led: prevent compiling the led-code if nouveau=y and leds=m drm/nouveau/disp/mcp7x: disable dptmds workaround drm/nouveau: prevent userspace from deleting client object drm/nouveau/fence/g84-: protect against concurrent access to semaphore buffers drm: Don't race connector registration drm: prevent double-(un)registration for connectors
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c4
-rw-r--r--drivers/gpu/drm/drm_atomic.c13
-rw-r--r--drivers/gpu/drm/drm_atomic_helper.c9
-rw-r--r--drivers/gpu/drm/drm_connector.c23
-rw-r--r--drivers/gpu/drm/drm_drv.c4
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h16
-rw-r--r--drivers/gpu/drm/i915/intel_atomic_plane.c20
-rw-r--r--drivers/gpu/drm/i915/intel_display.c125
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h9
-rw-r--r--drivers/gpu/drm/i915/intel_fbc.c52
-rw-r--r--drivers/gpu/drm/i915/intel_fbdev.c4
-rw-r--r--drivers/gpu/drm/i915/intel_sprite.c8
-rw-r--r--drivers/gpu/drm/nouveau/dispnv04/hw.c3
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_fence.h1
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_led.h2
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_usif.c3
-rw-r--r--drivers/gpu/drm/nouveau/nv50_display.c6
-rw-r--r--drivers/gpu/drm/nouveau/nv84_fence.c6
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagt215.c2
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.c3
-rw-r--r--drivers/gpu/drm/radeon/radeon_gem.c4
-rw-r--r--include/drm/drmP.h1
-rw-r--r--include/drm/drm_connector.h16
24 files changed, 171 insertions, 165 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
index e2b0b1646f99..0635829b18cf 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
@@ -254,6 +254,9 @@ static void gmc_v6_0_mc_program(struct amdgpu_device *adev)
254 } 254 }
255 WREG32(mmHDP_REG_COHERENCY_FLUSH_CNTL, 0); 255 WREG32(mmHDP_REG_COHERENCY_FLUSH_CNTL, 0);
256 256
257 if (adev->mode_info.num_crtc)
258 amdgpu_display_set_vga_render_state(adev, false);
259
257 gmc_v6_0_mc_stop(adev, &save); 260 gmc_v6_0_mc_stop(adev, &save);
258 261
259 if (gmc_v6_0_wait_for_idle((void *)adev)) { 262 if (gmc_v6_0_wait_for_idle((void *)adev)) {
@@ -283,7 +286,6 @@ static void gmc_v6_0_mc_program(struct amdgpu_device *adev)
283 dev_warn(adev->dev, "Wait for MC idle timedout !\n"); 286 dev_warn(adev->dev, "Wait for MC idle timedout !\n");
284 } 287 }
285 gmc_v6_0_mc_resume(adev, &save); 288 gmc_v6_0_mc_resume(adev, &save);
286 amdgpu_display_set_vga_render_state(adev, false);
287} 289}
288 290
289static int gmc_v6_0_mc_init(struct amdgpu_device *adev) 291static int gmc_v6_0_mc_init(struct amdgpu_device *adev)
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 50f5cf7b69d1..fdfb1ec17e66 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -2032,13 +2032,16 @@ static void complete_crtc_signaling(struct drm_device *dev,
2032 } 2032 }
2033 2033
2034 for_each_crtc_in_state(state, crtc, crtc_state, i) { 2034 for_each_crtc_in_state(state, crtc, crtc_state, i) {
2035 struct drm_pending_vblank_event *event = crtc_state->event;
2035 /* 2036 /*
2036 * TEST_ONLY and PAGE_FLIP_EVENT are mutually 2037 * Free the allocated event. drm_atomic_helper_setup_commit
2037 * exclusive, if they weren't, this code should be 2038 * can allocate an event too, so only free it if it's ours
2038 * called on success for TEST_ONLY too. 2039 * to prevent a double free in drm_atomic_state_clear.
2039 */ 2040 */
2040 if (crtc_state->event) 2041 if (event && (event->base.fence || event->base.file_priv)) {
2041 drm_event_cancel_free(dev, &crtc_state->event->base); 2042 drm_event_cancel_free(dev, &event->base);
2043 crtc_state->event = NULL;
2044 }
2042 } 2045 }
2043 2046
2044 if (!fence_state) 2047 if (!fence_state)
diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c
index 34f757bcabae..4594477dee00 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -1666,9 +1666,6 @@ int drm_atomic_helper_prepare_planes(struct drm_device *dev,
1666 1666
1667 funcs = plane->helper_private; 1667 funcs = plane->helper_private;
1668 1668
1669 if (!drm_atomic_helper_framebuffer_changed(dev, state, plane_state->crtc))
1670 continue;
1671
1672 if (funcs->prepare_fb) { 1669 if (funcs->prepare_fb) {
1673 ret = funcs->prepare_fb(plane, plane_state); 1670 ret = funcs->prepare_fb(plane, plane_state);
1674 if (ret) 1671 if (ret)
@@ -1685,9 +1682,6 @@ fail:
1685 if (j >= i) 1682 if (j >= i)
1686 continue; 1683 continue;
1687 1684
1688 if (!drm_atomic_helper_framebuffer_changed(dev, state, plane_state->crtc))
1689 continue;
1690
1691 funcs = plane->helper_private; 1685 funcs = plane->helper_private;
1692 1686
1693 if (funcs->cleanup_fb) 1687 if (funcs->cleanup_fb)
@@ -1954,9 +1948,6 @@ void drm_atomic_helper_cleanup_planes(struct drm_device *dev,
1954 for_each_plane_in_state(old_state, plane, plane_state, i) { 1948 for_each_plane_in_state(old_state, plane, plane_state, i) {
1955 const struct drm_plane_helper_funcs *funcs; 1949 const struct drm_plane_helper_funcs *funcs;
1956 1950
1957 if (!drm_atomic_helper_framebuffer_changed(dev, old_state, plane_state->crtc))
1958 continue;
1959
1960 funcs = plane->helper_private; 1951 funcs = plane->helper_private;
1961 1952
1962 if (funcs->cleanup_fb) 1953 if (funcs->cleanup_fb)
diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index 5a4526289392..7a7019ac9388 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -225,6 +225,7 @@ int drm_connector_init(struct drm_device *dev,
225 225
226 INIT_LIST_HEAD(&connector->probed_modes); 226 INIT_LIST_HEAD(&connector->probed_modes);
227 INIT_LIST_HEAD(&connector->modes); 227 INIT_LIST_HEAD(&connector->modes);
228 mutex_init(&connector->mutex);
228 connector->edid_blob_ptr = NULL; 229 connector->edid_blob_ptr = NULL;
229 connector->status = connector_status_unknown; 230 connector->status = connector_status_unknown;
230 231
@@ -359,6 +360,8 @@ void drm_connector_cleanup(struct drm_connector *connector)
359 connector->funcs->atomic_destroy_state(connector, 360 connector->funcs->atomic_destroy_state(connector,
360 connector->state); 361 connector->state);
361 362
363 mutex_destroy(&connector->mutex);
364
362 memset(connector, 0, sizeof(*connector)); 365 memset(connector, 0, sizeof(*connector));
363} 366}
364EXPORT_SYMBOL(drm_connector_cleanup); 367EXPORT_SYMBOL(drm_connector_cleanup);
@@ -374,14 +377,18 @@ EXPORT_SYMBOL(drm_connector_cleanup);
374 */ 377 */
375int drm_connector_register(struct drm_connector *connector) 378int drm_connector_register(struct drm_connector *connector)
376{ 379{
377 int ret; 380 int ret = 0;
378 381
379 if (connector->registered) 382 if (!connector->dev->registered)
380 return 0; 383 return 0;
381 384
385 mutex_lock(&connector->mutex);
386 if (connector->registered)
387 goto unlock;
388
382 ret = drm_sysfs_connector_add(connector); 389 ret = drm_sysfs_connector_add(connector);
383 if (ret) 390 if (ret)
384 return ret; 391 goto unlock;
385 392
386 ret = drm_debugfs_connector_add(connector); 393 ret = drm_debugfs_connector_add(connector);
387 if (ret) { 394 if (ret) {
@@ -397,12 +404,14 @@ int drm_connector_register(struct drm_connector *connector)
397 drm_mode_object_register(connector->dev, &connector->base); 404 drm_mode_object_register(connector->dev, &connector->base);
398 405
399 connector->registered = true; 406 connector->registered = true;
400 return 0; 407 goto unlock;
401 408
402err_debugfs: 409err_debugfs:
403 drm_debugfs_connector_remove(connector); 410 drm_debugfs_connector_remove(connector);
404err_sysfs: 411err_sysfs:
405 drm_sysfs_connector_remove(connector); 412 drm_sysfs_connector_remove(connector);
413unlock:
414 mutex_unlock(&connector->mutex);
406 return ret; 415 return ret;
407} 416}
408EXPORT_SYMBOL(drm_connector_register); 417EXPORT_SYMBOL(drm_connector_register);
@@ -415,8 +424,11 @@ EXPORT_SYMBOL(drm_connector_register);
415 */ 424 */
416void drm_connector_unregister(struct drm_connector *connector) 425void drm_connector_unregister(struct drm_connector *connector)
417{ 426{
418 if (!connector->registered) 427 mutex_lock(&connector->mutex);
428 if (!connector->registered) {
429 mutex_unlock(&connector->mutex);
419 return; 430 return;
431 }
420 432
421 if (connector->funcs->early_unregister) 433 if (connector->funcs->early_unregister)
422 connector->funcs->early_unregister(connector); 434 connector->funcs->early_unregister(connector);
@@ -425,6 +437,7 @@ void drm_connector_unregister(struct drm_connector *connector)
425 drm_debugfs_connector_remove(connector); 437 drm_debugfs_connector_remove(connector);
426 438
427 connector->registered = false; 439 connector->registered = false;
440 mutex_unlock(&connector->mutex);
428} 441}
429EXPORT_SYMBOL(drm_connector_unregister); 442EXPORT_SYMBOL(drm_connector_unregister);
430 443
diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
index a525751b4559..6594b4088f11 100644
--- a/drivers/gpu/drm/drm_drv.c
+++ b/drivers/gpu/drm/drm_drv.c
@@ -745,6 +745,8 @@ int drm_dev_register(struct drm_device *dev, unsigned long flags)
745 if (ret) 745 if (ret)
746 goto err_minors; 746 goto err_minors;
747 747
748 dev->registered = true;
749
748 if (dev->driver->load) { 750 if (dev->driver->load) {
749 ret = dev->driver->load(dev, flags); 751 ret = dev->driver->load(dev, flags);
750 if (ret) 752 if (ret)
@@ -785,6 +787,8 @@ void drm_dev_unregister(struct drm_device *dev)
785 787
786 drm_lastclose(dev); 788 drm_lastclose(dev);
787 789
790 dev->registered = false;
791
788 if (drm_core_check_feature(dev, DRIVER_MODESET)) 792 if (drm_core_check_feature(dev, DRIVER_MODESET))
789 drm_modeset_unregister_all(dev); 793 drm_modeset_unregister_all(dev);
790 794
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 69bc3b0c4390..8493e19b563a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1012,6 +1012,8 @@ struct intel_fbc {
1012 struct work_struct underrun_work; 1012 struct work_struct underrun_work;
1013 1013
1014 struct intel_fbc_state_cache { 1014 struct intel_fbc_state_cache {
1015 struct i915_vma *vma;
1016
1015 struct { 1017 struct {
1016 unsigned int mode_flags; 1018 unsigned int mode_flags;
1017 uint32_t hsw_bdw_pixel_rate; 1019 uint32_t hsw_bdw_pixel_rate;
@@ -1025,15 +1027,14 @@ struct intel_fbc {
1025 } plane; 1027 } plane;
1026 1028
1027 struct { 1029 struct {
1028 u64 ilk_ggtt_offset;
1029 uint32_t pixel_format; 1030 uint32_t pixel_format;
1030 unsigned int stride; 1031 unsigned int stride;
1031 int fence_reg;
1032 unsigned int tiling_mode;
1033 } fb; 1032 } fb;
1034 } state_cache; 1033 } state_cache;
1035 1034
1036 struct intel_fbc_reg_params { 1035 struct intel_fbc_reg_params {
1036 struct i915_vma *vma;
1037
1037 struct { 1038 struct {
1038 enum pipe pipe; 1039 enum pipe pipe;
1039 enum plane plane; 1040 enum plane plane;
@@ -1041,10 +1042,8 @@ struct intel_fbc {
1041 } crtc; 1042 } crtc;
1042 1043
1043 struct { 1044 struct {
1044 u64 ggtt_offset;
1045 uint32_t pixel_format; 1045 uint32_t pixel_format;
1046 unsigned int stride; 1046 unsigned int stride;
1047 int fence_reg;
1048 } fb; 1047 } fb;
1049 1048
1050 int cfb_size; 1049 int cfb_size;
@@ -3168,13 +3167,6 @@ i915_gem_object_to_ggtt(struct drm_i915_gem_object *obj,
3168 return i915_gem_obj_to_vma(obj, &to_i915(obj->base.dev)->ggtt.base, view); 3167 return i915_gem_obj_to_vma(obj, &to_i915(obj->base.dev)->ggtt.base, view);
3169} 3168}
3170 3169
3171static inline unsigned long
3172i915_gem_object_ggtt_offset(struct drm_i915_gem_object *o,
3173 const struct i915_ggtt_view *view)
3174{
3175 return i915_ggtt_offset(i915_gem_object_to_ggtt(o, view));
3176}
3177
3178/* i915_gem_fence_reg.c */ 3170/* i915_gem_fence_reg.c */
3179int __must_check i915_vma_get_fence(struct i915_vma *vma); 3171int __must_check i915_vma_get_fence(struct i915_vma *vma);
3180int __must_check i915_vma_put_fence(struct i915_vma *vma); 3172int __must_check i915_vma_put_fence(struct i915_vma *vma);
diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c
index dbe9fb41ae53..8d3e515f27ba 100644
--- a/drivers/gpu/drm/i915/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
@@ -85,6 +85,8 @@ intel_plane_duplicate_state(struct drm_plane *plane)
85 85
86 __drm_atomic_helper_plane_duplicate_state(plane, state); 86 __drm_atomic_helper_plane_duplicate_state(plane, state);
87 87
88 intel_state->vma = NULL;
89
88 return state; 90 return state;
89} 91}
90 92
@@ -100,6 +102,24 @@ void
100intel_plane_destroy_state(struct drm_plane *plane, 102intel_plane_destroy_state(struct drm_plane *plane,
101 struct drm_plane_state *state) 103 struct drm_plane_state *state)
102{ 104{
105 struct i915_vma *vma;
106
107 vma = fetch_and_zero(&to_intel_plane_state(state)->vma);
108
109 /*
110 * FIXME: Normally intel_cleanup_plane_fb handles destruction of vma.
111 * We currently don't clear all planes during driver unload, so we have
112 * to be able to unpin vma here for now.
113 *
114 * Normally this can only happen during unload when kmscon is disabled
115 * and userspace doesn't attempt to set a framebuffer at all.
116 */
117 if (vma) {
118 mutex_lock(&plane->dev->struct_mutex);
119 intel_unpin_fb_vma(vma);
120 mutex_unlock(&plane->dev->struct_mutex);
121 }
122
103 drm_atomic_helper_plane_destroy_state(plane, state); 123 drm_atomic_helper_plane_destroy_state(plane, state);
104} 124}
105 125
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index f0b9aa7a0483..f1e4a21d4664 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2235,27 +2235,22 @@ intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb, unsigned int rotation)
2235 i915_vma_pin_fence(vma); 2235 i915_vma_pin_fence(vma);
2236 } 2236 }
2237 2237
2238 i915_vma_get(vma);
2238err: 2239err:
2239 intel_runtime_pm_put(dev_priv); 2240 intel_runtime_pm_put(dev_priv);
2240 return vma; 2241 return vma;
2241} 2242}
2242 2243
2243void intel_unpin_fb_obj(struct drm_framebuffer *fb, unsigned int rotation) 2244void intel_unpin_fb_vma(struct i915_vma *vma)
2244{ 2245{
2245 struct drm_i915_gem_object *obj = intel_fb_obj(fb); 2246 lockdep_assert_held(&vma->vm->dev->struct_mutex);
2246 struct i915_ggtt_view view;
2247 struct i915_vma *vma;
2248
2249 WARN_ON(!mutex_is_locked(&obj->base.dev->struct_mutex));
2250
2251 intel_fill_fb_ggtt_view(&view, fb, rotation);
2252 vma = i915_gem_object_to_ggtt(obj, &view);
2253 2247
2254 if (WARN_ON_ONCE(!vma)) 2248 if (WARN_ON_ONCE(!vma))
2255 return; 2249 return;
2256 2250
2257 i915_vma_unpin_fence(vma); 2251 i915_vma_unpin_fence(vma);
2258 i915_gem_object_unpin_from_display_plane(vma); 2252 i915_gem_object_unpin_from_display_plane(vma);
2253 i915_vma_put(vma);
2259} 2254}
2260 2255
2261static int intel_fb_pitch(const struct drm_framebuffer *fb, int plane, 2256static int intel_fb_pitch(const struct drm_framebuffer *fb, int plane,
@@ -2750,7 +2745,6 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
2750 struct drm_device *dev = intel_crtc->base.dev; 2745 struct drm_device *dev = intel_crtc->base.dev;
2751 struct drm_i915_private *dev_priv = to_i915(dev); 2746 struct drm_i915_private *dev_priv = to_i915(dev);
2752 struct drm_crtc *c; 2747 struct drm_crtc *c;
2753 struct intel_crtc *i;
2754 struct drm_i915_gem_object *obj; 2748 struct drm_i915_gem_object *obj;
2755 struct drm_plane *primary = intel_crtc->base.primary; 2749 struct drm_plane *primary = intel_crtc->base.primary;
2756 struct drm_plane_state *plane_state = primary->state; 2750 struct drm_plane_state *plane_state = primary->state;
@@ -2775,20 +2769,20 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
2775 * an fb with another CRTC instead 2769 * an fb with another CRTC instead
2776 */ 2770 */
2777 for_each_crtc(dev, c) { 2771 for_each_crtc(dev, c) {
2778 i = to_intel_crtc(c); 2772 struct intel_plane_state *state;
2779 2773
2780 if (c == &intel_crtc->base) 2774 if (c == &intel_crtc->base)
2781 continue; 2775 continue;
2782 2776
2783 if (!i->active) 2777 if (!to_intel_crtc(c)->active)
2784 continue; 2778 continue;
2785 2779
2786 fb = c->primary->fb; 2780 state = to_intel_plane_state(c->primary->state);
2787 if (!fb) 2781 if (!state->vma)
2788 continue; 2782 continue;
2789 2783
2790 obj = intel_fb_obj(fb); 2784 if (intel_plane_ggtt_offset(state) == plane_config->base) {
2791 if (i915_gem_object_ggtt_offset(obj, NULL) == plane_config->base) { 2785 fb = c->primary->fb;
2792 drm_framebuffer_reference(fb); 2786 drm_framebuffer_reference(fb);
2793 goto valid_fb; 2787 goto valid_fb;
2794 } 2788 }
@@ -2809,6 +2803,19 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
2809 return; 2803 return;
2810 2804
2811valid_fb: 2805valid_fb:
2806 mutex_lock(&dev->struct_mutex);
2807 intel_state->vma =
2808 intel_pin_and_fence_fb_obj(fb, primary->state->rotation);
2809 mutex_unlock(&dev->struct_mutex);
2810 if (IS_ERR(intel_state->vma)) {
2811 DRM_ERROR("failed to pin boot fb on pipe %d: %li\n",
2812 intel_crtc->pipe, PTR_ERR(intel_state->vma));
2813
2814 intel_state->vma = NULL;
2815 drm_framebuffer_unreference(fb);
2816 return;
2817 }
2818
2812 plane_state->src_x = 0; 2819 plane_state->src_x = 0;
2813 plane_state->src_y = 0; 2820 plane_state->src_y = 0;
2814 plane_state->src_w = fb->width << 16; 2821 plane_state->src_w = fb->width << 16;
@@ -3104,13 +3111,13 @@ static void i9xx_update_primary_plane(struct drm_plane *primary,
3104 I915_WRITE(DSPSTRIDE(plane), fb->pitches[0]); 3111 I915_WRITE(DSPSTRIDE(plane), fb->pitches[0]);
3105 if (INTEL_GEN(dev_priv) >= 4) { 3112 if (INTEL_GEN(dev_priv) >= 4) {
3106 I915_WRITE(DSPSURF(plane), 3113 I915_WRITE(DSPSURF(plane),
3107 intel_fb_gtt_offset(fb, rotation) + 3114 intel_plane_ggtt_offset(plane_state) +
3108 intel_crtc->dspaddr_offset); 3115 intel_crtc->dspaddr_offset);
3109 I915_WRITE(DSPTILEOFF(plane), (y << 16) | x); 3116 I915_WRITE(DSPTILEOFF(plane), (y << 16) | x);
3110 I915_WRITE(DSPLINOFF(plane), linear_offset); 3117 I915_WRITE(DSPLINOFF(plane), linear_offset);
3111 } else { 3118 } else {
3112 I915_WRITE(DSPADDR(plane), 3119 I915_WRITE(DSPADDR(plane),
3113 intel_fb_gtt_offset(fb, rotation) + 3120 intel_plane_ggtt_offset(plane_state) +
3114 intel_crtc->dspaddr_offset); 3121 intel_crtc->dspaddr_offset);
3115 } 3122 }
3116 POSTING_READ(reg); 3123 POSTING_READ(reg);
@@ -3207,7 +3214,7 @@ static void ironlake_update_primary_plane(struct drm_plane *primary,
3207 3214
3208 I915_WRITE(DSPSTRIDE(plane), fb->pitches[0]); 3215 I915_WRITE(DSPSTRIDE(plane), fb->pitches[0]);
3209 I915_WRITE(DSPSURF(plane), 3216 I915_WRITE(DSPSURF(plane),
3210 intel_fb_gtt_offset(fb, rotation) + 3217 intel_plane_ggtt_offset(plane_state) +
3211 intel_crtc->dspaddr_offset); 3218 intel_crtc->dspaddr_offset);
3212 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { 3219 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
3213 I915_WRITE(DSPOFFSET(plane), (y << 16) | x); 3220 I915_WRITE(DSPOFFSET(plane), (y << 16) | x);
@@ -3230,23 +3237,6 @@ u32 intel_fb_stride_alignment(const struct drm_i915_private *dev_priv,
3230 } 3237 }
3231} 3238}
3232 3239
3233u32 intel_fb_gtt_offset(struct drm_framebuffer *fb,
3234 unsigned int rotation)
3235{
3236 struct drm_i915_gem_object *obj = intel_fb_obj(fb);
3237 struct i915_ggtt_view view;
3238 struct i915_vma *vma;
3239
3240 intel_fill_fb_ggtt_view(&view, fb, rotation);
3241
3242 vma = i915_gem_object_to_ggtt(obj, &view);
3243 if (WARN(!vma, "ggtt vma for display object not found! (view=%u)\n",
3244 view.type))
3245 return -1;
3246
3247 return i915_ggtt_offset(vma);
3248}
3249
3250static void skl_detach_scaler(struct intel_crtc *intel_crtc, int id) 3240static void skl_detach_scaler(struct intel_crtc *intel_crtc, int id)
3251{ 3241{
3252 struct drm_device *dev = intel_crtc->base.dev; 3242 struct drm_device *dev = intel_crtc->base.dev;
@@ -3441,7 +3431,7 @@ static void skylake_update_primary_plane(struct drm_plane *plane,
3441 } 3431 }
3442 3432
3443 I915_WRITE(PLANE_SURF(pipe, 0), 3433 I915_WRITE(PLANE_SURF(pipe, 0),
3444 intel_fb_gtt_offset(fb, rotation) + surf_addr); 3434 intel_plane_ggtt_offset(plane_state) + surf_addr);
3445 3435
3446 POSTING_READ(PLANE_SURF(pipe, 0)); 3436 POSTING_READ(PLANE_SURF(pipe, 0));
3447} 3437}
@@ -11536,7 +11526,7 @@ static void intel_unpin_work_fn(struct work_struct *__work)
11536 flush_work(&work->mmio_work); 11526 flush_work(&work->mmio_work);
11537 11527
11538 mutex_lock(&dev->struct_mutex); 11528 mutex_lock(&dev->struct_mutex);
11539 intel_unpin_fb_obj(work->old_fb, primary->state->rotation); 11529 intel_unpin_fb_vma(work->old_vma);
11540 i915_gem_object_put(work->pending_flip_obj); 11530 i915_gem_object_put(work->pending_flip_obj);
11541 mutex_unlock(&dev->struct_mutex); 11531 mutex_unlock(&dev->struct_mutex);
11542 11532
@@ -12246,8 +12236,10 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
12246 goto cleanup_pending; 12236 goto cleanup_pending;
12247 } 12237 }
12248 12238
12249 work->gtt_offset = intel_fb_gtt_offset(fb, primary->state->rotation); 12239 work->old_vma = to_intel_plane_state(primary->state)->vma;
12250 work->gtt_offset += intel_crtc->dspaddr_offset; 12240 to_intel_plane_state(primary->state)->vma = vma;
12241
12242 work->gtt_offset = i915_ggtt_offset(vma) + intel_crtc->dspaddr_offset;
12251 work->rotation = crtc->primary->state->rotation; 12243 work->rotation = crtc->primary->state->rotation;
12252 12244
12253 /* 12245 /*
@@ -12301,7 +12293,8 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
12301cleanup_request: 12293cleanup_request:
12302 i915_add_request_no_flush(request); 12294 i915_add_request_no_flush(request);
12303cleanup_unpin: 12295cleanup_unpin:
12304 intel_unpin_fb_obj(fb, crtc->primary->state->rotation); 12296 to_intel_plane_state(primary->state)->vma = work->old_vma;
12297 intel_unpin_fb_vma(vma);
12305cleanup_pending: 12298cleanup_pending:
12306 atomic_dec(&intel_crtc->unpin_work_count); 12299 atomic_dec(&intel_crtc->unpin_work_count);
12307unlock: 12300unlock:
@@ -14794,6 +14787,8 @@ intel_prepare_plane_fb(struct drm_plane *plane,
14794 DRM_DEBUG_KMS("failed to pin object\n"); 14787 DRM_DEBUG_KMS("failed to pin object\n");
14795 return PTR_ERR(vma); 14788 return PTR_ERR(vma);
14796 } 14789 }
14790
14791 to_intel_plane_state(new_state)->vma = vma;
14797 } 14792 }
14798 14793
14799 return 0; 14794 return 0;
@@ -14812,19 +14807,12 @@ void
14812intel_cleanup_plane_fb(struct drm_plane *plane, 14807intel_cleanup_plane_fb(struct drm_plane *plane,
14813 struct drm_plane_state *old_state) 14808 struct drm_plane_state *old_state)
14814{ 14809{
14815 struct drm_i915_private *dev_priv = to_i915(plane->dev); 14810 struct i915_vma *vma;
14816 struct intel_plane_state *old_intel_state;
14817 struct drm_i915_gem_object *old_obj = intel_fb_obj(old_state->fb);
14818 struct drm_i915_gem_object *obj = intel_fb_obj(plane->state->fb);
14819
14820 old_intel_state = to_intel_plane_state(old_state);
14821
14822 if (!obj && !old_obj)
14823 return;
14824 14811
14825 if (old_obj && (plane->type != DRM_PLANE_TYPE_CURSOR || 14812 /* Should only be called after a successful intel_prepare_plane_fb()! */
14826 !INTEL_INFO(dev_priv)->cursor_needs_physical)) 14813 vma = fetch_and_zero(&to_intel_plane_state(old_state)->vma);
14827 intel_unpin_fb_obj(old_state->fb, old_state->rotation); 14814 if (vma)
14815 intel_unpin_fb_vma(vma);
14828} 14816}
14829 14817
14830int 14818int
@@ -15166,7 +15154,7 @@ intel_update_cursor_plane(struct drm_plane *plane,
15166 if (!obj) 15154 if (!obj)
15167 addr = 0; 15155 addr = 0;
15168 else if (!INTEL_INFO(dev_priv)->cursor_needs_physical) 15156 else if (!INTEL_INFO(dev_priv)->cursor_needs_physical)
15169 addr = i915_gem_object_ggtt_offset(obj, NULL); 15157 addr = intel_plane_ggtt_offset(state);
15170 else 15158 else
15171 addr = obj->phys_handle->busaddr; 15159 addr = obj->phys_handle->busaddr;
15172 15160
@@ -17066,41 +17054,12 @@ void intel_display_resume(struct drm_device *dev)
17066void intel_modeset_gem_init(struct drm_device *dev) 17054void intel_modeset_gem_init(struct drm_device *dev)
17067{ 17055{
17068 struct drm_i915_private *dev_priv = to_i915(dev); 17056 struct drm_i915_private *dev_priv = to_i915(dev);
17069 struct drm_crtc *c;
17070 struct drm_i915_gem_object *obj;
17071 17057
17072 intel_init_gt_powersave(dev_priv); 17058 intel_init_gt_powersave(dev_priv);
17073 17059
17074 intel_modeset_init_hw(dev); 17060 intel_modeset_init_hw(dev);
17075 17061
17076 intel_setup_overlay(dev_priv); 17062 intel_setup_overlay(dev_priv);
17077
17078 /*
17079 * Make sure any fbs we allocated at startup are properly
17080 * pinned & fenced. When we do the allocation it's too early
17081 * for this.
17082 */
17083 for_each_crtc(dev, c) {
17084 struct i915_vma *vma;
17085
17086 obj = intel_fb_obj(c->primary->fb);
17087 if (obj == NULL)
17088 continue;
17089
17090 mutex_lock(&dev->struct_mutex);
17091 vma = intel_pin_and_fence_fb_obj(c->primary->fb,
17092 c->primary->state->rotation);
17093 mutex_unlock(&dev->struct_mutex);
17094 if (IS_ERR(vma)) {
17095 DRM_ERROR("failed to pin boot fb on pipe %d\n",
17096 to_intel_crtc(c)->pipe);
17097 drm_framebuffer_unreference(c->primary->fb);
17098 c->primary->fb = NULL;
17099 c->primary->crtc = c->primary->state->crtc = NULL;
17100 update_state_fb(c->primary);
17101 c->state->plane_mask &= ~(1 << drm_plane_index(c->primary));
17102 }
17103 }
17104} 17063}
17105 17064
17106int intel_connector_register(struct drm_connector *connector) 17065int intel_connector_register(struct drm_connector *connector)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index cd72ae171eeb..03a2112004f9 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -377,6 +377,7 @@ struct intel_atomic_state {
377struct intel_plane_state { 377struct intel_plane_state {
378 struct drm_plane_state base; 378 struct drm_plane_state base;
379 struct drm_rect clip; 379 struct drm_rect clip;
380 struct i915_vma *vma;
380 381
381 struct { 382 struct {
382 u32 offset; 383 u32 offset;
@@ -1046,6 +1047,7 @@ struct intel_flip_work {
1046 struct work_struct mmio_work; 1047 struct work_struct mmio_work;
1047 1048
1048 struct drm_crtc *crtc; 1049 struct drm_crtc *crtc;
1050 struct i915_vma *old_vma;
1049 struct drm_framebuffer *old_fb; 1051 struct drm_framebuffer *old_fb;
1050 struct drm_i915_gem_object *pending_flip_obj; 1052 struct drm_i915_gem_object *pending_flip_obj;
1051 struct drm_pending_vblank_event *event; 1053 struct drm_pending_vblank_event *event;
@@ -1273,7 +1275,7 @@ void intel_release_load_detect_pipe(struct drm_connector *connector,
1273 struct drm_modeset_acquire_ctx *ctx); 1275 struct drm_modeset_acquire_ctx *ctx);
1274struct i915_vma * 1276struct i915_vma *
1275intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb, unsigned int rotation); 1277intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb, unsigned int rotation);
1276void intel_unpin_fb_obj(struct drm_framebuffer *fb, unsigned int rotation); 1278void intel_unpin_fb_vma(struct i915_vma *vma);
1277struct drm_framebuffer * 1279struct drm_framebuffer *
1278__intel_framebuffer_create(struct drm_device *dev, 1280__intel_framebuffer_create(struct drm_device *dev,
1279 struct drm_mode_fb_cmd2 *mode_cmd, 1281 struct drm_mode_fb_cmd2 *mode_cmd,
@@ -1362,7 +1364,10 @@ void intel_mode_from_pipe_config(struct drm_display_mode *mode,
1362int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state); 1364int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state);
1363int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state); 1365int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state);
1364 1366
1365u32 intel_fb_gtt_offset(struct drm_framebuffer *fb, unsigned int rotation); 1367static inline u32 intel_plane_ggtt_offset(const struct intel_plane_state *state)
1368{
1369 return i915_ggtt_offset(state->vma);
1370}
1366 1371
1367u32 skl_plane_ctl_format(uint32_t pixel_format); 1372u32 skl_plane_ctl_format(uint32_t pixel_format);
1368u32 skl_plane_ctl_tiling(uint64_t fb_modifier); 1373u32 skl_plane_ctl_tiling(uint64_t fb_modifier);
diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
index 62f215b12eb5..f3a1d6a5cabe 100644
--- a/drivers/gpu/drm/i915/intel_fbc.c
+++ b/drivers/gpu/drm/i915/intel_fbc.c
@@ -173,7 +173,7 @@ static void i8xx_fbc_activate(struct drm_i915_private *dev_priv)
173 if (IS_I945GM(dev_priv)) 173 if (IS_I945GM(dev_priv))
174 fbc_ctl |= FBC_CTL_C3_IDLE; /* 945 needs special SR handling */ 174 fbc_ctl |= FBC_CTL_C3_IDLE; /* 945 needs special SR handling */
175 fbc_ctl |= (cfb_pitch & 0xff) << FBC_CTL_STRIDE_SHIFT; 175 fbc_ctl |= (cfb_pitch & 0xff) << FBC_CTL_STRIDE_SHIFT;
176 fbc_ctl |= params->fb.fence_reg; 176 fbc_ctl |= params->vma->fence->id;
177 I915_WRITE(FBC_CONTROL, fbc_ctl); 177 I915_WRITE(FBC_CONTROL, fbc_ctl);
178} 178}
179 179
@@ -193,8 +193,8 @@ static void g4x_fbc_activate(struct drm_i915_private *dev_priv)
193 else 193 else
194 dpfc_ctl |= DPFC_CTL_LIMIT_1X; 194 dpfc_ctl |= DPFC_CTL_LIMIT_1X;
195 195
196 if (params->fb.fence_reg != I915_FENCE_REG_NONE) { 196 if (params->vma->fence) {
197 dpfc_ctl |= DPFC_CTL_FENCE_EN | params->fb.fence_reg; 197 dpfc_ctl |= DPFC_CTL_FENCE_EN | params->vma->fence->id;
198 I915_WRITE(DPFC_FENCE_YOFF, params->crtc.fence_y_offset); 198 I915_WRITE(DPFC_FENCE_YOFF, params->crtc.fence_y_offset);
199 } else { 199 } else {
200 I915_WRITE(DPFC_FENCE_YOFF, 0); 200 I915_WRITE(DPFC_FENCE_YOFF, 0);
@@ -251,13 +251,14 @@ static void ilk_fbc_activate(struct drm_i915_private *dev_priv)
251 break; 251 break;
252 } 252 }
253 253
254 if (params->fb.fence_reg != I915_FENCE_REG_NONE) { 254 if (params->vma->fence) {
255 dpfc_ctl |= DPFC_CTL_FENCE_EN; 255 dpfc_ctl |= DPFC_CTL_FENCE_EN;
256 if (IS_GEN5(dev_priv)) 256 if (IS_GEN5(dev_priv))
257 dpfc_ctl |= params->fb.fence_reg; 257 dpfc_ctl |= params->vma->fence->id;
258 if (IS_GEN6(dev_priv)) { 258 if (IS_GEN6(dev_priv)) {
259 I915_WRITE(SNB_DPFC_CTL_SA, 259 I915_WRITE(SNB_DPFC_CTL_SA,
260 SNB_CPU_FENCE_ENABLE | params->fb.fence_reg); 260 SNB_CPU_FENCE_ENABLE |
261 params->vma->fence->id);
261 I915_WRITE(DPFC_CPU_FENCE_OFFSET, 262 I915_WRITE(DPFC_CPU_FENCE_OFFSET,
262 params->crtc.fence_y_offset); 263 params->crtc.fence_y_offset);
263 } 264 }
@@ -269,7 +270,8 @@ static void ilk_fbc_activate(struct drm_i915_private *dev_priv)
269 } 270 }
270 271
271 I915_WRITE(ILK_DPFC_FENCE_YOFF, params->crtc.fence_y_offset); 272 I915_WRITE(ILK_DPFC_FENCE_YOFF, params->crtc.fence_y_offset);
272 I915_WRITE(ILK_FBC_RT_BASE, params->fb.ggtt_offset | ILK_FBC_RT_VALID); 273 I915_WRITE(ILK_FBC_RT_BASE,
274 i915_ggtt_offset(params->vma) | ILK_FBC_RT_VALID);
273 /* enable it... */ 275 /* enable it... */
274 I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN); 276 I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);
275 277
@@ -319,10 +321,11 @@ static void gen7_fbc_activate(struct drm_i915_private *dev_priv)
319 break; 321 break;
320 } 322 }
321 323
322 if (params->fb.fence_reg != I915_FENCE_REG_NONE) { 324 if (params->vma->fence) {
323 dpfc_ctl |= IVB_DPFC_CTL_FENCE_EN; 325 dpfc_ctl |= IVB_DPFC_CTL_FENCE_EN;
324 I915_WRITE(SNB_DPFC_CTL_SA, 326 I915_WRITE(SNB_DPFC_CTL_SA,
325 SNB_CPU_FENCE_ENABLE | params->fb.fence_reg); 327 SNB_CPU_FENCE_ENABLE |
328 params->vma->fence->id);
326 I915_WRITE(DPFC_CPU_FENCE_OFFSET, params->crtc.fence_y_offset); 329 I915_WRITE(DPFC_CPU_FENCE_OFFSET, params->crtc.fence_y_offset);
327 } else { 330 } else {
328 I915_WRITE(SNB_DPFC_CTL_SA,0); 331 I915_WRITE(SNB_DPFC_CTL_SA,0);
@@ -727,14 +730,6 @@ static bool intel_fbc_hw_tracking_covers_screen(struct intel_crtc *crtc)
727 return effective_w <= max_w && effective_h <= max_h; 730 return effective_w <= max_w && effective_h <= max_h;
728} 731}
729 732
730/* XXX replace me when we have VMA tracking for intel_plane_state */
731static int get_fence_id(struct drm_framebuffer *fb)
732{
733 struct i915_vma *vma = i915_gem_object_to_ggtt(intel_fb_obj(fb), NULL);
734
735 return vma && vma->fence ? vma->fence->id : I915_FENCE_REG_NONE;
736}
737
738static void intel_fbc_update_state_cache(struct intel_crtc *crtc, 733static void intel_fbc_update_state_cache(struct intel_crtc *crtc,
739 struct intel_crtc_state *crtc_state, 734 struct intel_crtc_state *crtc_state,
740 struct intel_plane_state *plane_state) 735 struct intel_plane_state *plane_state)
@@ -743,7 +738,8 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc,
743 struct intel_fbc *fbc = &dev_priv->fbc; 738 struct intel_fbc *fbc = &dev_priv->fbc;
744 struct intel_fbc_state_cache *cache = &fbc->state_cache; 739 struct intel_fbc_state_cache *cache = &fbc->state_cache;
745 struct drm_framebuffer *fb = plane_state->base.fb; 740 struct drm_framebuffer *fb = plane_state->base.fb;
746 struct drm_i915_gem_object *obj; 741
742 cache->vma = NULL;
747 743
748 cache->crtc.mode_flags = crtc_state->base.adjusted_mode.flags; 744 cache->crtc.mode_flags = crtc_state->base.adjusted_mode.flags;
749 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) 745 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
@@ -758,16 +754,10 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc,
758 if (!cache->plane.visible) 754 if (!cache->plane.visible)
759 return; 755 return;
760 756
761 obj = intel_fb_obj(fb);
762
763 /* FIXME: We lack the proper locking here, so only run this on the
764 * platforms that need. */
765 if (IS_GEN(dev_priv, 5, 6))
766 cache->fb.ilk_ggtt_offset = i915_gem_object_ggtt_offset(obj, NULL);
767 cache->fb.pixel_format = fb->pixel_format; 757 cache->fb.pixel_format = fb->pixel_format;
768 cache->fb.stride = fb->pitches[0]; 758 cache->fb.stride = fb->pitches[0];
769 cache->fb.fence_reg = get_fence_id(fb); 759
770 cache->fb.tiling_mode = i915_gem_object_get_tiling(obj); 760 cache->vma = plane_state->vma;
771} 761}
772 762
773static bool intel_fbc_can_activate(struct intel_crtc *crtc) 763static bool intel_fbc_can_activate(struct intel_crtc *crtc)
@@ -784,7 +774,7 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc)
784 return false; 774 return false;
785 } 775 }
786 776
787 if (!cache->plane.visible) { 777 if (!cache->vma) {
788 fbc->no_fbc_reason = "primary plane not visible"; 778 fbc->no_fbc_reason = "primary plane not visible";
789 return false; 779 return false;
790 } 780 }
@@ -807,8 +797,7 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc)
807 * so have no fence associated with it) due to aperture constaints 797 * so have no fence associated with it) due to aperture constaints
808 * at the time of pinning. 798 * at the time of pinning.
809 */ 799 */
810 if (cache->fb.tiling_mode != I915_TILING_X || 800 if (!cache->vma->fence) {
811 cache->fb.fence_reg == I915_FENCE_REG_NONE) {
812 fbc->no_fbc_reason = "framebuffer not tiled or fenced"; 801 fbc->no_fbc_reason = "framebuffer not tiled or fenced";
813 return false; 802 return false;
814 } 803 }
@@ -888,17 +877,16 @@ static void intel_fbc_get_reg_params(struct intel_crtc *crtc,
888 * zero. */ 877 * zero. */
889 memset(params, 0, sizeof(*params)); 878 memset(params, 0, sizeof(*params));
890 879
880 params->vma = cache->vma;
881
891 params->crtc.pipe = crtc->pipe; 882 params->crtc.pipe = crtc->pipe;
892 params->crtc.plane = crtc->plane; 883 params->crtc.plane = crtc->plane;
893 params->crtc.fence_y_offset = get_crtc_fence_y_offset(crtc); 884 params->crtc.fence_y_offset = get_crtc_fence_y_offset(crtc);
894 885
895 params->fb.pixel_format = cache->fb.pixel_format; 886 params->fb.pixel_format = cache->fb.pixel_format;
896 params->fb.stride = cache->fb.stride; 887 params->fb.stride = cache->fb.stride;
897 params->fb.fence_reg = cache->fb.fence_reg;
898 888
899 params->cfb_size = intel_fbc_calculate_cfb_size(dev_priv, cache); 889 params->cfb_size = intel_fbc_calculate_cfb_size(dev_priv, cache);
900
901 params->fb.ggtt_offset = cache->fb.ilk_ggtt_offset;
902} 890}
903 891
904static bool intel_fbc_reg_params_equal(struct intel_fbc_reg_params *params1, 892static bool intel_fbc_reg_params_equal(struct intel_fbc_reg_params *params1,
diff --git a/drivers/gpu/drm/i915/intel_fbdev.c b/drivers/gpu/drm/i915/intel_fbdev.c
index 8cf2d80f2254..f4a8c4fc57c4 100644
--- a/drivers/gpu/drm/i915/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/intel_fbdev.c
@@ -284,7 +284,7 @@ static int intelfb_create(struct drm_fb_helper *helper,
284out_destroy_fbi: 284out_destroy_fbi:
285 drm_fb_helper_release_fbi(helper); 285 drm_fb_helper_release_fbi(helper);
286out_unpin: 286out_unpin:
287 intel_unpin_fb_obj(&ifbdev->fb->base, DRM_ROTATE_0); 287 intel_unpin_fb_vma(vma);
288out_unlock: 288out_unlock:
289 mutex_unlock(&dev->struct_mutex); 289 mutex_unlock(&dev->struct_mutex);
290 return ret; 290 return ret;
@@ -549,7 +549,7 @@ static void intel_fbdev_destroy(struct intel_fbdev *ifbdev)
549 549
550 if (ifbdev->fb) { 550 if (ifbdev->fb) {
551 mutex_lock(&ifbdev->helper.dev->struct_mutex); 551 mutex_lock(&ifbdev->helper.dev->struct_mutex);
552 intel_unpin_fb_obj(&ifbdev->fb->base, DRM_ROTATE_0); 552 intel_unpin_fb_vma(ifbdev->vma);
553 mutex_unlock(&ifbdev->helper.dev->struct_mutex); 553 mutex_unlock(&ifbdev->helper.dev->struct_mutex);
554 554
555 drm_framebuffer_remove(&ifbdev->fb->base); 555 drm_framebuffer_remove(&ifbdev->fb->base);
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 8f131a08d440..242a73e66d82 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -273,7 +273,7 @@ skl_update_plane(struct drm_plane *drm_plane,
273 273
274 I915_WRITE(PLANE_CTL(pipe, plane), plane_ctl); 274 I915_WRITE(PLANE_CTL(pipe, plane), plane_ctl);
275 I915_WRITE(PLANE_SURF(pipe, plane), 275 I915_WRITE(PLANE_SURF(pipe, plane),
276 intel_fb_gtt_offset(fb, rotation) + surf_addr); 276 intel_plane_ggtt_offset(plane_state) + surf_addr);
277 POSTING_READ(PLANE_SURF(pipe, plane)); 277 POSTING_READ(PLANE_SURF(pipe, plane));
278} 278}
279 279
@@ -458,7 +458,7 @@ vlv_update_plane(struct drm_plane *dplane,
458 I915_WRITE(SPSIZE(pipe, plane), (crtc_h << 16) | crtc_w); 458 I915_WRITE(SPSIZE(pipe, plane), (crtc_h << 16) | crtc_w);
459 I915_WRITE(SPCNTR(pipe, plane), sprctl); 459 I915_WRITE(SPCNTR(pipe, plane), sprctl);
460 I915_WRITE(SPSURF(pipe, plane), 460 I915_WRITE(SPSURF(pipe, plane),
461 intel_fb_gtt_offset(fb, rotation) + sprsurf_offset); 461 intel_plane_ggtt_offset(plane_state) + sprsurf_offset);
462 POSTING_READ(SPSURF(pipe, plane)); 462 POSTING_READ(SPSURF(pipe, plane));
463} 463}
464 464
@@ -594,7 +594,7 @@ ivb_update_plane(struct drm_plane *plane,
594 I915_WRITE(SPRSCALE(pipe), sprscale); 594 I915_WRITE(SPRSCALE(pipe), sprscale);
595 I915_WRITE(SPRCTL(pipe), sprctl); 595 I915_WRITE(SPRCTL(pipe), sprctl);
596 I915_WRITE(SPRSURF(pipe), 596 I915_WRITE(SPRSURF(pipe),
597 intel_fb_gtt_offset(fb, rotation) + sprsurf_offset); 597 intel_plane_ggtt_offset(plane_state) + sprsurf_offset);
598 POSTING_READ(SPRSURF(pipe)); 598 POSTING_READ(SPRSURF(pipe));
599} 599}
600 600
@@ -721,7 +721,7 @@ ilk_update_plane(struct drm_plane *plane,
721 I915_WRITE(DVSSCALE(pipe), dvsscale); 721 I915_WRITE(DVSSCALE(pipe), dvsscale);
722 I915_WRITE(DVSCNTR(pipe), dvscntr); 722 I915_WRITE(DVSCNTR(pipe), dvscntr);
723 I915_WRITE(DVSSURF(pipe), 723 I915_WRITE(DVSSURF(pipe),
724 intel_fb_gtt_offset(fb, rotation) + dvssurf_offset); 724 intel_plane_ggtt_offset(plane_state) + dvssurf_offset);
725 POSTING_READ(DVSSURF(pipe)); 725 POSTING_READ(DVSSURF(pipe));
726} 726}
727 727
diff --git a/drivers/gpu/drm/nouveau/dispnv04/hw.c b/drivers/gpu/drm/nouveau/dispnv04/hw.c
index 74856a8b8f35..e64f52464ecf 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/hw.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/hw.c
@@ -222,6 +222,7 @@ nouveau_hw_get_clock(struct drm_device *dev, enum nvbios_pll_type plltype)
222 uint32_t mpllP; 222 uint32_t mpllP;
223 223
224 pci_read_config_dword(pci_get_bus_and_slot(0, 3), 0x6c, &mpllP); 224 pci_read_config_dword(pci_get_bus_and_slot(0, 3), 0x6c, &mpllP);
225 mpllP = (mpllP >> 8) & 0xf;
225 if (!mpllP) 226 if (!mpllP)
226 mpllP = 4; 227 mpllP = 4;
227 228
@@ -232,7 +233,7 @@ nouveau_hw_get_clock(struct drm_device *dev, enum nvbios_pll_type plltype)
232 uint32_t clock; 233 uint32_t clock;
233 234
234 pci_read_config_dword(pci_get_bus_and_slot(0, 5), 0x4c, &clock); 235 pci_read_config_dword(pci_get_bus_and_slot(0, 5), 0x4c, &clock);
235 return clock; 236 return clock / 1000;
236 } 237 }
237 238
238 ret = nouveau_hw_get_pllvals(dev, plltype, &pllvals); 239 ret = nouveau_hw_get_pllvals(dev, plltype, &pllvals);
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.h b/drivers/gpu/drm/nouveau/nouveau_fence.h
index ccdce1b4eec4..d5e58a38f160 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fence.h
+++ b/drivers/gpu/drm/nouveau/nouveau_fence.h
@@ -99,6 +99,7 @@ struct nv84_fence_priv {
99 struct nouveau_bo *bo; 99 struct nouveau_bo *bo;
100 struct nouveau_bo *bo_gart; 100 struct nouveau_bo *bo_gart;
101 u32 *suspend; 101 u32 *suspend;
102 struct mutex mutex;
102}; 103};
103 104
104int nv84_fence_context_new(struct nouveau_channel *); 105int nv84_fence_context_new(struct nouveau_channel *);
diff --git a/drivers/gpu/drm/nouveau/nouveau_led.h b/drivers/gpu/drm/nouveau/nouveau_led.h
index 187ecdb82002..21a5775028cc 100644
--- a/drivers/gpu/drm/nouveau/nouveau_led.h
+++ b/drivers/gpu/drm/nouveau/nouveau_led.h
@@ -42,7 +42,7 @@ nouveau_led(struct drm_device *dev)
42} 42}
43 43
44/* nouveau_led.c */ 44/* nouveau_led.c */
45#if IS_ENABLED(CONFIG_LEDS_CLASS) 45#if IS_REACHABLE(CONFIG_LEDS_CLASS)
46int nouveau_led_init(struct drm_device *dev); 46int nouveau_led_init(struct drm_device *dev);
47void nouveau_led_suspend(struct drm_device *dev); 47void nouveau_led_suspend(struct drm_device *dev);
48void nouveau_led_resume(struct drm_device *dev); 48void nouveau_led_resume(struct drm_device *dev);
diff --git a/drivers/gpu/drm/nouveau/nouveau_usif.c b/drivers/gpu/drm/nouveau/nouveau_usif.c
index 08f9c6fa0f7f..1fba38622744 100644
--- a/drivers/gpu/drm/nouveau/nouveau_usif.c
+++ b/drivers/gpu/drm/nouveau/nouveau_usif.c
@@ -313,7 +313,8 @@ usif_ioctl(struct drm_file *filp, void __user *user, u32 argc)
313 if (!(ret = nvif_unpack(-ENOSYS, &data, &size, argv->v0, 0, 0, true))) { 313 if (!(ret = nvif_unpack(-ENOSYS, &data, &size, argv->v0, 0, 0, true))) {
314 /* block access to objects not created via this interface */ 314 /* block access to objects not created via this interface */
315 owner = argv->v0.owner; 315 owner = argv->v0.owner;
316 if (argv->v0.object == 0ULL) 316 if (argv->v0.object == 0ULL &&
317 argv->v0.type != NVIF_IOCTL_V0_DEL)
317 argv->v0.owner = NVDRM_OBJECT_ANY; /* except client */ 318 argv->v0.owner = NVDRM_OBJECT_ANY; /* except client */
318 else 319 else
319 argv->v0.owner = NVDRM_OBJECT_USIF; 320 argv->v0.owner = NVDRM_OBJECT_USIF;
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
index 2c2c64507661..32097fd615fd 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -4052,6 +4052,11 @@ nv50_disp_atomic_commit_tail(struct drm_atomic_state *state)
4052 } 4052 }
4053 } 4053 }
4054 4054
4055 for_each_crtc_in_state(state, crtc, crtc_state, i) {
4056 if (crtc->state->event)
4057 drm_crtc_vblank_get(crtc);
4058 }
4059
4055 /* Update plane(s). */ 4060 /* Update plane(s). */
4056 for_each_plane_in_state(state, plane, plane_state, i) { 4061 for_each_plane_in_state(state, plane, plane_state, i) {
4057 struct nv50_wndw_atom *asyw = nv50_wndw_atom(plane->state); 4062 struct nv50_wndw_atom *asyw = nv50_wndw_atom(plane->state);
@@ -4101,6 +4106,7 @@ nv50_disp_atomic_commit_tail(struct drm_atomic_state *state)
4101 drm_crtc_send_vblank_event(crtc, crtc->state->event); 4106 drm_crtc_send_vblank_event(crtc, crtc->state->event);
4102 spin_unlock_irqrestore(&crtc->dev->event_lock, flags); 4107 spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
4103 crtc->state->event = NULL; 4108 crtc->state->event = NULL;
4109 drm_crtc_vblank_put(crtc);
4104 } 4110 }
4105 } 4111 }
4106 4112
diff --git a/drivers/gpu/drm/nouveau/nv84_fence.c b/drivers/gpu/drm/nouveau/nv84_fence.c
index 52b87ae83e7b..f0b322bec7df 100644
--- a/drivers/gpu/drm/nouveau/nv84_fence.c
+++ b/drivers/gpu/drm/nouveau/nv84_fence.c
@@ -107,8 +107,10 @@ nv84_fence_context_del(struct nouveau_channel *chan)
107 struct nv84_fence_chan *fctx = chan->fence; 107 struct nv84_fence_chan *fctx = chan->fence;
108 108
109 nouveau_bo_wr32(priv->bo, chan->chid * 16 / 4, fctx->base.sequence); 109 nouveau_bo_wr32(priv->bo, chan->chid * 16 / 4, fctx->base.sequence);
110 mutex_lock(&priv->mutex);
110 nouveau_bo_vma_del(priv->bo, &fctx->vma_gart); 111 nouveau_bo_vma_del(priv->bo, &fctx->vma_gart);
111 nouveau_bo_vma_del(priv->bo, &fctx->vma); 112 nouveau_bo_vma_del(priv->bo, &fctx->vma);
113 mutex_unlock(&priv->mutex);
112 nouveau_fence_context_del(&fctx->base); 114 nouveau_fence_context_del(&fctx->base);
113 chan->fence = NULL; 115 chan->fence = NULL;
114 nouveau_fence_context_free(&fctx->base); 116 nouveau_fence_context_free(&fctx->base);
@@ -134,11 +136,13 @@ nv84_fence_context_new(struct nouveau_channel *chan)
134 fctx->base.sync32 = nv84_fence_sync32; 136 fctx->base.sync32 = nv84_fence_sync32;
135 fctx->base.sequence = nv84_fence_read(chan); 137 fctx->base.sequence = nv84_fence_read(chan);
136 138
139 mutex_lock(&priv->mutex);
137 ret = nouveau_bo_vma_add(priv->bo, cli->vm, &fctx->vma); 140 ret = nouveau_bo_vma_add(priv->bo, cli->vm, &fctx->vma);
138 if (ret == 0) { 141 if (ret == 0) {
139 ret = nouveau_bo_vma_add(priv->bo_gart, cli->vm, 142 ret = nouveau_bo_vma_add(priv->bo_gart, cli->vm,
140 &fctx->vma_gart); 143 &fctx->vma_gart);
141 } 144 }
145 mutex_unlock(&priv->mutex);
142 146
143 if (ret) 147 if (ret)
144 nv84_fence_context_del(chan); 148 nv84_fence_context_del(chan);
@@ -212,6 +216,8 @@ nv84_fence_create(struct nouveau_drm *drm)
212 priv->base.context_base = dma_fence_context_alloc(priv->base.contexts); 216 priv->base.context_base = dma_fence_context_alloc(priv->base.contexts);
213 priv->base.uevent = true; 217 priv->base.uevent = true;
214 218
219 mutex_init(&priv->mutex);
220
215 /* Use VRAM if there is any ; otherwise fallback to system memory */ 221 /* Use VRAM if there is any ; otherwise fallback to system memory */
216 domain = drm->device.info.ram_size != 0 ? TTM_PL_FLAG_VRAM : 222 domain = drm->device.info.ram_size != 0 ? TTM_PL_FLAG_VRAM :
217 /* 223 /*
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagt215.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagt215.c
index 6f0436df0219..f8f2f16c22a2 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagt215.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagt215.c
@@ -59,7 +59,7 @@ gt215_hda_eld(NV50_DISP_MTHD_V1)
59 ); 59 );
60 } 60 }
61 for (i = 0; i < size; i++) 61 for (i = 0; i < size; i++)
62 nvkm_wr32(device, 0x61c440 + soff, (i << 8) | args->v0.data[0]); 62 nvkm_wr32(device, 0x61c440 + soff, (i << 8) | args->v0.data[i]);
63 for (; i < 0x60; i++) 63 for (; i < 0x60; i++)
64 nvkm_wr32(device, 0x61c440 + soff, (i << 8)); 64 nvkm_wr32(device, 0x61c440 + soff, (i << 8));
65 nvkm_mask(device, 0x61c448 + soff, 0x80000003, 0x80000003); 65 nvkm_mask(device, 0x61c448 + soff, 0x80000003, 0x80000003);
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c
index 567466f93cd5..0db8efbf1c2e 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c
@@ -433,8 +433,6 @@ nv50_disp_dptmds_war(struct nvkm_device *device)
433 case 0x94: 433 case 0x94:
434 case 0x96: 434 case 0x96:
435 case 0x98: 435 case 0x98:
436 case 0xaa:
437 case 0xac:
438 return true; 436 return true;
439 default: 437 default:
440 break; 438 break;
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index e0c143b865f3..30bd4a6a9d46 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -97,9 +97,10 @@
97 * 2.46.0 - Add PFP_SYNC_ME support on evergreen 97 * 2.46.0 - Add PFP_SYNC_ME support on evergreen
98 * 2.47.0 - Add UVD_NO_OP register support 98 * 2.47.0 - Add UVD_NO_OP register support
99 * 2.48.0 - TA_CS_BC_BASE_ADDR allowed on SI 99 * 2.48.0 - TA_CS_BC_BASE_ADDR allowed on SI
100 * 2.49.0 - DRM_RADEON_GEM_INFO ioctl returns correct vram_size/visible values
100 */ 101 */
101#define KMS_DRIVER_MAJOR 2 102#define KMS_DRIVER_MAJOR 2
102#define KMS_DRIVER_MINOR 48 103#define KMS_DRIVER_MINOR 49
103#define KMS_DRIVER_PATCHLEVEL 0 104#define KMS_DRIVER_PATCHLEVEL 0
104int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); 105int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
105int radeon_driver_unload_kms(struct drm_device *dev); 106int radeon_driver_unload_kms(struct drm_device *dev);
diff --git a/drivers/gpu/drm/radeon/radeon_gem.c b/drivers/gpu/drm/radeon/radeon_gem.c
index 0bcffd8a7bd3..96683f5b2b1b 100644
--- a/drivers/gpu/drm/radeon/radeon_gem.c
+++ b/drivers/gpu/drm/radeon/radeon_gem.c
@@ -220,8 +220,8 @@ int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
220 220
221 man = &rdev->mman.bdev.man[TTM_PL_VRAM]; 221 man = &rdev->mman.bdev.man[TTM_PL_VRAM];
222 222
223 args->vram_size = rdev->mc.real_vram_size; 223 args->vram_size = (u64)man->size << PAGE_SHIFT;
224 args->vram_visible = (u64)man->size << PAGE_SHIFT; 224 args->vram_visible = rdev->mc.visible_vram_size;
225 args->vram_visible -= rdev->vram_pin_size; 225 args->vram_visible -= rdev->vram_pin_size;
226 args->gart_size = rdev->mc.gtt_size; 226 args->gart_size = rdev->mc.gtt_size;
227 args->gart_size -= rdev->gart_pin_size; 227 args->gart_size -= rdev->gart_pin_size;
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index 192016e2b518..9c4ee144b5f6 100644
--- a/include/drm/drmP.h
+++ b/include/drm/drmP.h
@@ -517,6 +517,7 @@ struct drm_device {
517 struct drm_minor *control; /**< Control node */ 517 struct drm_minor *control; /**< Control node */
518 struct drm_minor *primary; /**< Primary node */ 518 struct drm_minor *primary; /**< Primary node */
519 struct drm_minor *render; /**< Render node */ 519 struct drm_minor *render; /**< Render node */
520 bool registered;
520 521
521 /* currently active master for this device. Protected by master_mutex */ 522 /* currently active master for this device. Protected by master_mutex */
522 struct drm_master *master; 523 struct drm_master *master;
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index a9b95246e26e..045a97cbeba2 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -381,6 +381,8 @@ struct drm_connector_funcs {
381 * core drm connector interfaces. Everything added from this callback 381 * core drm connector interfaces. Everything added from this callback
382 * should be unregistered in the early_unregister callback. 382 * should be unregistered in the early_unregister callback.
383 * 383 *
384 * This is called while holding drm_connector->mutex.
385 *
384 * Returns: 386 * Returns:
385 * 387 *
386 * 0 on success, or a negative error code on failure. 388 * 0 on success, or a negative error code on failure.
@@ -395,6 +397,8 @@ struct drm_connector_funcs {
395 * late_register(). It is called from drm_connector_unregister(), 397 * late_register(). It is called from drm_connector_unregister(),
396 * early in the driver unload sequence to disable userspace access 398 * early in the driver unload sequence to disable userspace access
397 * before data structures are torndown. 399 * before data structures are torndown.
400 *
401 * This is called while holding drm_connector->mutex.
398 */ 402 */
399 void (*early_unregister)(struct drm_connector *connector); 403 void (*early_unregister)(struct drm_connector *connector);
400 404
@@ -559,7 +563,6 @@ struct drm_cmdline_mode {
559 * @interlace_allowed: can this connector handle interlaced modes? 563 * @interlace_allowed: can this connector handle interlaced modes?
560 * @doublescan_allowed: can this connector handle doublescan? 564 * @doublescan_allowed: can this connector handle doublescan?
561 * @stereo_allowed: can this connector handle stereo modes? 565 * @stereo_allowed: can this connector handle stereo modes?
562 * @registered: is this connector exposed (registered) with userspace?
563 * @modes: modes available on this connector (from fill_modes() + user) 566 * @modes: modes available on this connector (from fill_modes() + user)
564 * @status: one of the drm_connector_status enums (connected, not, or unknown) 567 * @status: one of the drm_connector_status enums (connected, not, or unknown)
565 * @probed_modes: list of modes derived directly from the display 568 * @probed_modes: list of modes derived directly from the display
@@ -608,6 +611,13 @@ struct drm_connector {
608 char *name; 611 char *name;
609 612
610 /** 613 /**
614 * @mutex: Lock for general connector state, but currently only protects
615 * @registered. Most of the connector state is still protected by the
616 * mutex in &drm_mode_config.
617 */
618 struct mutex mutex;
619
620 /**
611 * @index: Compacted connector index, which matches the position inside 621 * @index: Compacted connector index, which matches the position inside
612 * the mode_config.list for drivers not supporting hot-add/removing. Can 622 * the mode_config.list for drivers not supporting hot-add/removing. Can
613 * be used as an array index. It is invariant over the lifetime of the 623 * be used as an array index. It is invariant over the lifetime of the
@@ -620,6 +630,10 @@ struct drm_connector {
620 bool interlace_allowed; 630 bool interlace_allowed;
621 bool doublescan_allowed; 631 bool doublescan_allowed;
622 bool stereo_allowed; 632 bool stereo_allowed;
633 /**
634 * @registered: Is this connector exposed (registered) with userspace?
635 * Protected by @mutex.
636 */
623 bool registered; 637 bool registered;
624 struct list_head modes; /* list of modes on this connector */ 638 struct list_head modes; /* list of modes on this connector */
625 639