aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorRex Zhu <Rex.Zhu@amd.com>2018-10-19 01:35:48 -0400
committerAlex Deucher <alexander.deucher@amd.com>2018-11-05 14:21:49 -0500
commit7946340fa38965705f79273cef0cdc477239bf2d (patch)
tree402ac5a7dddc2c55a6dba61988f6535e840489b6
parent1e256e2762211c02078c31f839a9b243f62efd5e (diff)
drm/amdgpu: Move csa related code to separate file
In baremetal, also need to reserve csa for preemption. so move the csa related code out of sriov. Reviewed-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/Makefile2
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu.h1
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c117
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_csa.h39
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c92
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h11
6 files changed, 158 insertions, 104 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile
index 138cb787d27e..ec4a9d539322 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -53,7 +53,7 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
53 amdgpu_ucode.o amdgpu_bo_list.o amdgpu_ctx.o amdgpu_sync.o \ 53 amdgpu_ucode.o amdgpu_bo_list.o amdgpu_ctx.o amdgpu_sync.o \
54 amdgpu_gtt_mgr.o amdgpu_vram_mgr.o amdgpu_virt.o amdgpu_atomfirmware.o \ 54 amdgpu_gtt_mgr.o amdgpu_vram_mgr.o amdgpu_virt.o amdgpu_atomfirmware.o \
55 amdgpu_vf_error.o amdgpu_sched.o amdgpu_debugfs.o amdgpu_ids.o \ 55 amdgpu_vf_error.o amdgpu_sched.o amdgpu_debugfs.o amdgpu_ids.o \
56 amdgpu_gmc.o amdgpu_xgmi.o 56 amdgpu_gmc.o amdgpu_xgmi.o amdgpu_csa.o
57 57
58# add asic specific block 58# add asic specific block
59amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o cik_ih.o kv_smc.o kv_dpm.o \ 59amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o cik_ih.o kv_smc.o kv_dpm.o \
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 9348eb5a3c83..9dbdda66c318 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -75,6 +75,7 @@
75#include "amdgpu_sdma.h" 75#include "amdgpu_sdma.h"
76#include "amdgpu_dm.h" 76#include "amdgpu_dm.h"
77#include "amdgpu_virt.h" 77#include "amdgpu_virt.h"
78#include "amdgpu_csa.h"
78#include "amdgpu_gart.h" 79#include "amdgpu_gart.h"
79#include "amdgpu_debugfs.h" 80#include "amdgpu_debugfs.h"
80#include "amdgpu_job.h" 81#include "amdgpu_job.h"
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c
new file mode 100644
index 000000000000..0c590ddf250a
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c
@@ -0,0 +1,117 @@
1/*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21
22 * * Author: Monk.liu@amd.com
23 */
24
25#include "amdgpu.h"
26
27uint64_t amdgpu_csa_vaddr(struct amdgpu_device *adev)
28{
29 uint64_t addr = adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT;
30
31 addr -= AMDGPU_VA_RESERVED_SIZE;
32 addr = amdgpu_gmc_sign_extend(addr);
33
34 return addr;
35}
36
37int amdgpu_allocate_static_csa(struct amdgpu_device *adev, struct amdgpu_bo **bo,
38 u32 domain, uint32_t size)
39{
40 int r;
41 void *ptr;
42
43 r = amdgpu_bo_create_kernel(adev, size, PAGE_SIZE,
44 domain, bo,
45 NULL, &ptr);
46 if (!bo)
47 return -ENOMEM;
48
49 memset(ptr, 0, size);
50 return 0;
51}
52
53void amdgpu_free_static_csa(struct amdgpu_bo **bo)
54{
55 amdgpu_bo_free_kernel(bo, NULL, NULL);
56}
57
58/*
59 * amdgpu_map_static_csa should be called during amdgpu_vm_init
60 * it maps virtual address amdgpu_csa_vaddr() to this VM, and each command
61 * submission of GFX should use this virtual address within META_DATA init
62 * package to support SRIOV gfx preemption.
63 */
64int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm,
65 struct amdgpu_bo *bo, struct amdgpu_bo_va **bo_va,
66 uint64_t csa_addr, uint32_t size)
67{
68 struct ww_acquire_ctx ticket;
69 struct list_head list;
70 struct amdgpu_bo_list_entry pd;
71 struct ttm_validate_buffer csa_tv;
72 int r;
73
74 INIT_LIST_HEAD(&list);
75 INIT_LIST_HEAD(&csa_tv.head);
76 csa_tv.bo = &bo->tbo;
77 csa_tv.shared = true;
78
79 list_add(&csa_tv.head, &list);
80 amdgpu_vm_get_pd_bo(vm, &list, &pd);
81
82 r = ttm_eu_reserve_buffers(&ticket, &list, true, NULL);
83 if (r) {
84 DRM_ERROR("failed to reserve CSA,PD BOs: err=%d\n", r);
85 return r;
86 }
87
88 *bo_va = amdgpu_vm_bo_add(adev, vm, bo);
89 if (!*bo_va) {
90 ttm_eu_backoff_reservation(&ticket, &list);
91 DRM_ERROR("failed to create bo_va for static CSA\n");
92 return -ENOMEM;
93 }
94
95 r = amdgpu_vm_alloc_pts(adev, (*bo_va)->base.vm, csa_addr,
96 size);
97 if (r) {
98 DRM_ERROR("failed to allocate pts for static CSA, err=%d\n", r);
99 amdgpu_vm_bo_rmv(adev, *bo_va);
100 ttm_eu_backoff_reservation(&ticket, &list);
101 return r;
102 }
103
104 r = amdgpu_vm_bo_map(adev, *bo_va, csa_addr, 0, size,
105 AMDGPU_PTE_READABLE | AMDGPU_PTE_WRITEABLE |
106 AMDGPU_PTE_EXECUTABLE);
107
108 if (r) {
109 DRM_ERROR("failed to do bo_map on static CSA, err=%d\n", r);
110 amdgpu_vm_bo_rmv(adev, *bo_va);
111 ttm_eu_backoff_reservation(&ticket, &list);
112 return r;
113 }
114
115 ttm_eu_backoff_reservation(&ticket, &list);
116 return 0;
117}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.h
new file mode 100644
index 000000000000..ef2dfb0cd760
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.h
@@ -0,0 +1,39 @@
1/*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Author: Monk.liu@amd.com
23 */
24
25#ifndef AMDGPU_CSA_MANAGER_H
26#define AMDGPU_CSA_MANAGER_H
27
28#define AMDGPU_CSA_SIZE (8 * 1024)
29
30uint32_t amdgpu_get_total_csa_size(struct amdgpu_device *adev);
31uint64_t amdgpu_csa_vaddr(struct amdgpu_device *adev);
32int amdgpu_allocate_static_csa(struct amdgpu_device *adev, struct amdgpu_bo **bo,
33 u32 domain, uint32_t size);
34int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm,
35 struct amdgpu_bo *bo, struct amdgpu_bo_va **bo_va,
36 uint64_t csa_addr, uint32_t size);
37void amdgpu_free_static_csa(struct amdgpu_bo **bo);
38
39#endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
index f71bc6feea7a..cca794a1f8ba 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
@@ -23,16 +23,6 @@
23 23
24#include "amdgpu.h" 24#include "amdgpu.h"
25 25
26uint64_t amdgpu_csa_vaddr(struct amdgpu_device *adev)
27{
28 uint64_t addr = adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT;
29
30 addr -= AMDGPU_VA_RESERVED_SIZE;
31 addr = amdgpu_gmc_sign_extend(addr);
32
33 return addr;
34}
35
36bool amdgpu_virt_mmio_blocked(struct amdgpu_device *adev) 26bool amdgpu_virt_mmio_blocked(struct amdgpu_device *adev)
37{ 27{
38 /* By now all MMIO pages except mailbox are blocked */ 28 /* By now all MMIO pages except mailbox are blocked */
@@ -41,88 +31,6 @@ bool amdgpu_virt_mmio_blocked(struct amdgpu_device *adev)
41 return RREG32_NO_KIQ(0xc040) == 0xffffffff; 31 return RREG32_NO_KIQ(0xc040) == 0xffffffff;
42} 32}
43 33
44int amdgpu_allocate_static_csa(struct amdgpu_device *adev, struct amdgpu_bo **bo,
45 u32 domain, uint32_t size)
46{
47 int r;
48 void *ptr;
49
50 r = amdgpu_bo_create_kernel(adev, size, PAGE_SIZE,
51 domain, bo,
52 NULL, &ptr);
53 if (!bo)
54 return -ENOMEM;
55
56 memset(ptr, 0, size);
57 return 0;
58}
59
60void amdgpu_free_static_csa(struct amdgpu_bo **bo)
61{
62 amdgpu_bo_free_kernel(bo, NULL, NULL);
63}
64
65/*
66 * amdgpu_map_static_csa should be called during amdgpu_vm_init
67 * it maps virtual address amdgpu_csa_vaddr() to this VM, and each command
68 * submission of GFX should use this virtual address within META_DATA init
69 * package to support SRIOV gfx preemption.
70 */
71int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm,
72 struct amdgpu_bo *bo, struct amdgpu_bo_va **bo_va,
73 uint64_t csa_addr, uint32_t size)
74{
75 struct ww_acquire_ctx ticket;
76 struct list_head list;
77 struct amdgpu_bo_list_entry pd;
78 struct ttm_validate_buffer csa_tv;
79 int r;
80
81 INIT_LIST_HEAD(&list);
82 INIT_LIST_HEAD(&csa_tv.head);
83 csa_tv.bo = &bo->tbo;
84 csa_tv.shared = true;
85
86 list_add(&csa_tv.head, &list);
87 amdgpu_vm_get_pd_bo(vm, &list, &pd);
88
89 r = ttm_eu_reserve_buffers(&ticket, &list, true, NULL);
90 if (r) {
91 DRM_ERROR("failed to reserve CSA,PD BOs: err=%d\n", r);
92 return r;
93 }
94
95 *bo_va = amdgpu_vm_bo_add(adev, vm, bo);
96 if (!*bo_va) {
97 ttm_eu_backoff_reservation(&ticket, &list);
98 DRM_ERROR("failed to create bo_va for static CSA\n");
99 return -ENOMEM;
100 }
101
102 r = amdgpu_vm_alloc_pts(adev, (*bo_va)->base.vm, csa_addr,
103 size);
104 if (r) {
105 DRM_ERROR("failed to allocate pts for static CSA, err=%d\n", r);
106 amdgpu_vm_bo_rmv(adev, *bo_va);
107 ttm_eu_backoff_reservation(&ticket, &list);
108 return r;
109 }
110
111 r = amdgpu_vm_bo_map(adev, *bo_va, csa_addr, 0, size,
112 AMDGPU_PTE_READABLE | AMDGPU_PTE_WRITEABLE |
113 AMDGPU_PTE_EXECUTABLE);
114
115 if (r) {
116 DRM_ERROR("failed to do bo_map on static CSA, err=%d\n", r);
117 amdgpu_vm_bo_rmv(adev, *bo_va);
118 ttm_eu_backoff_reservation(&ticket, &list);
119 return r;
120 }
121
122 ttm_eu_backoff_reservation(&ticket, &list);
123 return 0;
124}
125
126void amdgpu_virt_init_setting(struct amdgpu_device *adev) 34void amdgpu_virt_init_setting(struct amdgpu_device *adev)
127{ 35{
128 /* enable virtual display */ 36 /* enable virtual display */
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
index 09a7ebe964d0..cf46dfb59320 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
@@ -250,8 +250,6 @@ struct amdgpu_virt {
250 uint32_t gim_feature; 250 uint32_t gim_feature;
251}; 251};
252 252
253#define AMDGPU_CSA_SIZE (8 * 1024)
254
255#define amdgpu_sriov_enabled(adev) \ 253#define amdgpu_sriov_enabled(adev) \
256((adev)->virt.caps & AMDGPU_SRIOV_CAPS_ENABLE_IOV) 254((adev)->virt.caps & AMDGPU_SRIOV_CAPS_ENABLE_IOV)
257 255
@@ -276,16 +274,7 @@ static inline bool is_virtual_machine(void)
276#endif 274#endif
277} 275}
278 276
279struct amdgpu_vm;
280
281uint64_t amdgpu_csa_vaddr(struct amdgpu_device *adev);
282bool amdgpu_virt_mmio_blocked(struct amdgpu_device *adev); 277bool amdgpu_virt_mmio_blocked(struct amdgpu_device *adev);
283int amdgpu_allocate_static_csa(struct amdgpu_device *adev, struct amdgpu_bo **bo,
284 u32 domain, uint32_t size);
285int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm,
286 struct amdgpu_bo *bo,
287 struct amdgpu_bo_va **bo_va, uint64_t csa_addr, uint32_t size);
288void amdgpu_free_static_csa(struct amdgpu_bo **bo);
289void amdgpu_virt_init_setting(struct amdgpu_device *adev); 278void amdgpu_virt_init_setting(struct amdgpu_device *adev);
290uint32_t amdgpu_virt_kiq_rreg(struct amdgpu_device *adev, uint32_t reg); 279uint32_t amdgpu_virt_kiq_rreg(struct amdgpu_device *adev, uint32_t reg);
291void amdgpu_virt_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v); 280void amdgpu_virt_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v);