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authorIlia Lin <ilialin@codeaurora.org>2018-05-29 22:39:29 -0400
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2018-05-30 06:53:11 -0400
commit79383539eb2e6fbb913aaa914821444b919a7a29 (patch)
tree98682087289e8e3be84e1a259a31c0f2877960f8
parent46e2856b8e188949757c9123fd7f9ce36edd1a52 (diff)
dt-bindings: cpufreq: Document operating-points-v2-kryo-cpu
The qcom-cpufreq-kryo driver reads the msm-id and efuse value from the SoC to provide the OPP framework with required information. This is used to determine the voltage and frequency value for each OPP of operating-points-v2 table when it is parsed by the OPP framework. This change adds documentation for the DT bindings. The "operating-points-v2-kryo-cpu" DT extends the "operating-points-v2" with following parameters: - nvmem-cells (NVMEM area containig the speedbin information) - opp-supported-hw: A single 32 bit bitmap value, representing compatible HW: 0: MSM8996 V3, speedbin 0 1: MSM8996 V3, speedbin 1 2: MSM8996 V3, speedbin 2 3: unused 4: MSM8996 SG, speedbin 0 5: MSM8996 SG, speedbin 1 6: MSM8996 SG, speedbin 2 7-31: unused Signed-off-by: Ilia Lin <ilialin@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Tested-by: Amit Kucheria <amit.kucheria@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat
-rw-r--r--Documentation/devicetree/bindings/opp/kryo-cpufreq.txt680
1 files changed, 680 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/opp/kryo-cpufreq.txt b/Documentation/devicetree/bindings/opp/kryo-cpufreq.txt
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+++ b/Documentation/devicetree/bindings/opp/kryo-cpufreq.txt
@@ -0,0 +1,680 @@
1Qualcomm Technologies, Inc. KRYO CPUFreq and OPP bindings
2===================================
3
4In Certain Qualcomm Technologies, Inc. SoCs like apq8096 and msm8996
5that have KRYO processors, the CPU ferequencies subset and voltage value
6of each OPP varies based on the silicon variant in use.
7Qualcomm Technologies, Inc. Process Voltage Scaling Tables
8defines the voltage and frequency value based on the msm-id in SMEM
9and speedbin blown in the efuse combination.
10The qcom-cpufreq-kryo driver reads the msm-id and efuse value from the SoC
11to provide the OPP framework with required information (existing HW bitmap).
12This is used to determine the voltage and frequency value for each OPP of
13operating-points-v2 table when it is parsed by the OPP framework.
14
15Required properties:
16--------------------
17In 'cpus' nodes:
18- operating-points-v2: Phandle to the operating-points-v2 table to use.
19
20In 'operating-points-v2' table:
21- compatible: Should be
22 - 'operating-points-v2-kryo-cpu' for apq8096 and msm8996.
23- nvmem-cells: A phandle pointing to a nvmem-cells node representing the
24 efuse registers that has information about the
25 speedbin that is used to select the right frequency/voltage
26 value pair.
27 Please refer the for nvmem-cells
28 bindings Documentation/devicetree/bindings/nvmem/nvmem.txt
29 and also examples below.
30
31In every OPP node:
32- opp-supported-hw: A single 32 bit bitmap value, representing compatible HW.
33 Bitmap:
34 0: MSM8996 V3, speedbin 0
35 1: MSM8996 V3, speedbin 1
36 2: MSM8996 V3, speedbin 2
37 3: unused
38 4: MSM8996 SG, speedbin 0
39 5: MSM8996 SG, speedbin 1
40 6: MSM8996 SG, speedbin 2
41 7-31: unused
42
43Example 1:
44---------
45
46 cpus {
47 #address-cells = <2>;
48 #size-cells = <0>;
49
50 CPU0: cpu@0 {
51 device_type = "cpu";
52 compatible = "qcom,kryo";
53 reg = <0x0 0x0>;
54 enable-method = "psci";
55 clocks = <&kryocc 0>;
56 cpu-supply = <&pm8994_s11_saw>;
57 operating-points-v2 = <&cluster0_opp>;
58 #cooling-cells = <2>;
59 next-level-cache = <&L2_0>;
60 L2_0: l2-cache {
61 compatible = "cache";
62 cache-level = <2>;
63 };
64 };
65
66 CPU1: cpu@1 {
67 device_type = "cpu";
68 compatible = "qcom,kryo";
69 reg = <0x0 0x1>;
70 enable-method = "psci";
71 clocks = <&kryocc 0>;
72 cpu-supply = <&pm8994_s11_saw>;
73 operating-points-v2 = <&cluster0_opp>;
74 #cooling-cells = <2>;
75 next-level-cache = <&L2_0>;
76 };
77
78 CPU2: cpu@100 {
79 device_type = "cpu";
80 compatible = "qcom,kryo";
81 reg = <0x0 0x100>;
82 enable-method = "psci";
83 clocks = <&kryocc 1>;
84 cpu-supply = <&pm8994_s11_saw>;
85 operating-points-v2 = <&cluster1_opp>;
86 #cooling-cells = <2>;
87 next-level-cache = <&L2_1>;
88 L2_1: l2-cache {
89 compatible = "cache";
90 cache-level = <2>;
91 };
92 };
93
94 CPU3: cpu@101 {
95 device_type = "cpu";
96 compatible = "qcom,kryo";
97 reg = <0x0 0x101>;
98 enable-method = "psci";
99 clocks = <&kryocc 1>;
100 cpu-supply = <&pm8994_s11_saw>;
101 operating-points-v2 = <&cluster1_opp>;
102 #cooling-cells = <2>;
103 next-level-cache = <&L2_1>;
104 };
105
106 cpu-map {
107 cluster0 {
108 core0 {
109 cpu = <&CPU0>;
110 };
111
112 core1 {
113 cpu = <&CPU1>;
114 };
115 };
116
117 cluster1 {
118 core0 {
119 cpu = <&CPU2>;
120 };
121
122 core1 {
123 cpu = <&CPU3>;
124 };
125 };
126 };
127 };
128
129 cluster0_opp: opp_table0 {
130 compatible = "operating-points-v2-kryo-cpu";
131 nvmem-cells = <&speedbin_efuse>;
132 opp-shared;
133
134 opp-307200000 {
135 opp-hz = /bits/ 64 <307200000>;
136 opp-microvolt = <905000 905000 1140000>;
137 opp-supported-hw = <0x77>;
138 clock-latency-ns = <200000>;
139 };
140 opp-384000000 {
141 opp-hz = /bits/ 64 <384000000>;
142 opp-microvolt = <905000 905000 1140000>;
143 opp-supported-hw = <0x70>;
144 clock-latency-ns = <200000>;
145 };
146 opp-422400000 {
147 opp-hz = /bits/ 64 <422400000>;
148 opp-microvolt = <905000 905000 1140000>;
149 opp-supported-hw = <0x7>;
150 clock-latency-ns = <200000>;
151 };
152 opp-460800000 {
153 opp-hz = /bits/ 64 <460800000>;
154 opp-microvolt = <905000 905000 1140000>;
155 opp-supported-hw = <0x70>;
156 clock-latency-ns = <200000>;
157 };
158 opp-480000000 {
159 opp-hz = /bits/ 64 <480000000>;
160 opp-microvolt = <905000 905000 1140000>;
161 opp-supported-hw = <0x7>;
162 clock-latency-ns = <200000>;
163 };
164 opp-537600000 {
165 opp-hz = /bits/ 64 <537600000>;
166 opp-microvolt = <905000 905000 1140000>;
167 opp-supported-hw = <0x70>;
168 clock-latency-ns = <200000>;
169 };
170 opp-556800000 {
171 opp-hz = /bits/ 64 <556800000>;
172 opp-microvolt = <905000 905000 1140000>;
173 opp-supported-hw = <0x7>;
174 clock-latency-ns = <200000>;
175 };
176 opp-614400000 {
177 opp-hz = /bits/ 64 <614400000>;
178 opp-microvolt = <905000 905000 1140000>;
179 opp-supported-hw = <0x70>;
180 clock-latency-ns = <200000>;
181 };
182 opp-652800000 {
183 opp-hz = /bits/ 64 <652800000>;
184 opp-microvolt = <905000 905000 1140000>;
185 opp-supported-hw = <0x7>;
186 clock-latency-ns = <200000>;
187 };
188 opp-691200000 {
189 opp-hz = /bits/ 64 <691200000>;
190 opp-microvolt = <905000 905000 1140000>;
191 opp-supported-hw = <0x70>;
192 clock-latency-ns = <200000>;
193 };
194 opp-729600000 {
195 opp-hz = /bits/ 64 <729600000>;
196 opp-microvolt = <905000 905000 1140000>;
197 opp-supported-hw = <0x7>;
198 clock-latency-ns = <200000>;
199 };
200 opp-768000000 {
201 opp-hz = /bits/ 64 <768000000>;
202 opp-microvolt = <905000 905000 1140000>;
203 opp-supported-hw = <0x70>;
204 clock-latency-ns = <200000>;
205 };
206 opp-844800000 {
207 opp-hz = /bits/ 64 <844800000>;
208 opp-microvolt = <905000 905000 1140000>;
209 opp-supported-hw = <0x77>;
210 clock-latency-ns = <200000>;
211 };
212 opp-902400000 {
213 opp-hz = /bits/ 64 <902400000>;
214 opp-microvolt = <905000 905000 1140000>;
215 opp-supported-hw = <0x70>;
216 clock-latency-ns = <200000>;
217 };
218 opp-960000000 {
219 opp-hz = /bits/ 64 <960000000>;
220 opp-microvolt = <905000 905000 1140000>;
221 opp-supported-hw = <0x7>;
222 clock-latency-ns = <200000>;
223 };
224 opp-979200000 {
225 opp-hz = /bits/ 64 <979200000>;
226 opp-microvolt = <905000 905000 1140000>;
227 opp-supported-hw = <0x70>;
228 clock-latency-ns = <200000>;
229 };
230 opp-1036800000 {
231 opp-hz = /bits/ 64 <1036800000>;
232 opp-microvolt = <905000 905000 1140000>;
233 opp-supported-hw = <0x7>;
234 clock-latency-ns = <200000>;
235 };
236 opp-1056000000 {
237 opp-hz = /bits/ 64 <1056000000>;
238 opp-microvolt = <905000 905000 1140000>;
239 opp-supported-hw = <0x70>;
240 clock-latency-ns = <200000>;
241 };
242 opp-1113600000 {
243 opp-hz = /bits/ 64 <1113600000>;
244 opp-microvolt = <905000 905000 1140000>;
245 opp-supported-hw = <0x7>;
246 clock-latency-ns = <200000>;
247 };
248 opp-1132800000 {
249 opp-hz = /bits/ 64 <1132800000>;
250 opp-microvolt = <905000 905000 1140000>;
251 opp-supported-hw = <0x70>;
252 clock-latency-ns = <200000>;
253 };
254 opp-1190400000 {
255 opp-hz = /bits/ 64 <1190400000>;
256 opp-microvolt = <905000 905000 1140000>;
257 opp-supported-hw = <0x7>;
258 clock-latency-ns = <200000>;
259 };
260 opp-1209600000 {
261 opp-hz = /bits/ 64 <1209600000>;
262 opp-microvolt = <905000 905000 1140000>;
263 opp-supported-hw = <0x70>;
264 clock-latency-ns = <200000>;
265 };
266 opp-1228800000 {
267 opp-hz = /bits/ 64 <1228800000>;
268 opp-microvolt = <905000 905000 1140000>;
269 opp-supported-hw = <0x7>;
270 clock-latency-ns = <200000>;
271 };
272 opp-1286400000 {
273 opp-hz = /bits/ 64 <1286400000>;
274 opp-microvolt = <1140000 905000 1140000>;
275 opp-supported-hw = <0x70>;
276 clock-latency-ns = <200000>;
277 };
278 opp-1324800000 {
279 opp-hz = /bits/ 64 <1324800000>;
280 opp-microvolt = <1140000 905000 1140000>;
281 opp-supported-hw = <0x5>;
282 clock-latency-ns = <200000>;
283 };
284 opp-1363200000 {
285 opp-hz = /bits/ 64 <1363200000>;
286 opp-microvolt = <1140000 905000 1140000>;
287 opp-supported-hw = <0x72>;
288 clock-latency-ns = <200000>;
289 };
290 opp-1401600000 {
291 opp-hz = /bits/ 64 <1401600000>;
292 opp-microvolt = <1140000 905000 1140000>;
293 opp-supported-hw = <0x5>;
294 clock-latency-ns = <200000>;
295 };
296 opp-1440000000 {
297 opp-hz = /bits/ 64 <1440000000>;
298 opp-microvolt = <1140000 905000 1140000>;
299 opp-supported-hw = <0x70>;
300 clock-latency-ns = <200000>;
301 };
302 opp-1478400000 {
303 opp-hz = /bits/ 64 <1478400000>;
304 opp-microvolt = <1140000 905000 1140000>;
305 opp-supported-hw = <0x1>;
306 clock-latency-ns = <200000>;
307 };
308 opp-1497600000 {
309 opp-hz = /bits/ 64 <1497600000>;
310 opp-microvolt = <1140000 905000 1140000>;
311 opp-supported-hw = <0x4>;
312 clock-latency-ns = <200000>;
313 };
314 opp-1516800000 {
315 opp-hz = /bits/ 64 <1516800000>;
316 opp-microvolt = <1140000 905000 1140000>;
317 opp-supported-hw = <0x70>;
318 clock-latency-ns = <200000>;
319 };
320 opp-1593600000 {
321 opp-hz = /bits/ 64 <1593600000>;
322 opp-microvolt = <1140000 905000 1140000>;
323 opp-supported-hw = <0x71>;
324 clock-latency-ns = <200000>;
325 };
326 opp-1996800000 {
327 opp-hz = /bits/ 64 <1996800000>;
328 opp-microvolt = <1140000 905000 1140000>;
329 opp-supported-hw = <0x20>;
330 clock-latency-ns = <200000>;
331 };
332 opp-2188800000 {
333 opp-hz = /bits/ 64 <2188800000>;
334 opp-microvolt = <1140000 905000 1140000>;
335 opp-supported-hw = <0x10>;
336 clock-latency-ns = <200000>;
337 };
338 };
339
340 cluster1_opp: opp_table1 {
341 compatible = "operating-points-v2-kryo-cpu";
342 nvmem-cells = <&speedbin_efuse>;
343 opp-shared;
344
345 opp-307200000 {
346 opp-hz = /bits/ 64 <307200000>;
347 opp-microvolt = <905000 905000 1140000>;
348 opp-supported-hw = <0x77>;
349 clock-latency-ns = <200000>;
350 };
351 opp-384000000 {
352 opp-hz = /bits/ 64 <384000000>;
353 opp-microvolt = <905000 905000 1140000>;
354 opp-supported-hw = <0x70>;
355 clock-latency-ns = <200000>;
356 };
357 opp-403200000 {
358 opp-hz = /bits/ 64 <403200000>;
359 opp-microvolt = <905000 905000 1140000>;
360 opp-supported-hw = <0x7>;
361 clock-latency-ns = <200000>;
362 };
363 opp-460800000 {
364 opp-hz = /bits/ 64 <460800000>;
365 opp-microvolt = <905000 905000 1140000>;
366 opp-supported-hw = <0x70>;
367 clock-latency-ns = <200000>;
368 };
369 opp-480000000 {
370 opp-hz = /bits/ 64 <480000000>;
371 opp-microvolt = <905000 905000 1140000>;
372 opp-supported-hw = <0x7>;
373 clock-latency-ns = <200000>;
374 };
375 opp-537600000 {
376 opp-hz = /bits/ 64 <537600000>;
377 opp-microvolt = <905000 905000 1140000>;
378 opp-supported-hw = <0x70>;
379 clock-latency-ns = <200000>;
380 };
381 opp-556800000 {
382 opp-hz = /bits/ 64 <556800000>;
383 opp-microvolt = <905000 905000 1140000>;
384 opp-supported-hw = <0x7>;
385 clock-latency-ns = <200000>;
386 };
387 opp-614400000 {
388 opp-hz = /bits/ 64 <614400000>;
389 opp-microvolt = <905000 905000 1140000>;
390 opp-supported-hw = <0x70>;
391 clock-latency-ns = <200000>;
392 };
393 opp-652800000 {
394 opp-hz = /bits/ 64 <652800000>;
395 opp-microvolt = <905000 905000 1140000>;
396 opp-supported-hw = <0x7>;
397 clock-latency-ns = <200000>;
398 };
399 opp-691200000 {
400 opp-hz = /bits/ 64 <691200000>;
401 opp-microvolt = <905000 905000 1140000>;
402 opp-supported-hw = <0x70>;
403 clock-latency-ns = <200000>;
404 };
405 opp-729600000 {
406 opp-hz = /bits/ 64 <729600000>;
407 opp-microvolt = <905000 905000 1140000>;
408 opp-supported-hw = <0x7>;
409 clock-latency-ns = <200000>;
410 };
411 opp-748800000 {
412 opp-hz = /bits/ 64 <748800000>;
413 opp-microvolt = <905000 905000 1140000>;
414 opp-supported-hw = <0x70>;
415 clock-latency-ns = <200000>;
416 };
417 opp-806400000 {
418 opp-hz = /bits/ 64 <806400000>;
419 opp-microvolt = <905000 905000 1140000>;
420 opp-supported-hw = <0x7>;
421 clock-latency-ns = <200000>;
422 };
423 opp-825600000 {
424 opp-hz = /bits/ 64 <825600000>;
425 opp-microvolt = <905000 905000 1140000>;
426 opp-supported-hw = <0x70>;
427 clock-latency-ns = <200000>;
428 };
429 opp-883200000 {
430 opp-hz = /bits/ 64 <883200000>;
431 opp-microvolt = <905000 905000 1140000>;
432 opp-supported-hw = <0x7>;
433 clock-latency-ns = <200000>;
434 };
435 opp-902400000 {
436 opp-hz = /bits/ 64 <902400000>;
437 opp-microvolt = <905000 905000 1140000>;
438 opp-supported-hw = <0x70>;
439 clock-latency-ns = <200000>;
440 };
441 opp-940800000 {
442 opp-hz = /bits/ 64 <940800000>;
443 opp-microvolt = <905000 905000 1140000>;
444 opp-supported-hw = <0x7>;
445 clock-latency-ns = <200000>;
446 };
447 opp-979200000 {
448 opp-hz = /bits/ 64 <979200000>;
449 opp-microvolt = <905000 905000 1140000>;
450 opp-supported-hw = <0x70>;
451 clock-latency-ns = <200000>;
452 };
453 opp-1036800000 {
454 opp-hz = /bits/ 64 <1036800000>;
455 opp-microvolt = <905000 905000 1140000>;
456 opp-supported-hw = <0x7>;
457 clock-latency-ns = <200000>;
458 };
459 opp-1056000000 {
460 opp-hz = /bits/ 64 <1056000000>;
461 opp-microvolt = <905000 905000 1140000>;
462 opp-supported-hw = <0x70>;
463 clock-latency-ns = <200000>;
464 };
465 opp-1113600000 {
466 opp-hz = /bits/ 64 <1113600000>;
467 opp-microvolt = <905000 905000 1140000>;
468 opp-supported-hw = <0x7>;
469 clock-latency-ns = <200000>;
470 };
471 opp-1132800000 {
472 opp-hz = /bits/ 64 <1132800000>;
473 opp-microvolt = <905000 905000 1140000>;
474 opp-supported-hw = <0x70>;
475 clock-latency-ns = <200000>;
476 };
477 opp-1190400000 {
478 opp-hz = /bits/ 64 <1190400000>;
479 opp-microvolt = <905000 905000 1140000>;
480 opp-supported-hw = <0x7>;
481 clock-latency-ns = <200000>;
482 };
483 opp-1209600000 {
484 opp-hz = /bits/ 64 <1209600000>;
485 opp-microvolt = <905000 905000 1140000>;
486 opp-supported-hw = <0x70>;
487 clock-latency-ns = <200000>;
488 };
489 opp-1248000000 {
490 opp-hz = /bits/ 64 <1248000000>;
491 opp-microvolt = <905000 905000 1140000>;
492 opp-supported-hw = <0x7>;
493 clock-latency-ns = <200000>;
494 };
495 opp-1286400000 {
496 opp-hz = /bits/ 64 <1286400000>;
497 opp-microvolt = <905000 905000 1140000>;
498 opp-supported-hw = <0x70>;
499 clock-latency-ns = <200000>;
500 };
501 opp-1324800000 {
502 opp-hz = /bits/ 64 <1324800000>;
503 opp-microvolt = <1140000 905000 1140000>;
504 opp-supported-hw = <0x7>;
505 clock-latency-ns = <200000>;
506 };
507 opp-1363200000 {
508 opp-hz = /bits/ 64 <1363200000>;
509 opp-microvolt = <1140000 905000 1140000>;
510 opp-supported-hw = <0x70>;
511 clock-latency-ns = <200000>;
512 };
513 opp-1401600000 {
514 opp-hz = /bits/ 64 <1401600000>;
515 opp-microvolt = <1140000 905000 1140000>;
516 opp-supported-hw = <0x7>;
517 clock-latency-ns = <200000>;
518 };
519 opp-1440000000 {
520 opp-hz = /bits/ 64 <1440000000>;
521 opp-microvolt = <1140000 905000 1140000>;
522 opp-supported-hw = <0x70>;
523 clock-latency-ns = <200000>;
524 };
525 opp-1478400000 {
526 opp-hz = /bits/ 64 <1478400000>;
527 opp-microvolt = <1140000 905000 1140000>;
528 opp-supported-hw = <0x7>;
529 clock-latency-ns = <200000>;
530 };
531 opp-1516800000 {
532 opp-hz = /bits/ 64 <1516800000>;
533 opp-microvolt = <1140000 905000 1140000>;
534 opp-supported-hw = <0x70>;
535 clock-latency-ns = <200000>;
536 };
537 opp-1555200000 {
538 opp-hz = /bits/ 64 <1555200000>;
539 opp-microvolt = <1140000 905000 1140000>;
540 opp-supported-hw = <0x7>;
541 clock-latency-ns = <200000>;
542 };
543 opp-1593600000 {
544 opp-hz = /bits/ 64 <1593600000>;
545 opp-microvolt = <1140000 905000 1140000>;
546 opp-supported-hw = <0x70>;
547 clock-latency-ns = <200000>;
548 };
549 opp-1632000000 {
550 opp-hz = /bits/ 64 <1632000000>;
551 opp-microvolt = <1140000 905000 1140000>;
552 opp-supported-hw = <0x7>;
553 clock-latency-ns = <200000>;
554 };
555 opp-1670400000 {
556 opp-hz = /bits/ 64 <1670400000>;
557 opp-microvolt = <1140000 905000 1140000>;
558 opp-supported-hw = <0x70>;
559 clock-latency-ns = <200000>;
560 };
561 opp-1708800000 {
562 opp-hz = /bits/ 64 <1708800000>;
563 opp-microvolt = <1140000 905000 1140000>;
564 opp-supported-hw = <0x7>;
565 clock-latency-ns = <200000>;
566 };
567 opp-1747200000 {
568 opp-hz = /bits/ 64 <1747200000>;
569 opp-microvolt = <1140000 905000 1140000>;
570 opp-supported-hw = <0x70>;
571 clock-latency-ns = <200000>;
572 };
573 opp-1785600000 {
574 opp-hz = /bits/ 64 <1785600000>;
575 opp-microvolt = <1140000 905000 1140000>;
576 opp-supported-hw = <0x7>;
577 clock-latency-ns = <200000>;
578 };
579 opp-1804800000 {
580 opp-hz = /bits/ 64 <1804800000>;
581 opp-microvolt = <1140000 905000 1140000>;
582 opp-supported-hw = <0x6>;
583 clock-latency-ns = <200000>;
584 };
585 opp-1824000000 {
586 opp-hz = /bits/ 64 <1824000000>;
587 opp-microvolt = <1140000 905000 1140000>;
588 opp-supported-hw = <0x71>;
589 clock-latency-ns = <200000>;
590 };
591 opp-1900800000 {
592 opp-hz = /bits/ 64 <1900800000>;
593 opp-microvolt = <1140000 905000 1140000>;
594 opp-supported-hw = <0x74>;
595 clock-latency-ns = <200000>;
596 };
597 opp-1920000000 {
598 opp-hz = /bits/ 64 <1920000000>;
599 opp-microvolt = <1140000 905000 1140000>;
600 opp-supported-hw = <0x1>;
601 clock-latency-ns = <200000>;
602 };
603 opp-1977600000 {
604 opp-hz = /bits/ 64 <1977600000>;
605 opp-microvolt = <1140000 905000 1140000>;
606 opp-supported-hw = <0x30>;
607 clock-latency-ns = <200000>;
608 };
609 opp-1996800000 {
610 opp-hz = /bits/ 64 <1996800000>;
611 opp-microvolt = <1140000 905000 1140000>;
612 opp-supported-hw = <0x1>;
613 clock-latency-ns = <200000>;
614 };
615 opp-2054400000 {
616 opp-hz = /bits/ 64 <2054400000>;
617 opp-microvolt = <1140000 905000 1140000>;
618 opp-supported-hw = <0x30>;
619 clock-latency-ns = <200000>;
620 };
621 opp-2073600000 {
622 opp-hz = /bits/ 64 <2073600000>;
623 opp-microvolt = <1140000 905000 1140000>;
624 opp-supported-hw = <0x1>;
625 clock-latency-ns = <200000>;
626 };
627 opp-2150400000 {
628 opp-hz = /bits/ 64 <2150400000>;
629 opp-microvolt = <1140000 905000 1140000>;
630 opp-supported-hw = <0x31>;
631 clock-latency-ns = <200000>;
632 };
633 opp-2246400000 {
634 opp-hz = /bits/ 64 <2246400000>;
635 opp-microvolt = <1140000 905000 1140000>;
636 opp-supported-hw = <0x10>;
637 clock-latency-ns = <200000>;
638 };
639 opp-2342400000 {
640 opp-hz = /bits/ 64 <2342400000>;
641 opp-microvolt = <1140000 905000 1140000>;
642 opp-supported-hw = <0x10>;
643 clock-latency-ns = <200000>;
644 };
645 };
646
647....
648
649reserved-memory {
650 #address-cells = <2>;
651 #size-cells = <2>;
652 ranges;
653....
654 smem_mem: smem-mem@86000000 {
655 reg = <0x0 0x86000000 0x0 0x200000>;
656 no-map;
657 };
658....
659};
660
661smem {
662 compatible = "qcom,smem";
663 memory-region = <&smem_mem>;
664 hwlocks = <&tcsr_mutex 3>;
665};
666
667soc {
668....
669 qfprom: qfprom@74000 {
670 compatible = "qcom,qfprom";
671 reg = <0x00074000 0x8ff>;
672 #address-cells = <1>;
673 #size-cells = <1>;
674 ....
675 speedbin_efuse: speedbin@133 {
676 reg = <0x133 0x1>;
677 bits = <5 3>;
678 };
679 };
680};
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-28 02:11:54 -0400