diff options
author | Markus Pargmann <mpa@pengutronix.de> | 2015-11-24 06:17:58 -0500 |
---|---|---|
committer | Shawn Guo <shawnguo@kernel.org> | 2015-11-24 22:49:42 -0500 |
commit | 78ae71ac882fbca3b092656b6fed46f0c2e71dd6 (patch) | |
tree | 1af83f4e994d03fa4da9ae1bc1c8e5c1619762e7 | |
parent | 8005c49d9aea74d382f474ce11afbbc7d7130bec (diff) |
clk: imx25: Remove osc clock from driver
The 'osc' clock is already initialized by the fixed clock defined in
imx25.dtsi. The imx25 clock driver tries to add this clock for a second
time and fails with -EEXIST:
i.MX clk 1: register failed with -17
As the clock is already properly setup in DT with a different driver, we
can completely remove the handling in the imx25 clock driver.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-rw-r--r-- | drivers/clk/imx/clk-imx25.c | 18 |
1 files changed, 2 insertions, 16 deletions
diff --git a/drivers/clk/imx/clk-imx25.c b/drivers/clk/imx/clk-imx25.c index c4c141cab444..23686f756b5e 100644 --- a/drivers/clk/imx/clk-imx25.c +++ b/drivers/clk/imx/clk-imx25.c | |||
@@ -96,13 +96,11 @@ static struct clk ** const uart_clks[] __initconst = { | |||
96 | NULL | 96 | NULL |
97 | }; | 97 | }; |
98 | 98 | ||
99 | static int __init __mx25_clocks_init(unsigned long osc_rate, | 99 | static int __init __mx25_clocks_init(void __iomem *ccm_base) |
100 | void __iomem *ccm_base) | ||
101 | { | 100 | { |
102 | BUG_ON(!ccm_base); | 101 | BUG_ON(!ccm_base); |
103 | 102 | ||
104 | clk[dummy] = imx_clk_fixed("dummy", 0); | 103 | clk[dummy] = imx_clk_fixed("dummy", 0); |
105 | clk[osc] = imx_clk_fixed("osc", osc_rate); | ||
106 | clk[mpll] = imx_clk_pllv1(IMX_PLLV1_IMX25, "mpll", "osc", ccm(CCM_MPCTL)); | 104 | clk[mpll] = imx_clk_pllv1(IMX_PLLV1_IMX25, "mpll", "osc", ccm(CCM_MPCTL)); |
107 | clk[upll] = imx_clk_pllv1(IMX_PLLV1_IMX25, "upll", "osc", ccm(CCM_UPCTL)); | 105 | clk[upll] = imx_clk_pllv1(IMX_PLLV1_IMX25, "upll", "osc", ccm(CCM_UPCTL)); |
108 | clk[mpll_cpu_3_4] = imx_clk_fixed_factor("mpll_cpu_3_4", "mpll", 3, 4); | 106 | clk[mpll_cpu_3_4] = imx_clk_fixed_factor("mpll_cpu_3_4", "mpll", 3, 4); |
@@ -250,22 +248,10 @@ static int __init __mx25_clocks_init(unsigned long osc_rate, | |||
250 | 248 | ||
251 | static void __init mx25_clocks_init_dt(struct device_node *np) | 249 | static void __init mx25_clocks_init_dt(struct device_node *np) |
252 | { | 250 | { |
253 | struct device_node *refnp; | ||
254 | unsigned long osc_rate = 24000000; | ||
255 | void __iomem *ccm; | 251 | void __iomem *ccm; |
256 | 252 | ||
257 | /* retrieve the freqency of fixed clocks from device tree */ | ||
258 | for_each_compatible_node(refnp, NULL, "fixed-clock") { | ||
259 | u32 rate; | ||
260 | if (of_property_read_u32(refnp, "clock-frequency", &rate)) | ||
261 | continue; | ||
262 | |||
263 | if (of_device_is_compatible(refnp, "fsl,imx-osc")) | ||
264 | osc_rate = rate; | ||
265 | } | ||
266 | |||
267 | ccm = of_iomap(np, 0); | 253 | ccm = of_iomap(np, 0); |
268 | __mx25_clocks_init(osc_rate, ccm); | 254 | __mx25_clocks_init(ccm); |
269 | 255 | ||
270 | clk_data.clks = clk; | 256 | clk_data.clks = clk; |
271 | clk_data.clk_num = ARRAY_SIZE(clk); | 257 | clk_data.clk_num = ARRAY_SIZE(clk); |