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authorChris Brand <chris.brand@broadcom.com>2016-05-11 17:36:17 -0400
committerFlorian Fainelli <f.fainelli@gmail.com>2016-06-06 19:17:33 -0400
commit783cb948d73b46aa336f0f0beb64789a0db35434 (patch)
tree8addfcd20fdaf1d08275c7184fd658a10197f955
parent34642650e5bc052674b982433631fcc619237225 (diff)
power: Introduce Broadcom kona reset driver
This driver supports reset on both BCM21664 and BCM23550. Code is being moved from arch/arm/mach-bcm/board_bcm21664.c Signed-off-by: Chris Brand <chris.brand@broadcom.com> Acked-By: Sebastian Reichel <sre@kernel.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat
-rw-r--r--MAINTAINERS1
-rw-r--r--drivers/power/reset/Kconfig10
-rw-r--r--drivers/power/reset/Makefile1
-rw-r--r--drivers/power/reset/brcm-kona-reset.c73
4 files changed, 85 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index 7304d2e37a98..2e0187d3a53b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2489,6 +2489,7 @@ F: arch/arm64/boot/dts/broadcom/
2489F: arch/arm/configs/bcm_defconfig 2489F: arch/arm/configs/bcm_defconfig
2490F: drivers/mmc/host/sdhci-bcm-kona.c 2490F: drivers/mmc/host/sdhci-bcm-kona.c
2491F: drivers/clocksource/bcm_kona_timer.c 2491F: drivers/clocksource/bcm_kona_timer.c
2492F: drivers/power/reset/brcm-kona-reset.c
2492 2493
2493BROADCOM BCM2835 ARM ARCHITECTURE 2494BROADCOM BCM2835 ARM ARCHITECTURE
2494M: Stephen Warren <swarren@wwwdotorg.org> 2495M: Stephen Warren <swarren@wwwdotorg.org>
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index 9bb2622c23bf..f38ac90f1aa5 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -46,6 +46,16 @@ config POWER_RESET_AXXIA
46 46
47 Say Y if you have an Axxia family SoC. 47 Say Y if you have an Axxia family SoC.
48 48
49config POWER_RESET_BRCMKONA
50 bool "Broadcom Kona reset driver"
51 depends on ARM || COMPILE_TEST
52 default ARCH_BCM_MOBILE
53 help
54 This driver provides restart support for Broadcom Kona chips.
55
56 Say Y here if you have a Broadcom Kona-based board and you wish
57 to have restart support.
58
49config POWER_RESET_BRCMSTB 59config POWER_RESET_BRCMSTB
50 bool "Broadcom STB reset driver" 60 bool "Broadcom STB reset driver"
51 depends on ARM || MIPS || COMPILE_TEST 61 depends on ARM || MIPS || COMPILE_TEST
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index ab7aa8614d1f..6b6eeb3b4d7f 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -3,6 +3,7 @@ obj-$(CONFIG_POWER_RESET_AT91_POWEROFF) += at91-poweroff.o
3obj-$(CONFIG_POWER_RESET_AT91_RESET) += at91-reset.o 3obj-$(CONFIG_POWER_RESET_AT91_RESET) += at91-reset.o
4obj-$(CONFIG_POWER_RESET_AT91_SAMA5D2_SHDWC) += at91-sama5d2_shdwc.o 4obj-$(CONFIG_POWER_RESET_AT91_SAMA5D2_SHDWC) += at91-sama5d2_shdwc.o
5obj-$(CONFIG_POWER_RESET_AXXIA) += axxia-reset.o 5obj-$(CONFIG_POWER_RESET_AXXIA) += axxia-reset.o
6obj-$(CONFIG_POWER_RESET_BRCMKONA) += brcm-kona-reset.o
6obj-$(CONFIG_POWER_RESET_BRCMSTB) += brcmstb-reboot.o 7obj-$(CONFIG_POWER_RESET_BRCMSTB) += brcmstb-reboot.o
7obj-$(CONFIG_POWER_RESET_GPIO) += gpio-poweroff.o 8obj-$(CONFIG_POWER_RESET_GPIO) += gpio-poweroff.o
8obj-$(CONFIG_POWER_RESET_GPIO_RESTART) += gpio-restart.o 9obj-$(CONFIG_POWER_RESET_GPIO_RESTART) += gpio-restart.o
diff --git a/drivers/power/reset/brcm-kona-reset.c b/drivers/power/reset/brcm-kona-reset.c
new file mode 100644
index 000000000000..8eaa959d8be6
--- /dev/null
+++ b/drivers/power/reset/brcm-kona-reset.c
@@ -0,0 +1,73 @@
1/*
2 * Copyright (C) 2016 Broadcom
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/io.h>
15#include <linux/of_address.h>
16#include <linux/of_platform.h>
17#include <linux/reboot.h>
18
19#define RSTMGR_REG_WR_ACCESS_OFFSET 0
20#define RSTMGR_REG_CHIP_SOFT_RST_OFFSET 4
21
22#define RSTMGR_WR_PASSWORD 0xa5a5
23#define RSTMGR_WR_PASSWORD_SHIFT 8
24#define RSTMGR_WR_ACCESS_ENABLE 1
25
26static void __iomem *kona_reset_base;
27
28static int kona_reset_handler(struct notifier_block *this,
29 unsigned long mode, void *cmd)
30{
31 /*
32 * A soft reset is triggered by writing a 0 to bit 0 of the soft reset
33 * register. To write to that register we must first write the password
34 * and the enable bit in the write access enable register.
35 */
36 writel((RSTMGR_WR_PASSWORD << RSTMGR_WR_PASSWORD_SHIFT) |
37 RSTMGR_WR_ACCESS_ENABLE,
38 kona_reset_base + RSTMGR_REG_WR_ACCESS_OFFSET);
39 writel(0, kona_reset_base + RSTMGR_REG_CHIP_SOFT_RST_OFFSET);
40
41 return NOTIFY_DONE;
42}
43
44static struct notifier_block kona_reset_nb = {
45 .notifier_call = kona_reset_handler,
46 .priority = 128,
47};
48
49static int kona_reset_probe(struct platform_device *pdev)
50{
51 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
52
53 kona_reset_base = devm_ioremap_resource(&pdev->dev, res);
54 if (IS_ERR(kona_reset_base))
55 return PTR_ERR(kona_reset_base);
56
57 return register_restart_handler(&kona_reset_nb);
58}
59
60static const struct of_device_id of_match[] = {
61 { .compatible = "brcm,bcm21664-resetmgr" },
62 {},
63};
64
65static struct platform_driver bcm_kona_reset_driver = {
66 .probe = kona_reset_probe,
67 .driver = {
68 .name = "brcm-kona-reset",
69 .of_match_table = of_match,
70 },
71};
72
73builtin_platform_driver(bcm_kona_reset_driver);
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-29 02:18:12 -0400