diff options
author | Tony Lindgren <tony@atomide.com> | 2015-01-19 14:47:35 -0500 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2015-01-19 14:47:35 -0500 |
commit | 7800064ba507e79f0afb6926204b997be4eabc80 (patch) | |
tree | b619e85188418ca39d4353f5d477b83f9d46c3b4 | |
parent | 7300bfff886a1340cfeb252035303e265cd556d9 (diff) |
ARM: dts: Add basic dm816x device tree configuration
Similar to other omap variants, let's add dm816x support.
Note that this is based on generated data from the
TI81XX-LINUX-PSP-04.04.00.02 patches published at:
http://downloads.ti.com/dsps/dsps_public_sw/psp/LinuxPSP/TI81XX_04_04/04_04_00_02/index_FDS.html
I've verified the basic functionality, but have not been
able to test all the devices on dm8168-evm.
Cc: Brian Hutchinson <b.hutchman@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r-- | arch/arm/boot/dts/dm816x.dtsi | 386 |
1 files changed, 386 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/dm816x.dtsi b/arch/arm/boot/dts/dm816x.dtsi new file mode 100644 index 000000000000..5b5df63a21c8 --- /dev/null +++ b/arch/arm/boot/dts/dm816x.dtsi | |||
@@ -0,0 +1,386 @@ | |||
1 | /* | ||
2 | * This file is licensed under the terms of the GNU General Public License | ||
3 | * version 2. This program is licensed "as is" without any warranty of any | ||
4 | * kind, whether express or implied. | ||
5 | */ | ||
6 | |||
7 | #include <dt-bindings/gpio/gpio.h> | ||
8 | #include <dt-bindings/pinctrl/omap.h> | ||
9 | |||
10 | #include "skeleton.dtsi" | ||
11 | |||
12 | / { | ||
13 | compatible = "ti,dm816"; | ||
14 | interrupt-parent = <&intc>; | ||
15 | |||
16 | aliases { | ||
17 | i2c0 = &i2c1; | ||
18 | i2c1 = &i2c2; | ||
19 | serial0 = &uart1; | ||
20 | serial1 = &uart2; | ||
21 | serial2 = &uart3; | ||
22 | ethernet0 = ð0; | ||
23 | ethernet1 = ð1; | ||
24 | }; | ||
25 | |||
26 | cpus { | ||
27 | #address-cells = <1>; | ||
28 | #size-cells = <0>; | ||
29 | cpu@0 { | ||
30 | compatible = "arm,cortex-a8"; | ||
31 | device_type = "cpu"; | ||
32 | reg = <0>; | ||
33 | }; | ||
34 | }; | ||
35 | |||
36 | pmu { | ||
37 | compatible = "arm,cortex-a8-pmu"; | ||
38 | interrupts = <3>; | ||
39 | }; | ||
40 | |||
41 | /* | ||
42 | * The soc node represents the soc top level view. It is used for IPs | ||
43 | * that are not memory mapped in the MPU view or for the MPU itself. | ||
44 | */ | ||
45 | soc { | ||
46 | compatible = "ti,omap-infra"; | ||
47 | mpu { | ||
48 | compatible = "ti,omap3-mpu"; | ||
49 | ti,hwmods = "mpu"; | ||
50 | }; | ||
51 | }; | ||
52 | |||
53 | dm816x_pinmux: pinmux@44e10800 { | ||
54 | compatible = "pinctrl-single"; | ||
55 | reg = <0x48140800 0x50a>; | ||
56 | #address-cells = <1>; | ||
57 | #size-cells = <0>; | ||
58 | pinctrl-single,register-width = <16>; | ||
59 | pinctrl-single,function-mask = <0xf>; | ||
60 | }; | ||
61 | |||
62 | /* | ||
63 | * XXX: Use a flat representation of the dm816x interconnect. | ||
64 | * The real dm816x interconnect network is quite complex. Since | ||
65 | * it will not bring real advantage to represent that in DT | ||
66 | * for the moment, just use a fake OCP bus entry to represent | ||
67 | * the whole bus hierarchy. | ||
68 | */ | ||
69 | ocp { | ||
70 | compatible = "ti,omap3-l3-smx", "simple-bus"; | ||
71 | reg = <0x44000000 0x10000>; | ||
72 | interrupts = <9 10>; | ||
73 | #address-cells = <1>; | ||
74 | #size-cells = <1>; | ||
75 | ranges; | ||
76 | ti,hwmods = "l3_main"; | ||
77 | |||
78 | prcm: prcm@48180000 { | ||
79 | compatible = "ti,dm816-prcm"; | ||
80 | reg = <0x48180000 0x4000>; | ||
81 | |||
82 | prcm_clocks: clocks { | ||
83 | #address-cells = <1>; | ||
84 | #size-cells = <0>; | ||
85 | }; | ||
86 | |||
87 | prcm_clockdomains: clockdomains { | ||
88 | }; | ||
89 | }; | ||
90 | |||
91 | scrm: scrm@48140000 { | ||
92 | compatible = "ti,dm816-scrm"; | ||
93 | reg = <0x48140000 0x21000>; | ||
94 | #address-cells = <1>; | ||
95 | #size-cells = <1>; | ||
96 | ranges = <0 0x48140000 0x21000>; | ||
97 | |||
98 | scrm_clocks: clocks { | ||
99 | #address-cells = <1>; | ||
100 | #size-cells = <0>; | ||
101 | }; | ||
102 | |||
103 | scrm_clockdomains: clockdomains { | ||
104 | }; | ||
105 | }; | ||
106 | |||
107 | cm: syscon@44e10000 { | ||
108 | compatible = "ti,am33xx-controlmodule", "syscon"; | ||
109 | reg = <0x44e10000 0x800>; | ||
110 | }; | ||
111 | |||
112 | edma: edma@49000000 { | ||
113 | compatible = "ti,edma3"; | ||
114 | ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2", "tptc3"; | ||
115 | reg = <0x49000000 0x10000>, | ||
116 | <0x44e10f90 0x40>; | ||
117 | interrupts = <12 13 14>; | ||
118 | #dma-cells = <1>; | ||
119 | }; | ||
120 | |||
121 | elm: elm@48080000 { | ||
122 | compatible = "ti,816-elm"; | ||
123 | ti,hwmods = "elm"; | ||
124 | reg = <0x48080000 0x2000>; | ||
125 | interrupts = <4>; | ||
126 | }; | ||
127 | |||
128 | gpio1: gpio@48032000 { | ||
129 | compatible = "ti,omap3-gpio"; | ||
130 | ti,hwmods = "gpio1"; | ||
131 | reg = <0x48032000 0x1000>; | ||
132 | interrupts = <97>; | ||
133 | }; | ||
134 | |||
135 | gpio2: gpio@4804c000 { | ||
136 | compatible = "ti,omap3-gpio"; | ||
137 | ti,hwmods = "gpio2"; | ||
138 | reg = <0x4804c000 0x1000>; | ||
139 | interrupts = <99>; | ||
140 | }; | ||
141 | |||
142 | gpmc: gpmc@50000000 { | ||
143 | compatible = "ti,am3352-gpmc"; | ||
144 | ti,hwmods = "gpmc"; | ||
145 | reg = <0x50000000 0x2000>; | ||
146 | #address-cells = <2>; | ||
147 | #size-cells = <1>; | ||
148 | interrupts = <100>; | ||
149 | gpmc,num-cs = <6>; | ||
150 | gpmc,num-waitpins = <2>; | ||
151 | }; | ||
152 | |||
153 | i2c1: i2c@48028000 { | ||
154 | compatible = "ti,omap4-i2c"; | ||
155 | ti,hwmods = "i2c1"; | ||
156 | reg = <0x48028000 0x1000>; | ||
157 | #address-cells = <1>; | ||
158 | #size-cells = <0>; | ||
159 | interrupts = <70>; | ||
160 | dmas = <&edma 58 &edma 59>; | ||
161 | dma-names = "tx", "rx"; | ||
162 | }; | ||
163 | |||
164 | i2c2: i2c@4802a000 { | ||
165 | compatible = "ti,omap4-i2c"; | ||
166 | ti,hwmods = "i2c2"; | ||
167 | reg = <0x4802a000 0x1000>; | ||
168 | #address-cells = <1>; | ||
169 | #size-cells = <0>; | ||
170 | interrupts = <71>; | ||
171 | dmas = <&edma 60 &edma 61>; | ||
172 | dma-names = "tx", "rx"; | ||
173 | }; | ||
174 | |||
175 | intc: interrupt-controller@48200000 { | ||
176 | compatible = "ti,dm816-intc"; | ||
177 | interrupt-controller; | ||
178 | #interrupt-cells = <1>; | ||
179 | reg = <0x48200000 0x1000>; | ||
180 | }; | ||
181 | |||
182 | mailbox: mailbox@480c8000 { | ||
183 | compatible = "ti,omap4-mailbox"; | ||
184 | reg = <0x480c8000 0x2000>; | ||
185 | interrupts = <77>; | ||
186 | ti,hwmods = "mailbox"; | ||
187 | ti,mbox-num-users = <4>; | ||
188 | ti,mbox-num-fifos = <12>; | ||
189 | mbox_dsp: mbox_dsp { | ||
190 | ti,mbox-tx = <3 0 0>; | ||
191 | ti,mbox-rx = <0 0 0>; | ||
192 | }; | ||
193 | }; | ||
194 | |||
195 | mdio: mdio@4a100800 { | ||
196 | compatible = "ti,davinci_mdio"; | ||
197 | #address-cells = <1>; | ||
198 | #size-cells = <0>; | ||
199 | reg = <0x4a100800 0x100>; | ||
200 | ti,hwmods = "davinci_mdio"; | ||
201 | bus_freq = <1000000>; | ||
202 | phy0: ethernet-phy@0 { | ||
203 | reg = <1>; | ||
204 | }; | ||
205 | phy1: ethernet-phy@1 { | ||
206 | reg = <2>; | ||
207 | }; | ||
208 | }; | ||
209 | |||
210 | eth0: ethernet@4a100000 { | ||
211 | compatible = "ti,dm816-emac"; | ||
212 | ti,hwmods = "emac0"; | ||
213 | reg = <0x4a100000 0x800 | ||
214 | 0x4a100900 0x3700>; | ||
215 | clocks = <&sysclk24_ck>; | ||
216 | ti,davinci-ctrl-reg-offset = <0>; | ||
217 | ti,davinci-ctrl-mod-reg-offset = <0x900>; | ||
218 | ti,davinci-ctrl-ram-offset = <0x2000>; | ||
219 | ti,davinci-ctrl-ram-size = <0x2000>; | ||
220 | interrupts = <40 41 42 43>; | ||
221 | phy-handle = <&phy0>; | ||
222 | }; | ||
223 | |||
224 | eth1: ethernet@4a120000 { | ||
225 | compatible = "ti,dm816-emac"; | ||
226 | ti,hwmods = "emac1"; | ||
227 | reg = <0x4a120000 0x4000>; | ||
228 | clocks = <&sysclk24_ck>; | ||
229 | ti,davinci-ctrl-reg-offset = <0>; | ||
230 | ti,davinci-ctrl-mod-reg-offset = <0x900>; | ||
231 | ti,davinci-ctrl-ram-offset = <0x2000>; | ||
232 | ti,davinci-ctrl-ram-size = <0x2000>; | ||
233 | interrupts = <44 45 46 47>; | ||
234 | phy-handle = <&phy1>; | ||
235 | }; | ||
236 | |||
237 | mcspi1: spi@48030000 { | ||
238 | compatible = "ti,omap4-mcspi"; | ||
239 | reg = <0x48030000 0x1000>; | ||
240 | #address-cells = <1>; | ||
241 | #size-cells = <0>; | ||
242 | interrupts = <65>; | ||
243 | ti,spi-num-cs = <4>; | ||
244 | ti,hwmods = "mcspi1"; | ||
245 | dmas = <&edma 16 &edma 17 | ||
246 | &edma 18 &edma 19>; | ||
247 | dma-names = "tx0", "rx0", "tx1", "rx1"; | ||
248 | }; | ||
249 | |||
250 | mmc1: mmc@48060000 { | ||
251 | compatible = "ti,omap4-hsmmc"; | ||
252 | reg = <0x48060000 0x11000>; | ||
253 | ti,hwmods = "mmc1"; | ||
254 | interrupts = <64>; | ||
255 | dmas = <&edma 24 &edma 25>; | ||
256 | dma-names = "tx", "rx"; | ||
257 | }; | ||
258 | |||
259 | timer1: timer@4802e000 { | ||
260 | compatible = "ti,dm816-timer"; | ||
261 | reg = <0x4802e000 0x2000>; | ||
262 | interrupts = <67>; | ||
263 | ti,hwmods = "timer1"; | ||
264 | ti,timer-alwon; | ||
265 | }; | ||
266 | |||
267 | timer2: timer@48040000 { | ||
268 | compatible = "ti,dm816-timer"; | ||
269 | reg = <0x48040000 0x2000>; | ||
270 | interrupts = <68>; | ||
271 | ti,hwmods = "timer2"; | ||
272 | }; | ||
273 | |||
274 | timer3: timer@48042000 { | ||
275 | compatible = "ti,dm816-timer"; | ||
276 | reg = <0x48042000 0x2000>; | ||
277 | interrupts = <69>; | ||
278 | ti,hwmods = "timer3"; | ||
279 | }; | ||
280 | |||
281 | timer4: timer@48044000 { | ||
282 | compatible = "ti,dm816-timer"; | ||
283 | reg = <0x48044000 0x2000>; | ||
284 | interrupts = <92>; | ||
285 | ti,hwmods = "timer4"; | ||
286 | }; | ||
287 | |||
288 | timer5: timer@48046000 { | ||
289 | compatible = "ti,dm816-timer"; | ||
290 | reg = <0x48046000 0x2000>; | ||
291 | interrupts = <93>; | ||
292 | ti,hwmods = "timer5"; | ||
293 | }; | ||
294 | |||
295 | timer6: timer@48048000 { | ||
296 | compatible = "ti,dm816-timer"; | ||
297 | reg = <0x48048000 0x2000>; | ||
298 | interrupts = <94>; | ||
299 | ti,hwmods = "timer6"; | ||
300 | }; | ||
301 | |||
302 | timer7: timer@4804a000 { | ||
303 | compatible = "ti,dm816-timer"; | ||
304 | reg = <0x4804a000 0x2000>; | ||
305 | interrupts = <95>; | ||
306 | ti,hwmods = "timer7"; | ||
307 | }; | ||
308 | |||
309 | uart1: uart@48020000 { | ||
310 | compatible = "ti,omap3-uart"; | ||
311 | ti,hwmods = "uart1"; | ||
312 | reg = <0x48020000 0x2000>; | ||
313 | clock-frequency = <48000000>; | ||
314 | interrupts = <72>; | ||
315 | dmas = <&edma 26 &edma 27>; | ||
316 | dma-names = "tx", "rx"; | ||
317 | }; | ||
318 | |||
319 | uart2: uart@48022000 { | ||
320 | compatible = "ti,omap3-uart"; | ||
321 | ti,hwmods = "uart2"; | ||
322 | reg = <0x48022000 0x2000>; | ||
323 | clock-frequency = <48000000>; | ||
324 | interrupts = <73>; | ||
325 | dmas = <&edma 28 &edma 29>; | ||
326 | dma-names = "tx", "rx"; | ||
327 | }; | ||
328 | |||
329 | uart3: uart@48024000 { | ||
330 | compatible = "ti,omap3-uart"; | ||
331 | ti,hwmods = "uart3"; | ||
332 | reg = <0x48024000 0x2000>; | ||
333 | clock-frequency = <48000000>; | ||
334 | interrupts = <74>; | ||
335 | dmas = <&edma 30 &edma 31>; | ||
336 | dma-names = "tx", "rx"; | ||
337 | }; | ||
338 | |||
339 | /* NOTE: USB needs a transceiver driver for phys to work */ | ||
340 | usb: usb_otg_hs@47401000 { | ||
341 | compatible = "ti,am33xx-usb"; | ||
342 | reg = <0x47401000 0x400000>; | ||
343 | ranges; | ||
344 | #address-cells = <1>; | ||
345 | #size-cells = <1>; | ||
346 | ti,hwmods = "usb_otg_hs"; | ||
347 | |||
348 | usb0: usb@47401000 { | ||
349 | compatible = "ti,musb-am33xx"; | ||
350 | reg = <0x47401400 0x400 | ||
351 | 0x47401000 0x200>; | ||
352 | reg-names = "mc", "control"; | ||
353 | interrupts = <18>; | ||
354 | interrupt-names = "mc"; | ||
355 | dr_mode = "otg"; | ||
356 | mentor,multipoint = <1>; | ||
357 | mentor,num-eps = <16>; | ||
358 | mentor,ram-bits = <12>; | ||
359 | mentor,power = <500>; | ||
360 | }; | ||
361 | |||
362 | usb1: usb@47401800 { | ||
363 | compatible = "ti,musb-am33xx"; | ||
364 | status = "disabled"; | ||
365 | reg = <0x47401c00 0x400 | ||
366 | 0x47401800 0x200>; | ||
367 | reg-names = "mc", "control"; | ||
368 | interrupts = <19>; | ||
369 | interrupt-names = "mc"; | ||
370 | dr_mode = "otg"; | ||
371 | mentor,multipoint = <1>; | ||
372 | mentor,num-eps = <16>; | ||
373 | mentor,ram-bits = <12>; | ||
374 | mentor,power = <500>; | ||
375 | }; | ||
376 | }; | ||
377 | |||
378 | wd_timer2: wd_timer@480c2000 { | ||
379 | compatible = "ti,omap3-wdt"; | ||
380 | ti,hwmods = "wd_timer"; | ||
381 | reg = <0x480c2000 0x1000>; | ||
382 | interrupts = <0>; | ||
383 | }; | ||
384 | }; | ||
385 | }; | ||
386 | |||