diff options
author | Mikko Perttunen <mperttunen@nvidia.com> | 2013-10-29 11:51:10 -0400 |
---|---|---|
committer | Peter De Schrijver <pdeschrijver@nvidia.com> | 2013-11-26 11:46:56 -0500 |
commit | 77f71730341e9072766eabc5bbd001aa286e7a23 (patch) | |
tree | e56cc89d78e598a695ee2ef7ef6e9f26701cb315 | |
parent | 61792e40ca008d60331bb55df5faaa8fe220ac24 (diff) |
clk: tegra114: Initialize clocks needed for HDMI
Add disp1 and disp2 clocks to the clock initialization table. These
clocks are required for display and HDMI support.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
-rw-r--r-- | drivers/clk/tegra/clk-tegra114.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c index 0b8c9af5bff3..875859d9ab5f 100644 --- a/drivers/clk/tegra/clk-tegra114.c +++ b/drivers/clk/tegra/clk-tegra114.c | |||
@@ -1294,6 +1294,8 @@ static struct tegra_clk_init_table init_table[] __initdata = { | |||
1294 | {TEGRA114_CLK_HOST1X, TEGRA114_CLK_PLL_P, 136000000, 0}, | 1294 | {TEGRA114_CLK_HOST1X, TEGRA114_CLK_PLL_P, 136000000, 0}, |
1295 | {TEGRA114_CLK_DFLL_SOC, TEGRA114_CLK_PLL_P, 51000000, 1}, | 1295 | {TEGRA114_CLK_DFLL_SOC, TEGRA114_CLK_PLL_P, 51000000, 1}, |
1296 | {TEGRA114_CLK_DFLL_REF, TEGRA114_CLK_PLL_P, 51000000, 1}, | 1296 | {TEGRA114_CLK_DFLL_REF, TEGRA114_CLK_PLL_P, 51000000, 1}, |
1297 | {TEGRA114_CLK_DISP1, TEGRA114_CLK_PLL_P, 0, 0}, | ||
1298 | {TEGRA114_CLK_DISP2, TEGRA114_CLK_PLL_P, 0, 0}, | ||
1297 | {TEGRA114_CLK_GR2D, TEGRA114_CLK_PLL_C2, 300000000, 0}, | 1299 | {TEGRA114_CLK_GR2D, TEGRA114_CLK_PLL_C2, 300000000, 0}, |
1298 | {TEGRA114_CLK_GR3D, TEGRA114_CLK_PLL_C2, 300000000, 0}, | 1300 | {TEGRA114_CLK_GR3D, TEGRA114_CLK_PLL_C2, 300000000, 0}, |
1299 | 1301 | ||