diff options
author | John Keeping <john@metanate.com> | 2016-05-09 07:24:35 -0400 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2016-05-10 13:56:01 -0400 |
commit | 779e86a31402c3f33f20bb02e99a5b75595bdf7f (patch) | |
tree | cfb27648b1ee758fb40107e59734a98e0e4f9e9b | |
parent | 8865c95e43257e6676bc0f6b042ecce17eff74fe (diff) |
ASoC: es8328: Support more sample formats
The values are the same for the DAC and ADC so remove the specific
values and use values with shifts.
Signed-off-by: John Keeping <john@metanate.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r-- | sound/soc/codecs/es8328.c | 35 | ||||
-rw-r--r-- | sound/soc/codecs/es8328.h | 12 |
2 files changed, 31 insertions, 16 deletions
diff --git a/sound/soc/codecs/es8328.c b/sound/soc/codecs/es8328.c index c5a36e65fc40..a66c21c7b5a0 100644 --- a/sound/soc/codecs/es8328.c +++ b/sound/soc/codecs/es8328.c | |||
@@ -60,7 +60,11 @@ static const char * const supply_names[ES8328_SUPPLY_NUM] = { | |||
60 | #define ES8328_RATES (SNDRV_PCM_RATE_44100 | \ | 60 | #define ES8328_RATES (SNDRV_PCM_RATE_44100 | \ |
61 | SNDRV_PCM_RATE_22050 | \ | 61 | SNDRV_PCM_RATE_22050 | \ |
62 | SNDRV_PCM_RATE_11025) | 62 | SNDRV_PCM_RATE_11025) |
63 | #define ES8328_FORMATS (SNDRV_PCM_FMTBIT_S16_LE) | 63 | #define ES8328_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ |
64 | SNDRV_PCM_FMTBIT_S18_3LE | \ | ||
65 | SNDRV_PCM_FMTBIT_S20_3LE | \ | ||
66 | SNDRV_PCM_FMTBIT_S24_LE | \ | ||
67 | SNDRV_PCM_FMTBIT_S32_LE) | ||
64 | 68 | ||
65 | struct es8328_priv { | 69 | struct es8328_priv { |
66 | struct regmap *regmap; | 70 | struct regmap *regmap; |
@@ -449,6 +453,7 @@ static int es8328_hw_params(struct snd_pcm_substream *substream, | |||
449 | int i; | 453 | int i; |
450 | int reg; | 454 | int reg; |
451 | int val; | 455 | int val; |
456 | int wl; | ||
452 | u8 ratio; | 457 | u8 ratio; |
453 | 458 | ||
454 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | 459 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
@@ -470,10 +475,28 @@ static int es8328_hw_params(struct snd_pcm_substream *substream, | |||
470 | ES8328_SYSCLK_RATE_1X, ES8328_SYSCLK_RATE_2X); | 475 | ES8328_SYSCLK_RATE_1X, ES8328_SYSCLK_RATE_2X); |
471 | return -EINVAL; | 476 | return -EINVAL; |
472 | } | 477 | } |
473 | ret = snd_soc_update_bits(codec, ES8328_MASTERMODE, | 478 | snd_soc_update_bits(codec, ES8328_MASTERMODE, |
474 | ES8328_MASTERMODE_MCLKDIV2, val); | 479 | ES8328_MASTERMODE_MCLKDIV2, val); |
475 | if (ret < 0) | 480 | |
476 | return ret; | 481 | switch (params_width(params)) { |
482 | case 16: | ||
483 | wl = 3; | ||
484 | break; | ||
485 | case 18: | ||
486 | wl = 2; | ||
487 | break; | ||
488 | case 20: | ||
489 | wl = 1; | ||
490 | break; | ||
491 | case 24: | ||
492 | wl = 0; | ||
493 | break; | ||
494 | case 32: | ||
495 | wl = 4; | ||
496 | break; | ||
497 | default: | ||
498 | return -EINVAL; | ||
499 | } | ||
477 | 500 | ||
478 | /* find master mode MCLK to sampling frequency ratio */ | 501 | /* find master mode MCLK to sampling frequency ratio */ |
479 | ratio = mclk_ratios[0].rate; | 502 | ratio = mclk_ratios[0].rate; |
@@ -484,14 +507,14 @@ static int es8328_hw_params(struct snd_pcm_substream *substream, | |||
484 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { | 507 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
485 | snd_soc_update_bits(codec, ES8328_DACCONTROL1, | 508 | snd_soc_update_bits(codec, ES8328_DACCONTROL1, |
486 | ES8328_DACCONTROL1_DACWL_MASK, | 509 | ES8328_DACCONTROL1_DACWL_MASK, |
487 | ES8328_DACCONTROL1_DACWL_16); | 510 | wl << ES8328_DACCONTROL1_DACWL_SHIFT); |
488 | 511 | ||
489 | es8328->playback_fs = params_rate(params); | 512 | es8328->playback_fs = params_rate(params); |
490 | es8328_set_deemph(codec); | 513 | es8328_set_deemph(codec); |
491 | } else | 514 | } else |
492 | snd_soc_update_bits(codec, ES8328_ADCCONTROL4, | 515 | snd_soc_update_bits(codec, ES8328_ADCCONTROL4, |
493 | ES8328_ADCCONTROL4_ADCWL_MASK, | 516 | ES8328_ADCCONTROL4_ADCWL_MASK, |
494 | ES8328_ADCCONTROL4_ADCWL_16); | 517 | wl << ES8328_ADCCONTROL4_ADCWL_SHIFT); |
495 | 518 | ||
496 | return snd_soc_update_bits(codec, reg, ES8328_RATEMASK, ratio); | 519 | return snd_soc_update_bits(codec, reg, ES8328_RATEMASK, ratio); |
497 | } | 520 | } |
diff --git a/sound/soc/codecs/es8328.h b/sound/soc/codecs/es8328.h index 9c33d8bda859..1a736e72a929 100644 --- a/sound/soc/codecs/es8328.h +++ b/sound/soc/codecs/es8328.h | |||
@@ -91,11 +91,7 @@ int es8328_probe(struct device *dev, struct regmap *regmap); | |||
91 | #define ES8328_ADCCONTROL4_ADCFORMAT_LJUST (1 << 0) | 91 | #define ES8328_ADCCONTROL4_ADCFORMAT_LJUST (1 << 0) |
92 | #define ES8328_ADCCONTROL4_ADCFORMAT_RJUST (2 << 0) | 92 | #define ES8328_ADCCONTROL4_ADCFORMAT_RJUST (2 << 0) |
93 | #define ES8328_ADCCONTROL4_ADCFORMAT_PCM (3 << 0) | 93 | #define ES8328_ADCCONTROL4_ADCFORMAT_PCM (3 << 0) |
94 | #define ES8328_ADCCONTROL4_ADCWL_24 (0 << 2) | 94 | #define ES8328_ADCCONTROL4_ADCWL_SHIFT 2 |
95 | #define ES8328_ADCCONTROL4_ADCWL_20 (1 << 2) | ||
96 | #define ES8328_ADCCONTROL4_ADCWL_18 (2 << 2) | ||
97 | #define ES8328_ADCCONTROL4_ADCWL_16 (3 << 2) | ||
98 | #define ES8328_ADCCONTROL4_ADCWL_32 (4 << 2) | ||
99 | #define ES8328_ADCCONTROL4_ADCWL_MASK (7 << 2) | 95 | #define ES8328_ADCCONTROL4_ADCWL_MASK (7 << 2) |
100 | #define ES8328_ADCCONTROL4_ADCLRP_I2S_POL_NORMAL (0 << 5) | 96 | #define ES8328_ADCCONTROL4_ADCLRP_I2S_POL_NORMAL (0 << 5) |
101 | #define ES8328_ADCCONTROL4_ADCLRP_I2S_POL_INV (1 << 5) | 97 | #define ES8328_ADCCONTROL4_ADCLRP_I2S_POL_INV (1 << 5) |
@@ -131,11 +127,7 @@ int es8328_probe(struct device *dev, struct regmap *regmap); | |||
131 | #define ES8328_DACCONTROL1_DACFORMAT_LJUST (1 << 1) | 127 | #define ES8328_DACCONTROL1_DACFORMAT_LJUST (1 << 1) |
132 | #define ES8328_DACCONTROL1_DACFORMAT_RJUST (2 << 1) | 128 | #define ES8328_DACCONTROL1_DACFORMAT_RJUST (2 << 1) |
133 | #define ES8328_DACCONTROL1_DACFORMAT_PCM (3 << 1) | 129 | #define ES8328_DACCONTROL1_DACFORMAT_PCM (3 << 1) |
134 | #define ES8328_DACCONTROL1_DACWL_24 (0 << 3) | 130 | #define ES8328_DACCONTROL1_DACWL_SHIFT 3 |
135 | #define ES8328_DACCONTROL1_DACWL_20 (1 << 3) | ||
136 | #define ES8328_DACCONTROL1_DACWL_18 (2 << 3) | ||
137 | #define ES8328_DACCONTROL1_DACWL_16 (3 << 3) | ||
138 | #define ES8328_DACCONTROL1_DACWL_32 (4 << 3) | ||
139 | #define ES8328_DACCONTROL1_DACWL_MASK (7 << 3) | 131 | #define ES8328_DACCONTROL1_DACWL_MASK (7 << 3) |
140 | #define ES8328_DACCONTROL1_DACLRP_I2S_POL_NORMAL (0 << 6) | 132 | #define ES8328_DACCONTROL1_DACLRP_I2S_POL_NORMAL (0 << 6) |
141 | #define ES8328_DACCONTROL1_DACLRP_I2S_POL_INV (1 << 6) | 133 | #define ES8328_DACCONTROL1_DACLRP_I2S_POL_INV (1 << 6) |