ARM: sunxi: h3-h5: Add PLL_PERIPH0 clock to the R_CCU

The AR100 clock within the R_CCU (PRCM) has the PLL_PERIPH0 as one of
its parents.

This adds the reference in the device tree describing this relationship.
This patch uses a raw number for the clock index to ease merging by
avoiding cross tree dependencies.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

1 files changed, 3 insertions, 2 deletions

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index d0067fec99de..d4f600dbb7eb 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -560,8 +560,9 @@
                 r_ccu: clock@1f01400 {
                         compatible = "allwinner,sun8i-h3-r-ccu";
                         reg = <0x01f01400 0x100>;
-                        clocks = <&osc24M>, <&osc32k>, <&iosc>;
-                        clock-names = "hosc", "losc", "iosc";
+                        clocks = <&osc24M>, <&osc32k>, <&iosc>,
+                                 <&ccu 9>;
+                        clock-names = "hosc", "losc", "iosc", "pll-periph";
                         #clock-cells = <1>;
                         #reset-cells = <1>;
                 };