diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2018-06-12 15:56:02 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2018-06-12 15:56:02 -0400 |
| commit | 763f96944c954ce0e00a10a7bdfe29adbe4f92eb (patch) | |
| tree | 9ff48f1952b6b682845c195542fd55bf588271a1 | |
| parent | ea8781e5e70c14a98d62bc2bd19b57e71e773717 (diff) | |
| parent | 9ed8b56b80c11ef7c25230b93f2c486fe6b41c4d (diff) | |
Merge tag 'mips_4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from James Hogan:
"These are the main MIPS changes for 4.18.
Rough overview:
- MAINTAINERS: Add Paul Burton as MIPS co-maintainer
- Misc: Generic compiler intrinsics, Y2038 improvements, Perf+MT fixes
- Platform support: Netgear WNR1000 V3, Microsemi Ocelot integrated
switch, Ingenic watchdog cleanups
More detailed summary:
Maintainers:
- Add Paul Burton as MIPS co-maintainer, as I soon won't have access
to much MIPS hardware, nor enough time to properly maintain MIPS on
my own.
Miscellaneous:
- Use generic GCC library routines from lib/
- Add notrace to generic ucmpdi2 implementation
- Rename compiler intrinsic selects to GENERIC_LIB_*
- vmlinuz: Use generic ashldi3
- y2038: Convert update/read_persistent_clock() to *_clock64()
- sni: Remove read_persistent_clock()
- perf: Fix perf with MT counting other threads
- Probe for per-TC perf counters in cpu-probe.c
- Use correct VPE ID for VPE tracing
Minor cleanups:
- Avoid unneeded built-in.a in DTS dirs
- sc-debugfs: Re-use kstrtobool_from_user
- memset.S: Reinstate delay slot indentation
- VPE: Fix spelling "uneeded" -> "Unneeded"
Platform support:
BCM47xx:
- Add support for Netgear WNR1000 V3
- firmware: Support small NVRAM partitions
- Use __initdata for LEDs platform data
Ingenic:
- Watchdog driver & platform code improvements:
- Disable clock after stopping counter
- Use devm_* functions
- Drop module remove function
- Move platform reset code to restart handler in driver
- JZ4740: Convert watchdog instantiation to DT
- JZ4780: Fix watchdog DT node
- qi_lb60_defconfig: Enable watchdog driver
Microsemi:
- Ocelot: Add support for integrated switch
- pcb123: Connect phys to ports"
* tag 'mips_4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (30 commits)
MAINTAINERS: Add Paul Burton as MIPS co-maintainer
MIPS: ptrace: Make FPU context layout comments match reality
MIPS: memset.S: Reinstate delay slot indentation
MIPS: perf: Fix perf with MT counting other threads
MIPS: perf: Use correct VPE ID when setting up VPE tracing
MIPS: perf: More robustly probe for the presence of per-tc counters
MIPS: Probe for MIPS MT perf counters per TC
MIPS: mscc: Connect phys to ports on ocelot_pcb123
MIPS: mscc: Add switch to ocelot
MIPS: JZ4740: Drop old platform reset code
MIPS: qi_lb60: Enable the jz4740-wdt driver
MIPS: JZ4780: dts: Fix watchdog node
MIPS: JZ4740: dts: Add bindings for the jz4740-wdt driver
watchdog: JZ4740: Drop module remove function
watchdog: JZ4740: Register a restart handler
watchdog: JZ4740: Use devm_* functions
watchdog: JZ4740: Disable clock after stopping counter
MIPS: VPE: Fix spelling mistake: "uneeded" -> "unneeded"
MIPS: Re-use kstrtobool_from_user()
MIPS: Convert update_persistent_clock() to update_persistent_clock64()
...
60 files changed, 339 insertions, 392 deletions
diff --git a/Documentation/devicetree/bindings/watchdog/ingenic,jz4740-wdt.txt b/Documentation/devicetree/bindings/watchdog/ingenic,jz4740-wdt.txt index cb44918f01a8..ce1cb72d5345 100644 --- a/Documentation/devicetree/bindings/watchdog/ingenic,jz4740-wdt.txt +++ b/Documentation/devicetree/bindings/watchdog/ingenic,jz4740-wdt.txt | |||
| @@ -3,10 +3,15 @@ Ingenic Watchdog Timer (WDT) Controller for JZ4740 & JZ4780 | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | compatible: "ingenic,jz4740-watchdog" or "ingenic,jz4780-watchdog" | 4 | compatible: "ingenic,jz4740-watchdog" or "ingenic,jz4780-watchdog" |
| 5 | reg: Register address and length for watchdog registers | 5 | reg: Register address and length for watchdog registers |
| 6 | clocks: phandle to the RTC clock | ||
| 7 | clock-names: should be "rtc" | ||
| 6 | 8 | ||
| 7 | Example: | 9 | Example: |
| 8 | 10 | ||
| 9 | watchdog: jz4740-watchdog@10002000 { | 11 | watchdog: jz4740-watchdog@10002000 { |
| 10 | compatible = "ingenic,jz4740-watchdog"; | 12 | compatible = "ingenic,jz4740-watchdog"; |
| 11 | reg = <0x10002000 0x100>; | 13 | reg = <0x10002000 0x10>; |
| 14 | |||
| 15 | clocks = <&cgu JZ4740_CLK_RTC>; | ||
| 16 | clock-names = "rtc"; | ||
| 12 | }; | 17 | }; |
diff --git a/MAINTAINERS b/MAINTAINERS index 12b27679ae0c..def2850a1b19 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
| @@ -9417,10 +9417,12 @@ F: drivers/usb/image/microtek.* | |||
| 9417 | 9417 | ||
| 9418 | MIPS | 9418 | MIPS |
| 9419 | M: Ralf Baechle <ralf@linux-mips.org> | 9419 | M: Ralf Baechle <ralf@linux-mips.org> |
| 9420 | M: Paul Burton <paul.burton@mips.com> | ||
| 9420 | M: James Hogan <jhogan@kernel.org> | 9421 | M: James Hogan <jhogan@kernel.org> |
| 9421 | L: linux-mips@linux-mips.org | 9422 | L: linux-mips@linux-mips.org |
| 9422 | W: http://www.linux-mips.org/ | 9423 | W: http://www.linux-mips.org/ |
| 9423 | T: git git://git.linux-mips.org/pub/scm/ralf/linux.git | 9424 | T: git git://git.linux-mips.org/pub/scm/ralf/linux.git |
| 9425 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux.git | ||
| 9424 | Q: http://patchwork.linux-mips.org/project/linux-mips/list/ | 9426 | Q: http://patchwork.linux-mips.org/project/linux-mips/list/ |
| 9425 | S: Supported | 9427 | S: Supported |
| 9426 | F: Documentation/devicetree/bindings/mips/ | 9428 | F: Documentation/devicetree/bindings/mips/ |
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 7074b2215f36..fe98e459a416 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
| @@ -22,6 +22,11 @@ config MIPS | |||
| 22 | select GENERIC_CPU_AUTOPROBE | 22 | select GENERIC_CPU_AUTOPROBE |
| 23 | select GENERIC_IRQ_PROBE | 23 | select GENERIC_IRQ_PROBE |
| 24 | select GENERIC_IRQ_SHOW | 24 | select GENERIC_IRQ_SHOW |
| 25 | select GENERIC_LIB_ASHLDI3 | ||
| 26 | select GENERIC_LIB_ASHRDI3 | ||
| 27 | select GENERIC_LIB_CMPDI2 | ||
| 28 | select GENERIC_LIB_LSHRDI3 | ||
| 29 | select GENERIC_LIB_UCMPDI2 | ||
| 25 | select GENERIC_PCI_IOMAP | 30 | select GENERIC_PCI_IOMAP |
| 26 | select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC | 31 | select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC |
| 27 | select GENERIC_SMP_IDLE_THREAD | 32 | select GENERIC_SMP_IDLE_THREAD |
diff --git a/arch/mips/bcm47xx/board.c b/arch/mips/bcm47xx/board.c index edfaef0d73a4..a80910d2738c 100644 --- a/arch/mips/bcm47xx/board.c +++ b/arch/mips/bcm47xx/board.c | |||
| @@ -172,6 +172,8 @@ struct bcm47xx_board_type_list1 bcm47xx_board_list_board_id[] __initconst = { | |||
| 172 | {{BCM47XX_BOARD_NETGEAR_WNDR4000, "Netgear WNDR4000"}, "U12H181T00_NETGEAR"}, | 172 | {{BCM47XX_BOARD_NETGEAR_WNDR4000, "Netgear WNDR4000"}, "U12H181T00_NETGEAR"}, |
| 173 | {{BCM47XX_BOARD_NETGEAR_WNDR4500V1, "Netgear WNDR4500 V1"}, "U12H189T00_NETGEAR"}, | 173 | {{BCM47XX_BOARD_NETGEAR_WNDR4500V1, "Netgear WNDR4500 V1"}, "U12H189T00_NETGEAR"}, |
| 174 | {{BCM47XX_BOARD_NETGEAR_WNDR4500V2, "Netgear WNDR4500 V2"}, "U12H224T00_NETGEAR"}, | 174 | {{BCM47XX_BOARD_NETGEAR_WNDR4500V2, "Netgear WNDR4500 V2"}, "U12H224T00_NETGEAR"}, |
| 175 | {{BCM47XX_BOARD_NETGEAR_WNR1000_V3, "Netgear WNR1000 V3"}, "U12H139T00_NETGEAR"}, | ||
| 176 | {{BCM47XX_BOARD_NETGEAR_WNR1000_V3, "Netgear WNR1000 V3"}, "U12H139T50_NETGEAR"}, | ||
| 175 | {{BCM47XX_BOARD_NETGEAR_WNR2000, "Netgear WNR2000"}, "U12H114T00_NETGEAR"}, | 177 | {{BCM47XX_BOARD_NETGEAR_WNR2000, "Netgear WNR2000"}, "U12H114T00_NETGEAR"}, |
| 176 | {{BCM47XX_BOARD_NETGEAR_WNR3500L, "Netgear WNR3500L"}, "U12H136T99_NETGEAR"}, | 178 | {{BCM47XX_BOARD_NETGEAR_WNR3500L, "Netgear WNR3500L"}, "U12H136T99_NETGEAR"}, |
| 177 | {{BCM47XX_BOARD_NETGEAR_WNR3500U, "Netgear WNR3500U"}, "U12H136T00_NETGEAR"}, | 179 | {{BCM47XX_BOARD_NETGEAR_WNR3500U, "Netgear WNR3500U"}, "U12H136T00_NETGEAR"}, |
diff --git a/arch/mips/bcm47xx/buttons.c b/arch/mips/bcm47xx/buttons.c index 88d400d256c4..977990a609ba 100644 --- a/arch/mips/bcm47xx/buttons.c +++ b/arch/mips/bcm47xx/buttons.c | |||
| @@ -412,6 +412,12 @@ bcm47xx_buttons_netgear_wndr4500v1[] __initconst = { | |||
| 412 | }; | 412 | }; |
| 413 | 413 | ||
| 414 | static const struct gpio_keys_button | 414 | static const struct gpio_keys_button |
| 415 | bcm47xx_buttons_netgear_wnr1000_v3[] __initconst = { | ||
| 416 | BCM47XX_GPIO_KEY(2, KEY_WPS_BUTTON), | ||
| 417 | BCM47XX_GPIO_KEY(3, KEY_RESTART), | ||
| 418 | }; | ||
| 419 | |||
| 420 | static const struct gpio_keys_button | ||
| 415 | bcm47xx_buttons_netgear_wnr3500lv1[] __initconst = { | 421 | bcm47xx_buttons_netgear_wnr3500lv1[] __initconst = { |
| 416 | BCM47XX_GPIO_KEY(4, KEY_RESTART), | 422 | BCM47XX_GPIO_KEY(4, KEY_RESTART), |
| 417 | BCM47XX_GPIO_KEY(6, KEY_WPS_BUTTON), | 423 | BCM47XX_GPIO_KEY(6, KEY_WPS_BUTTON), |
| @@ -670,6 +676,9 @@ int __init bcm47xx_buttons_register(void) | |||
| 670 | case BCM47XX_BOARD_NETGEAR_WNDR4500V1: | 676 | case BCM47XX_BOARD_NETGEAR_WNDR4500V1: |
| 671 | err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wndr4500v1); | 677 | err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wndr4500v1); |
| 672 | break; | 678 | break; |
| 679 | case BCM47XX_BOARD_NETGEAR_WNR1000_V3: | ||
| 680 | err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wnr1000_v3); | ||
| 681 | break; | ||
| 673 | case BCM47XX_BOARD_NETGEAR_WNR3500L: | 682 | case BCM47XX_BOARD_NETGEAR_WNR3500L: |
| 674 | err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wnr3500lv1); | 683 | err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wnr3500lv1); |
| 675 | break; | 684 | break; |
diff --git a/arch/mips/bcm47xx/leds.c b/arch/mips/bcm47xx/leds.c index 34a7b3fbdfd9..d85fcdac8bf0 100644 --- a/arch/mips/bcm47xx/leds.c +++ b/arch/mips/bcm47xx/leds.c | |||
| @@ -498,6 +498,12 @@ bcm47xx_leds_netgear_wndr4500v1[] __initconst = { | |||
| 498 | }; | 498 | }; |
| 499 | 499 | ||
| 500 | static const struct gpio_led | 500 | static const struct gpio_led |
| 501 | bcm47xx_leds_netgear_wnr1000_v3[] __initconst = { | ||
| 502 | BCM47XX_GPIO_LED(0, "blue", "wlan", 0, LEDS_GPIO_DEFSTATE_OFF), | ||
| 503 | BCM47XX_GPIO_LED(1, "green", "wps", 0, LEDS_GPIO_DEFSTATE_OFF), | ||
| 504 | }; | ||
| 505 | |||
| 506 | static const struct gpio_led | ||
| 501 | bcm47xx_leds_netgear_wnr3500lv1[] __initconst = { | 507 | bcm47xx_leds_netgear_wnr3500lv1[] __initconst = { |
| 502 | BCM47XX_GPIO_LED(0, "blue", "wlan", 1, LEDS_GPIO_DEFSTATE_OFF), | 508 | BCM47XX_GPIO_LED(0, "blue", "wlan", 1, LEDS_GPIO_DEFSTATE_OFF), |
| 503 | BCM47XX_GPIO_LED(1, "green", "wps", 1, LEDS_GPIO_DEFSTATE_OFF), | 509 | BCM47XX_GPIO_LED(1, "green", "wps", 1, LEDS_GPIO_DEFSTATE_OFF), |
| @@ -532,7 +538,7 @@ bcm47xx_leds_simpletech_simpleshare[] __initconst = { | |||
| 532 | * Init | 538 | * Init |
| 533 | **************************************************/ | 539 | **************************************************/ |
| 534 | 540 | ||
| 535 | static struct gpio_led_platform_data bcm47xx_leds_pdata; | 541 | static struct gpio_led_platform_data bcm47xx_leds_pdata __initdata; |
| 536 | 542 | ||
| 537 | #define bcm47xx_set_pdata(dev_leds) do { \ | 543 | #define bcm47xx_set_pdata(dev_leds) do { \ |
| 538 | bcm47xx_leds_pdata.leds = dev_leds; \ | 544 | bcm47xx_leds_pdata.leds = dev_leds; \ |
| @@ -758,6 +764,9 @@ void __init bcm47xx_leds_register(void) | |||
| 758 | case BCM47XX_BOARD_NETGEAR_WNDR4500V1: | 764 | case BCM47XX_BOARD_NETGEAR_WNDR4500V1: |
| 759 | bcm47xx_set_pdata(bcm47xx_leds_netgear_wndr4500v1); | 765 | bcm47xx_set_pdata(bcm47xx_leds_netgear_wndr4500v1); |
| 760 | break; | 766 | break; |
| 767 | case BCM47XX_BOARD_NETGEAR_WNR1000_V3: | ||
| 768 | bcm47xx_set_pdata(bcm47xx_leds_netgear_wnr1000_v3); | ||
| 769 | break; | ||
| 761 | case BCM47XX_BOARD_NETGEAR_WNR3500L: | 770 | case BCM47XX_BOARD_NETGEAR_WNR3500L: |
| 762 | bcm47xx_set_pdata(bcm47xx_leds_netgear_wnr3500lv1); | 771 | bcm47xx_set_pdata(bcm47xx_leds_netgear_wnr3500lv1); |
| 763 | break; | 772 | break; |
diff --git a/arch/mips/boot/compressed/Makefile b/arch/mips/boot/compressed/Makefile index adce180f3ee4..abe77add8789 100644 --- a/arch/mips/boot/compressed/Makefile +++ b/arch/mips/boot/compressed/Makefile | |||
| @@ -46,10 +46,13 @@ $(obj)/uart-ath79.c: $(srctree)/arch/mips/ath79/early_printk.c | |||
| 46 | 46 | ||
| 47 | vmlinuzobjs-$(CONFIG_KERNEL_XZ) += $(obj)/ashldi3.o $(obj)/bswapsi.o | 47 | vmlinuzobjs-$(CONFIG_KERNEL_XZ) += $(obj)/ashldi3.o $(obj)/bswapsi.o |
| 48 | 48 | ||
| 49 | extra-y += ashldi3.c bswapsi.c | 49 | extra-y += ashldi3.c |
| 50 | $(obj)/ashldi3.o $(obj)/bswapsi.o: KBUILD_CFLAGS += -I$(srctree)/arch/mips/lib | 50 | $(obj)/ashldi3.c: $(obj)/%.c: $(srctree)/lib/%.c FORCE |
| 51 | $(obj)/ashldi3.c $(obj)/bswapsi.c: $(obj)/%.c: $(srctree)/arch/mips/lib/%.c | 51 | $(call if_changed,shipped) |
| 52 | $(call cmd,shipped) | 52 | |
| 53 | extra-y += bswapsi.c | ||
| 54 | $(obj)/bswapsi.c: $(obj)/%.c: $(srctree)/arch/mips/lib/%.c FORCE | ||
| 55 | $(call if_changed,shipped) | ||
| 53 | 56 | ||
| 54 | targets := $(notdir $(vmlinuzobjs-y)) | 57 | targets := $(notdir $(vmlinuzobjs-y)) |
| 55 | 58 | ||
diff --git a/arch/mips/boot/dts/brcm/Makefile b/arch/mips/boot/dts/brcm/Makefile index d8787c9a499e..d85f446cc0ce 100644 --- a/arch/mips/boot/dts/brcm/Makefile +++ b/arch/mips/boot/dts/brcm/Makefile | |||
| @@ -34,4 +34,4 @@ dtb-$(CONFIG_DT_NONE) += \ | |||
| 34 | bcm97425svmb.dtb \ | 34 | bcm97425svmb.dtb \ |
| 35 | bcm97435svmb.dtb | 35 | bcm97435svmb.dtb |
| 36 | 36 | ||
| 37 | obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y)) | 37 | obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y)) |
diff --git a/arch/mips/boot/dts/cavium-octeon/Makefile b/arch/mips/boot/dts/cavium-octeon/Makefile index 24a8efcd7b03..17aef35f311b 100644 --- a/arch/mips/boot/dts/cavium-octeon/Makefile +++ b/arch/mips/boot/dts/cavium-octeon/Makefile | |||
| @@ -1,4 +1,4 @@ | |||
| 1 | # SPDX-License-Identifier: GPL-2.0 | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | dtb-$(CONFIG_CAVIUM_OCTEON_SOC) += octeon_3xxx.dtb octeon_68xx.dtb | 2 | dtb-$(CONFIG_CAVIUM_OCTEON_SOC) += octeon_3xxx.dtb octeon_68xx.dtb |
| 3 | 3 | ||
| 4 | obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y)) | 4 | obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y)) |
diff --git a/arch/mips/boot/dts/ingenic/Makefile b/arch/mips/boot/dts/ingenic/Makefile index 5b1361a89e02..9cc48441eb71 100644 --- a/arch/mips/boot/dts/ingenic/Makefile +++ b/arch/mips/boot/dts/ingenic/Makefile | |||
| @@ -3,4 +3,4 @@ dtb-$(CONFIG_JZ4740_QI_LB60) += qi_lb60.dtb | |||
| 3 | dtb-$(CONFIG_JZ4770_GCW0) += gcw0.dtb | 3 | dtb-$(CONFIG_JZ4770_GCW0) += gcw0.dtb |
| 4 | dtb-$(CONFIG_JZ4780_CI20) += ci20.dtb | 4 | dtb-$(CONFIG_JZ4780_CI20) += ci20.dtb |
| 5 | 5 | ||
| 6 | obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y)) | 6 | obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y)) |
diff --git a/arch/mips/boot/dts/ingenic/jz4740.dtsi b/arch/mips/boot/dts/ingenic/jz4740.dtsi index cd5185bb90ae..26c6b561d6f7 100644 --- a/arch/mips/boot/dts/ingenic/jz4740.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4740.dtsi | |||
| @@ -45,6 +45,14 @@ | |||
| 45 | #clock-cells = <1>; | 45 | #clock-cells = <1>; |
| 46 | }; | 46 | }; |
| 47 | 47 | ||
| 48 | watchdog: watchdog@10002000 { | ||
| 49 | compatible = "ingenic,jz4740-watchdog"; | ||
| 50 | reg = <0x10002000 0x10>; | ||
| 51 | |||
| 52 | clocks = <&cgu JZ4740_CLK_RTC>; | ||
| 53 | clock-names = "rtc"; | ||
| 54 | }; | ||
| 55 | |||
| 48 | rtc_dev: rtc@10003000 { | 56 | rtc_dev: rtc@10003000 { |
| 49 | compatible = "ingenic,jz4740-rtc"; | 57 | compatible = "ingenic,jz4740-rtc"; |
| 50 | reg = <0x10003000 0x40>; | 58 | reg = <0x10003000 0x40>; |
diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi index b72e53bb7292..aa4e8f75ff5d 100644 --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi | |||
| @@ -222,7 +222,10 @@ | |||
| 222 | 222 | ||
| 223 | watchdog: watchdog@10002000 { | 223 | watchdog: watchdog@10002000 { |
| 224 | compatible = "ingenic,jz4780-watchdog"; | 224 | compatible = "ingenic,jz4780-watchdog"; |
| 225 | reg = <0x10002000 0x100>; | 225 | reg = <0x10002000 0x10>; |
| 226 | |||
| 227 | clocks = <&cgu JZ4780_CLK_RTCLK>; | ||
| 228 | clock-names = "rtc"; | ||
| 226 | }; | 229 | }; |
| 227 | 230 | ||
| 228 | nemc: nemc@13410000 { | 231 | nemc: nemc@13410000 { |
diff --git a/arch/mips/boot/dts/lantiq/Makefile b/arch/mips/boot/dts/lantiq/Makefile index 51ab9c1dff42..f5dfc06242b9 100644 --- a/arch/mips/boot/dts/lantiq/Makefile +++ b/arch/mips/boot/dts/lantiq/Makefile | |||
| @@ -1,4 +1,4 @@ | |||
| 1 | # SPDX-License-Identifier: GPL-2.0 | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | dtb-$(CONFIG_DT_EASY50712) += easy50712.dtb | 2 | dtb-$(CONFIG_DT_EASY50712) += easy50712.dtb |
| 3 | 3 | ||
| 4 | obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y)) | 4 | obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y)) |
diff --git a/arch/mips/boot/dts/mscc/Makefile b/arch/mips/boot/dts/mscc/Makefile index c51164537c02..3c6aed9f5439 100644 --- a/arch/mips/boot/dts/mscc/Makefile +++ b/arch/mips/boot/dts/mscc/Makefile | |||
| @@ -1,3 +1,3 @@ | |||
| 1 | dtb-$(CONFIG_LEGACY_BOARD_OCELOT) += ocelot_pcb123.dtb | 1 | dtb-$(CONFIG_LEGACY_BOARD_OCELOT) += ocelot_pcb123.dtb |
| 2 | 2 | ||
| 3 | obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y)) | 3 | obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y)) |
diff --git a/arch/mips/boot/dts/mscc/ocelot.dtsi b/arch/mips/boot/dts/mscc/ocelot.dtsi index dd239cab2f9d..4f33dbc67348 100644 --- a/arch/mips/boot/dts/mscc/ocelot.dtsi +++ b/arch/mips/boot/dts/mscc/ocelot.dtsi | |||
| @@ -91,6 +91,72 @@ | |||
| 91 | status = "disabled"; | 91 | status = "disabled"; |
| 92 | }; | 92 | }; |
| 93 | 93 | ||
| 94 | switch@1010000 { | ||
| 95 | compatible = "mscc,vsc7514-switch"; | ||
| 96 | reg = <0x1010000 0x10000>, | ||
| 97 | <0x1030000 0x10000>, | ||
| 98 | <0x1080000 0x100>, | ||
| 99 | <0x10d0000 0x10000>, | ||
| 100 | <0x11e0000 0x100>, | ||
| 101 | <0x11f0000 0x100>, | ||
| 102 | <0x1200000 0x100>, | ||
| 103 | <0x1210000 0x100>, | ||
| 104 | <0x1220000 0x100>, | ||
| 105 | <0x1230000 0x100>, | ||
| 106 | <0x1240000 0x100>, | ||
| 107 | <0x1250000 0x100>, | ||
| 108 | <0x1260000 0x100>, | ||
| 109 | <0x1270000 0x100>, | ||
| 110 | <0x1280000 0x100>, | ||
| 111 | <0x1800000 0x80000>, | ||
| 112 | <0x1880000 0x10000>; | ||
| 113 | reg-names = "sys", "rew", "qs", "hsio", "port0", | ||
| 114 | "port1", "port2", "port3", "port4", "port5", | ||
| 115 | "port6", "port7", "port8", "port9", "port10", | ||
| 116 | "qsys", "ana"; | ||
| 117 | interrupts = <21 22>; | ||
| 118 | interrupt-names = "xtr", "inj"; | ||
| 119 | |||
| 120 | ethernet-ports { | ||
| 121 | #address-cells = <1>; | ||
| 122 | #size-cells = <0>; | ||
| 123 | |||
| 124 | port0: port@0 { | ||
| 125 | reg = <0>; | ||
| 126 | }; | ||
| 127 | port1: port@1 { | ||
| 128 | reg = <1>; | ||
| 129 | }; | ||
| 130 | port2: port@2 { | ||
| 131 | reg = <2>; | ||
| 132 | }; | ||
| 133 | port3: port@3 { | ||
| 134 | reg = <3>; | ||
| 135 | }; | ||
| 136 | port4: port@4 { | ||
| 137 | reg = <4>; | ||
| 138 | }; | ||
| 139 | port5: port@5 { | ||
| 140 | reg = <5>; | ||
| 141 | }; | ||
| 142 | port6: port@6 { | ||
| 143 | reg = <6>; | ||
| 144 | }; | ||
| 145 | port7: port@7 { | ||
| 146 | reg = <7>; | ||
| 147 | }; | ||
| 148 | port8: port@8 { | ||
| 149 | reg = <8>; | ||
| 150 | }; | ||
| 151 | port9: port@9 { | ||
| 152 | reg = <9>; | ||
| 153 | }; | ||
| 154 | port10: port@10 { | ||
| 155 | reg = <10>; | ||
| 156 | }; | ||
| 157 | }; | ||
| 158 | }; | ||
| 159 | |||
| 94 | reset@1070008 { | 160 | reset@1070008 { |
| 95 | compatible = "mscc,ocelot-chip-reset"; | 161 | compatible = "mscc,ocelot-chip-reset"; |
| 96 | reg = <0x1070008 0x4>; | 162 | reg = <0x1070008 0x4>; |
| @@ -113,5 +179,27 @@ | |||
| 113 | function = "uart2"; | 179 | function = "uart2"; |
| 114 | }; | 180 | }; |
| 115 | }; | 181 | }; |
| 182 | |||
| 183 | mdio0: mdio@107009c { | ||
| 184 | #address-cells = <1>; | ||
| 185 | #size-cells = <0>; | ||
| 186 | compatible = "mscc,ocelot-miim"; | ||
| 187 | reg = <0x107009c 0x36>, <0x10700f0 0x8>; | ||
| 188 | interrupts = <14>; | ||
| 189 | status = "disabled"; | ||
| 190 | |||
| 191 | phy0: ethernet-phy@0 { | ||
| 192 | reg = <0>; | ||
| 193 | }; | ||
| 194 | phy1: ethernet-phy@1 { | ||
| 195 | reg = <1>; | ||
| 196 | }; | ||
| 197 | phy2: ethernet-phy@2 { | ||
| 198 | reg = <2>; | ||
| 199 | }; | ||
| 200 | phy3: ethernet-phy@3 { | ||
| 201 | reg = <3>; | ||
| 202 | }; | ||
| 203 | }; | ||
| 116 | }; | 204 | }; |
| 117 | }; | 205 | }; |
diff --git a/arch/mips/boot/dts/mscc/ocelot_pcb123.dts b/arch/mips/boot/dts/mscc/ocelot_pcb123.dts index 29d6414f8886..4ccd65379059 100644 --- a/arch/mips/boot/dts/mscc/ocelot_pcb123.dts +++ b/arch/mips/boot/dts/mscc/ocelot_pcb123.dts | |||
| @@ -25,3 +25,23 @@ | |||
| 25 | &uart2 { | 25 | &uart2 { |
| 26 | status = "okay"; | 26 | status = "okay"; |
| 27 | }; | 27 | }; |
| 28 | |||
| 29 | &mdio0 { | ||
| 30 | status = "okay"; | ||
| 31 | }; | ||
| 32 | |||
| 33 | &port0 { | ||
| 34 | phy-handle = <&phy0>; | ||
| 35 | }; | ||
| 36 | |||
| 37 | &port1 { | ||
| 38 | phy-handle = <&phy1>; | ||
| 39 | }; | ||
| 40 | |||
| 41 | &port2 { | ||
| 42 | phy-handle = <&phy2>; | ||
| 43 | }; | ||
| 44 | |||
| 45 | &port3 { | ||
| 46 | phy-handle = <&phy3>; | ||
| 47 | }; | ||
diff --git a/arch/mips/boot/dts/mti/Makefile b/arch/mips/boot/dts/mti/Makefile index 3508720cb6d9..b5f7426998b1 100644 --- a/arch/mips/boot/dts/mti/Makefile +++ b/arch/mips/boot/dts/mti/Makefile | |||
| @@ -2,4 +2,4 @@ | |||
| 2 | dtb-$(CONFIG_MIPS_MALTA) += malta.dtb | 2 | dtb-$(CONFIG_MIPS_MALTA) += malta.dtb |
| 3 | dtb-$(CONFIG_LEGACY_BOARD_SEAD3) += sead3.dtb | 3 | dtb-$(CONFIG_LEGACY_BOARD_SEAD3) += sead3.dtb |
| 4 | 4 | ||
| 5 | obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y)) | 5 | obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y)) |
diff --git a/arch/mips/boot/dts/netlogic/Makefile b/arch/mips/boot/dts/netlogic/Makefile index d630b27950f0..45af4224494f 100644 --- a/arch/mips/boot/dts/netlogic/Makefile +++ b/arch/mips/boot/dts/netlogic/Makefile | |||
| @@ -5,4 +5,4 @@ dtb-$(CONFIG_DT_XLP_FVP) += xlp_fvp.dtb | |||
| 5 | dtb-$(CONFIG_DT_XLP_GVP) += xlp_gvp.dtb | 5 | dtb-$(CONFIG_DT_XLP_GVP) += xlp_gvp.dtb |
| 6 | dtb-$(CONFIG_DT_XLP_RVP) += xlp_rvp.dtb | 6 | dtb-$(CONFIG_DT_XLP_RVP) += xlp_rvp.dtb |
| 7 | 7 | ||
| 8 | obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y)) | 8 | obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y)) |
diff --git a/arch/mips/boot/dts/pic32/Makefile b/arch/mips/boot/dts/pic32/Makefile index ba9bcef8fde9..fb57f36324db 100644 --- a/arch/mips/boot/dts/pic32/Makefile +++ b/arch/mips/boot/dts/pic32/Makefile | |||
| @@ -4,4 +4,4 @@ dtb-$(CONFIG_DTB_PIC32_MZDA_SK) += pic32mzda_sk.dtb | |||
| 4 | dtb-$(CONFIG_DTB_PIC32_NONE) += \ | 4 | dtb-$(CONFIG_DTB_PIC32_NONE) += \ |
| 5 | pic32mzda_sk.dtb | 5 | pic32mzda_sk.dtb |
| 6 | 6 | ||
| 7 | obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y)) | 7 | obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y)) |
diff --git a/arch/mips/boot/dts/ralink/Makefile b/arch/mips/boot/dts/ralink/Makefile index 94bee5b38b53..6c26dfa0a903 100644 --- a/arch/mips/boot/dts/ralink/Makefile +++ b/arch/mips/boot/dts/ralink/Makefile | |||
| @@ -6,4 +6,4 @@ dtb-$(CONFIG_DTB_MT7620A_EVAL) += mt7620a_eval.dtb | |||
| 6 | dtb-$(CONFIG_DTB_OMEGA2P) += omega2p.dtb | 6 | dtb-$(CONFIG_DTB_OMEGA2P) += omega2p.dtb |
| 7 | dtb-$(CONFIG_DTB_VOCORE2) += vocore2.dtb | 7 | dtb-$(CONFIG_DTB_VOCORE2) += vocore2.dtb |
| 8 | 8 | ||
| 9 | obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y)) | 9 | obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y)) |
diff --git a/arch/mips/configs/qi_lb60_defconfig b/arch/mips/configs/qi_lb60_defconfig index 3b02ff9a7c64..d8b7211a7b0f 100644 --- a/arch/mips/configs/qi_lb60_defconfig +++ b/arch/mips/configs/qi_lb60_defconfig | |||
| @@ -72,6 +72,8 @@ CONFIG_POWER_SUPPLY=y | |||
| 72 | CONFIG_BATTERY_JZ4740=y | 72 | CONFIG_BATTERY_JZ4740=y |
| 73 | CONFIG_CHARGER_GPIO=y | 73 | CONFIG_CHARGER_GPIO=y |
| 74 | # CONFIG_HWMON is not set | 74 | # CONFIG_HWMON is not set |
| 75 | CONFIG_WATCHDOG=y | ||
| 76 | CONFIG_JZ4740_WDT=y | ||
| 75 | CONFIG_MFD_JZ4740_ADC=y | 77 | CONFIG_MFD_JZ4740_ADC=y |
| 76 | CONFIG_REGULATOR=y | 78 | CONFIG_REGULATOR=y |
| 77 | CONFIG_REGULATOR_FIXED_VOLTAGE=y | 79 | CONFIG_REGULATOR_FIXED_VOLTAGE=y |
diff --git a/arch/mips/dec/time.c b/arch/mips/dec/time.c index a2a150e4fbc2..c38686f89a18 100644 --- a/arch/mips/dec/time.c +++ b/arch/mips/dec/time.c | |||
| @@ -19,7 +19,7 @@ | |||
| 19 | #include <asm/dec/ioasic.h> | 19 | #include <asm/dec/ioasic.h> |
| 20 | #include <asm/dec/machtype.h> | 20 | #include <asm/dec/machtype.h> |
| 21 | 21 | ||
| 22 | void read_persistent_clock(struct timespec *ts) | 22 | void read_persistent_clock64(struct timespec64 *ts) |
| 23 | { | 23 | { |
| 24 | unsigned int year, mon, day, hour, min, sec, real_year; | 24 | unsigned int year, mon, day, hour, min, sec, real_year; |
| 25 | unsigned long flags; | 25 | unsigned long flags; |
| @@ -54,19 +54,20 @@ void read_persistent_clock(struct timespec *ts) | |||
| 54 | 54 | ||
| 55 | year += real_year - 72 + 2000; | 55 | year += real_year - 72 + 2000; |
| 56 | 56 | ||
| 57 | ts->tv_sec = mktime(year, mon, day, hour, min, sec); | 57 | ts->tv_sec = mktime64(year, mon, day, hour, min, sec); |
| 58 | ts->tv_nsec = 0; | 58 | ts->tv_nsec = 0; |
| 59 | } | 59 | } |
| 60 | 60 | ||
| 61 | /* | 61 | /* |
| 62 | * In order to set the CMOS clock precisely, rtc_mips_set_mmss has to | 62 | * In order to set the CMOS clock precisely, update_persistent_clock64 has to |
| 63 | * be called 500 ms after the second nowtime has started, because when | 63 | * be called 500 ms after the second nowtime has started, because when |
| 64 | * nowtime is written into the registers of the CMOS clock, it will | 64 | * nowtime is written into the registers of the CMOS clock, it will |
| 65 | * jump to the next second precisely 500 ms later. Check the Dallas | 65 | * jump to the next second precisely 500 ms later. Check the Dallas |
| 66 | * DS1287 data sheet for details. | 66 | * DS1287 data sheet for details. |
| 67 | */ | 67 | */ |
| 68 | int rtc_mips_set_mmss(unsigned long nowtime) | 68 | int update_persistent_clock64(struct timespec64 now) |
| 69 | { | 69 | { |
| 70 | time64_t nowtime = now.tv_sec; | ||
| 70 | int retval = 0; | 71 | int retval = 0; |
| 71 | int real_seconds, real_minutes, cmos_minutes; | 72 | int real_seconds, real_minutes, cmos_minutes; |
| 72 | unsigned char save_control, save_freq_select; | 73 | unsigned char save_control, save_freq_select; |
| @@ -91,8 +92,7 @@ int rtc_mips_set_mmss(unsigned long nowtime) | |||
| 91 | * messing with unknown time zones but requires your | 92 | * messing with unknown time zones but requires your |
| 92 | * RTC not to be off by more than 15 minutes | 93 | * RTC not to be off by more than 15 minutes |
| 93 | */ | 94 | */ |
| 94 | real_seconds = nowtime % 60; | 95 | real_minutes = div_s64_rem(nowtime, 60, &real_seconds); |
| 95 | real_minutes = nowtime / 60; | ||
| 96 | if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1) | 96 | if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1) |
| 97 | real_minutes += 30; /* correct for half hour time zone */ | 97 | real_minutes += 30; /* correct for half hour time zone */ |
| 98 | real_minutes %= 60; | 98 | real_minutes %= 60; |
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h index 5f74590e0bea..9cdb4e4ce258 100644 --- a/arch/mips/include/asm/cpu-features.h +++ b/arch/mips/include/asm/cpu-features.h | |||
| @@ -535,6 +535,13 @@ | |||
| 535 | # define cpu_has_shared_ftlb_entries 0 | 535 | # define cpu_has_shared_ftlb_entries 0 |
| 536 | #endif | 536 | #endif |
| 537 | 537 | ||
| 538 | #ifdef CONFIG_MIPS_MT_SMP | ||
| 539 | # define cpu_has_mipsmt_pertccounters \ | ||
| 540 | (cpu_data[0].options & MIPS_CPU_MT_PER_TC_PERF_COUNTERS) | ||
| 541 | #else | ||
| 542 | # define cpu_has_mipsmt_pertccounters 0 | ||
| 543 | #endif /* CONFIG_MIPS_MT_SMP */ | ||
| 544 | |||
| 538 | /* | 545 | /* |
| 539 | * Guest capabilities | 546 | * Guest capabilities |
| 540 | */ | 547 | */ |
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index d39324c4adf1..5b9d02ef4f60 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h | |||
| @@ -418,6 +418,8 @@ enum cpu_type_enum { | |||
| 418 | MBIT_ULL(54) /* CPU shares FTLB RAM with another */ | 418 | MBIT_ULL(54) /* CPU shares FTLB RAM with another */ |
| 419 | #define MIPS_CPU_SHARED_FTLB_ENTRIES \ | 419 | #define MIPS_CPU_SHARED_FTLB_ENTRIES \ |
| 420 | MBIT_ULL(55) /* CPU shares FTLB entries with another */ | 420 | MBIT_ULL(55) /* CPU shares FTLB entries with another */ |
| 421 | #define MIPS_CPU_MT_PER_TC_PERF_COUNTERS \ | ||
| 422 | MBIT_ULL(56) /* CPU has perf counters implemented per TC (MIPSMT ASE) */ | ||
| 421 | 423 | ||
| 422 | /* | 424 | /* |
| 423 | * CPU ASE encodings | 425 | * CPU ASE encodings |
diff --git a/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h b/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h index cbf9da7f2f94..0ef8893e07f8 100644 --- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h +++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h | |||
| @@ -110,6 +110,7 @@ enum bcm47xx_board { | |||
| 110 | BCM47XX_BOARD_NETGEAR_WNDR4000, | 110 | BCM47XX_BOARD_NETGEAR_WNDR4000, |
| 111 | BCM47XX_BOARD_NETGEAR_WNDR4500V1, | 111 | BCM47XX_BOARD_NETGEAR_WNDR4500V1, |
| 112 | BCM47XX_BOARD_NETGEAR_WNDR4500V2, | 112 | BCM47XX_BOARD_NETGEAR_WNDR4500V2, |
| 113 | BCM47XX_BOARD_NETGEAR_WNR1000_V3, | ||
| 113 | BCM47XX_BOARD_NETGEAR_WNR2000, | 114 | BCM47XX_BOARD_NETGEAR_WNR2000, |
| 114 | BCM47XX_BOARD_NETGEAR_WNR3500L, | 115 | BCM47XX_BOARD_NETGEAR_WNR3500L, |
| 115 | BCM47XX_BOARD_NETGEAR_WNR3500U, | 116 | BCM47XX_BOARD_NETGEAR_WNR3500U, |
diff --git a/arch/mips/include/asm/mach-jz4740/platform.h b/arch/mips/include/asm/mach-jz4740/platform.h index 3645974b7f65..c0c932ac72a7 100644 --- a/arch/mips/include/asm/mach-jz4740/platform.h +++ b/arch/mips/include/asm/mach-jz4740/platform.h | |||
| @@ -29,7 +29,6 @@ extern struct platform_device jz4740_i2s_device; | |||
| 29 | extern struct platform_device jz4740_pcm_device; | 29 | extern struct platform_device jz4740_pcm_device; |
| 30 | extern struct platform_device jz4740_codec_device; | 30 | extern struct platform_device jz4740_codec_device; |
| 31 | extern struct platform_device jz4740_adc_device; | 31 | extern struct platform_device jz4740_adc_device; |
| 32 | extern struct platform_device jz4740_wdt_device; | ||
| 33 | extern struct platform_device jz4740_pwm_device; | 32 | extern struct platform_device jz4740_pwm_device; |
| 34 | extern struct platform_device jz4740_dma_device; | 33 | extern struct platform_device jz4740_dma_device; |
| 35 | 34 | ||
diff --git a/arch/mips/include/asm/mc146818-time.h b/arch/mips/include/asm/mc146818-time.h index 9e1ad26abdc0..cbf5cec345f1 100644 --- a/arch/mips/include/asm/mc146818-time.h +++ b/arch/mips/include/asm/mc146818-time.h | |||
| @@ -86,7 +86,7 @@ static inline int mc146818_set_rtc_mmss(unsigned long nowtime) | |||
| 86 | return retval; | 86 | return retval; |
| 87 | } | 87 | } |
| 88 | 88 | ||
| 89 | static inline unsigned long mc146818_get_cmos_time(void) | 89 | static inline time64_t mc146818_get_cmos_time(void) |
| 90 | { | 90 | { |
| 91 | unsigned int year, mon, day, hour, min, sec; | 91 | unsigned int year, mon, day, hour, min, sec; |
| 92 | unsigned long flags; | 92 | unsigned long flags; |
| @@ -113,7 +113,7 @@ static inline unsigned long mc146818_get_cmos_time(void) | |||
| 113 | spin_unlock_irqrestore(&rtc_lock, flags); | 113 | spin_unlock_irqrestore(&rtc_lock, flags); |
| 114 | year = mc146818_decode_year(year); | 114 | year = mc146818_decode_year(year); |
| 115 | 115 | ||
| 116 | return mktime(year, mon, day, hour, min, sec); | 116 | return mktime64(year, mon, day, hour, min, sec); |
| 117 | } | 117 | } |
| 118 | 118 | ||
| 119 | #endif /* __ASM_MC146818_TIME_H */ | 119 | #endif /* __ASM_MC146818_TIME_H */ |
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index f65859784a4c..ae461d91cd1f 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h | |||
| @@ -685,6 +685,11 @@ | |||
| 685 | #define MIPS_CONF7_IAR (_ULCAST_(1) << 10) | 685 | #define MIPS_CONF7_IAR (_ULCAST_(1) << 10) |
| 686 | #define MIPS_CONF7_AR (_ULCAST_(1) << 16) | 686 | #define MIPS_CONF7_AR (_ULCAST_(1) << 16) |
| 687 | 687 | ||
| 688 | /* Config7 Bits specific to MIPS Technologies. */ | ||
| 689 | |||
| 690 | /* Performance counters implemented Per TC */ | ||
| 691 | #define MTI_CONF7_PTC (_ULCAST_(1) << 19) | ||
| 692 | |||
| 688 | /* WatchLo* register definitions */ | 693 | /* WatchLo* register definitions */ |
| 689 | #define MIPS_WATCHLO_IRW (_ULCAST_(0x7) << 0) | 694 | #define MIPS_WATCHLO_IRW (_ULCAST_(0x7) << 0) |
| 690 | 695 | ||
diff --git a/arch/mips/include/asm/time.h b/arch/mips/include/asm/time.h index 17d4cd20f18c..b85ec64ee7e9 100644 --- a/arch/mips/include/asm/time.h +++ b/arch/mips/include/asm/time.h | |||
| @@ -22,15 +22,6 @@ | |||
| 22 | extern spinlock_t rtc_lock; | 22 | extern spinlock_t rtc_lock; |
| 23 | 23 | ||
| 24 | /* | 24 | /* |
| 25 | * RTC ops. By default, they point to weak no-op RTC functions. | ||
| 26 | * rtc_mips_set_time - reverse the above translation and set time to RTC. | ||
| 27 | * rtc_mips_set_mmss - similar to rtc_set_time, but only min and sec need | ||
| 28 | * to be set. Used by RTC sync-up. | ||
| 29 | */ | ||
| 30 | extern int rtc_mips_set_time(unsigned long); | ||
| 31 | extern int rtc_mips_set_mmss(unsigned long); | ||
| 32 | |||
| 33 | /* | ||
| 34 | * board specific routines required by time_init(). | 25 | * board specific routines required by time_init(). |
| 35 | */ | 26 | */ |
| 36 | extern void plat_time_init(void); | 27 | extern void plat_time_init(void); |
diff --git a/arch/mips/jz4740/platform.c b/arch/mips/jz4740/platform.c index 5b7cdd67a9d9..cbc5f8e87230 100644 --- a/arch/mips/jz4740/platform.c +++ b/arch/mips/jz4740/platform.c | |||
| @@ -233,22 +233,6 @@ struct platform_device jz4740_adc_device = { | |||
| 233 | .resource = jz4740_adc_resources, | 233 | .resource = jz4740_adc_resources, |
| 234 | }; | 234 | }; |
| 235 | 235 | ||
| 236 | /* Watchdog */ | ||
| 237 | static struct resource jz4740_wdt_resources[] = { | ||
| 238 | { | ||
| 239 | .start = JZ4740_WDT_BASE_ADDR, | ||
| 240 | .end = JZ4740_WDT_BASE_ADDR + 0x10 - 1, | ||
| 241 | .flags = IORESOURCE_MEM, | ||
| 242 | }, | ||
| 243 | }; | ||
| 244 | |||
| 245 | struct platform_device jz4740_wdt_device = { | ||
| 246 | .name = "jz4740-wdt", | ||
| 247 | .id = -1, | ||
| 248 | .num_resources = ARRAY_SIZE(jz4740_wdt_resources), | ||
| 249 | .resource = jz4740_wdt_resources, | ||
| 250 | }; | ||
| 251 | |||
| 252 | /* PWM */ | 236 | /* PWM */ |
| 253 | struct platform_device jz4740_pwm_device = { | 237 | struct platform_device jz4740_pwm_device = { |
| 254 | .name = "jz4740-pwm", | 238 | .name = "jz4740-pwm", |
diff --git a/arch/mips/jz4740/reset.c b/arch/mips/jz4740/reset.c index 67780c4b6573..5bf0cf44b55f 100644 --- a/arch/mips/jz4740/reset.c +++ b/arch/mips/jz4740/reset.c | |||
| @@ -12,18 +12,9 @@ | |||
| 12 | * | 12 | * |
| 13 | */ | 13 | */ |
| 14 | 14 | ||
| 15 | #include <linux/clk.h> | ||
| 16 | #include <linux/io.h> | ||
| 17 | #include <linux/kernel.h> | ||
| 18 | #include <linux/pm.h> | ||
| 19 | |||
| 20 | #include <asm/reboot.h> | 15 | #include <asm/reboot.h> |
| 21 | 16 | ||
| 22 | #include <asm/mach-jz4740/base.h> | ||
| 23 | #include <asm/mach-jz4740/timer.h> | ||
| 24 | |||
| 25 | #include "reset.h" | 17 | #include "reset.h" |
| 26 | #include "clock.h" | ||
| 27 | 18 | ||
| 28 | static void jz4740_halt(void) | 19 | static void jz4740_halt(void) |
| 29 | { | 20 | { |
| @@ -36,29 +27,7 @@ static void jz4740_halt(void) | |||
| 36 | } | 27 | } |
| 37 | } | 28 | } |
| 38 | 29 | ||
| 39 | #define JZ_REG_WDT_DATA 0x00 | ||
| 40 | #define JZ_REG_WDT_COUNTER_ENABLE 0x04 | ||
| 41 | #define JZ_REG_WDT_COUNTER 0x08 | ||
| 42 | #define JZ_REG_WDT_CTRL 0x0c | ||
| 43 | |||
| 44 | static void jz4740_restart(char *command) | ||
| 45 | { | ||
| 46 | void __iomem *wdt_base = ioremap(JZ4740_WDT_BASE_ADDR, 0x0f); | ||
| 47 | |||
| 48 | jz4740_timer_enable_watchdog(); | ||
| 49 | |||
| 50 | writeb(0, wdt_base + JZ_REG_WDT_COUNTER_ENABLE); | ||
| 51 | |||
| 52 | writew(0, wdt_base + JZ_REG_WDT_COUNTER); | ||
| 53 | writew(0, wdt_base + JZ_REG_WDT_DATA); | ||
| 54 | writew(BIT(2), wdt_base + JZ_REG_WDT_CTRL); | ||
| 55 | |||
| 56 | writeb(1, wdt_base + JZ_REG_WDT_COUNTER_ENABLE); | ||
| 57 | jz4740_halt(); | ||
| 58 | } | ||
| 59 | |||
| 60 | void jz4740_reset_init(void) | 30 | void jz4740_reset_init(void) |
| 61 | { | 31 | { |
| 62 | _machine_restart = jz4740_restart; | ||
| 63 | _machine_halt = jz4740_halt; | 32 | _machine_halt = jz4740_halt; |
| 64 | } | 33 | } |
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 6b07b739f914..b2509c19cfb5 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c | |||
| @@ -414,6 +414,14 @@ static int __init ftlb_disable(char *s) | |||
| 414 | 414 | ||
| 415 | __setup("noftlb", ftlb_disable); | 415 | __setup("noftlb", ftlb_disable); |
| 416 | 416 | ||
| 417 | /* | ||
| 418 | * Check if the CPU has per tc perf counters | ||
| 419 | */ | ||
| 420 | static inline void cpu_set_mt_per_tc_perf(struct cpuinfo_mips *c) | ||
| 421 | { | ||
| 422 | if (read_c0_config7() & MTI_CONF7_PTC) | ||
| 423 | c->options |= MIPS_CPU_MT_PER_TC_PERF_COUNTERS; | ||
| 424 | } | ||
| 417 | 425 | ||
| 418 | static inline void check_errata(void) | 426 | static inline void check_errata(void) |
| 419 | { | 427 | { |
| @@ -1572,6 +1580,7 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu) | |||
| 1572 | c->cputype = CPU_34K; | 1580 | c->cputype = CPU_34K; |
| 1573 | c->writecombine = _CACHE_UNCACHED; | 1581 | c->writecombine = _CACHE_UNCACHED; |
| 1574 | __cpu_name[cpu] = "MIPS 34Kc"; | 1582 | __cpu_name[cpu] = "MIPS 34Kc"; |
| 1583 | cpu_set_mt_per_tc_perf(c); | ||
| 1575 | break; | 1584 | break; |
| 1576 | case PRID_IMP_74K: | 1585 | case PRID_IMP_74K: |
| 1577 | c->cputype = CPU_74K; | 1586 | c->cputype = CPU_74K; |
| @@ -1592,6 +1601,7 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu) | |||
| 1592 | c->cputype = CPU_1004K; | 1601 | c->cputype = CPU_1004K; |
| 1593 | c->writecombine = _CACHE_UNCACHED; | 1602 | c->writecombine = _CACHE_UNCACHED; |
| 1594 | __cpu_name[cpu] = "MIPS 1004Kc"; | 1603 | __cpu_name[cpu] = "MIPS 1004Kc"; |
| 1604 | cpu_set_mt_per_tc_perf(c); | ||
| 1595 | break; | 1605 | break; |
| 1596 | case PRID_IMP_1074K: | 1606 | case PRID_IMP_1074K: |
| 1597 | c->cputype = CPU_1074K; | 1607 | c->cputype = CPU_1074K; |
| @@ -1601,10 +1611,12 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu) | |||
| 1601 | case PRID_IMP_INTERAPTIV_UP: | 1611 | case PRID_IMP_INTERAPTIV_UP: |
| 1602 | c->cputype = CPU_INTERAPTIV; | 1612 | c->cputype = CPU_INTERAPTIV; |
| 1603 | __cpu_name[cpu] = "MIPS interAptiv"; | 1613 | __cpu_name[cpu] = "MIPS interAptiv"; |
| 1614 | cpu_set_mt_per_tc_perf(c); | ||
| 1604 | break; | 1615 | break; |
| 1605 | case PRID_IMP_INTERAPTIV_MP: | 1616 | case PRID_IMP_INTERAPTIV_MP: |
| 1606 | c->cputype = CPU_INTERAPTIV; | 1617 | c->cputype = CPU_INTERAPTIV; |
| 1607 | __cpu_name[cpu] = "MIPS interAptiv (multi)"; | 1618 | __cpu_name[cpu] = "MIPS interAptiv (multi)"; |
| 1619 | cpu_set_mt_per_tc_perf(c); | ||
| 1608 | break; | 1620 | break; |
| 1609 | case PRID_IMP_PROAPTIV_UP: | 1621 | case PRID_IMP_PROAPTIV_UP: |
| 1610 | c->cputype = CPU_PROAPTIV; | 1622 | c->cputype = CPU_PROAPTIV; |
diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c index ee73550f0b9a..413863508f6f 100644 --- a/arch/mips/kernel/perf_event_mipsxx.c +++ b/arch/mips/kernel/perf_event_mipsxx.c | |||
| @@ -129,20 +129,14 @@ static struct mips_pmu mipspmu; | |||
| 129 | 129 | ||
| 130 | 130 | ||
| 131 | #ifdef CONFIG_MIPS_PERF_SHARED_TC_COUNTERS | 131 | #ifdef CONFIG_MIPS_PERF_SHARED_TC_COUNTERS |
| 132 | static int cpu_has_mipsmt_pertccounters; | ||
| 133 | |||
| 134 | static DEFINE_RWLOCK(pmuint_rwlock); | 132 | static DEFINE_RWLOCK(pmuint_rwlock); |
| 135 | 133 | ||
| 136 | #if defined(CONFIG_CPU_BMIPS5000) | 134 | #if defined(CONFIG_CPU_BMIPS5000) |
| 137 | #define vpe_id() (cpu_has_mipsmt_pertccounters ? \ | 135 | #define vpe_id() (cpu_has_mipsmt_pertccounters ? \ |
| 138 | 0 : (smp_processor_id() & MIPS_CPUID_TO_COUNTER_MASK)) | 136 | 0 : (smp_processor_id() & MIPS_CPUID_TO_COUNTER_MASK)) |
| 139 | #else | 137 | #else |
| 140 | /* | ||
| 141 | * FIXME: For VSMP, vpe_id() is redefined for Perf-events, because | ||
| 142 | * cpu_data[cpuid].vpe_id reports 0 for _both_ CPUs. | ||
| 143 | */ | ||
| 144 | #define vpe_id() (cpu_has_mipsmt_pertccounters ? \ | 138 | #define vpe_id() (cpu_has_mipsmt_pertccounters ? \ |
| 145 | 0 : smp_processor_id()) | 139 | 0 : cpu_vpe_id(¤t_cpu_data)) |
| 146 | #endif | 140 | #endif |
| 147 | 141 | ||
| 148 | /* Copied from op_model_mipsxx.c */ | 142 | /* Copied from op_model_mipsxx.c */ |
| @@ -329,7 +323,11 @@ static int mipsxx_pmu_alloc_counter(struct cpu_hw_events *cpuc, | |||
| 329 | 323 | ||
| 330 | static void mipsxx_pmu_enable_event(struct hw_perf_event *evt, int idx) | 324 | static void mipsxx_pmu_enable_event(struct hw_perf_event *evt, int idx) |
| 331 | { | 325 | { |
| 326 | struct perf_event *event = container_of(evt, struct perf_event, hw); | ||
| 332 | struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); | 327 | struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); |
| 328 | #ifdef CONFIG_MIPS_MT_SMP | ||
| 329 | unsigned int range = evt->event_base >> 24; | ||
| 330 | #endif /* CONFIG_MIPS_MT_SMP */ | ||
| 333 | 331 | ||
| 334 | WARN_ON(idx < 0 || idx >= mipspmu.num_counters); | 332 | WARN_ON(idx < 0 || idx >= mipspmu.num_counters); |
| 335 | 333 | ||
| @@ -337,11 +335,37 @@ static void mipsxx_pmu_enable_event(struct hw_perf_event *evt, int idx) | |||
| 337 | (evt->config_base & M_PERFCTL_CONFIG_MASK) | | 335 | (evt->config_base & M_PERFCTL_CONFIG_MASK) | |
| 338 | /* Make sure interrupt enabled. */ | 336 | /* Make sure interrupt enabled. */ |
| 339 | MIPS_PERFCTRL_IE; | 337 | MIPS_PERFCTRL_IE; |
| 340 | if (IS_ENABLED(CONFIG_CPU_BMIPS5000)) | 338 | |
| 339 | #ifdef CONFIG_CPU_BMIPS5000 | ||
| 340 | { | ||
| 341 | /* enable the counter for the calling thread */ | 341 | /* enable the counter for the calling thread */ |
| 342 | cpuc->saved_ctrl[idx] |= | 342 | cpuc->saved_ctrl[idx] |= |
| 343 | (1 << (12 + vpe_id())) | BRCM_PERFCTRL_TC; | 343 | (1 << (12 + vpe_id())) | BRCM_PERFCTRL_TC; |
| 344 | } | ||
| 345 | #else | ||
| 346 | #ifdef CONFIG_MIPS_MT_SMP | ||
| 347 | if (range > V) { | ||
| 348 | /* The counter is processor wide. Set it up to count all TCs. */ | ||
| 349 | pr_debug("Enabling perf counter for all TCs\n"); | ||
| 350 | cpuc->saved_ctrl[idx] |= M_TC_EN_ALL; | ||
| 351 | } else | ||
| 352 | #endif /* CONFIG_MIPS_MT_SMP */ | ||
| 353 | { | ||
| 354 | unsigned int cpu, ctrl; | ||
| 355 | |||
| 356 | /* | ||
| 357 | * Set up the counter for a particular CPU when event->cpu is | ||
| 358 | * a valid CPU number. Otherwise set up the counter for the CPU | ||
| 359 | * scheduling this thread. | ||
| 360 | */ | ||
| 361 | cpu = (event->cpu >= 0) ? event->cpu : smp_processor_id(); | ||
| 344 | 362 | ||
| 363 | ctrl = M_PERFCTL_VPEID(cpu_vpe_id(&cpu_data[cpu])); | ||
| 364 | ctrl |= M_TC_EN_VPE; | ||
| 365 | cpuc->saved_ctrl[idx] |= ctrl; | ||
| 366 | pr_debug("Enabling perf counter for CPU%d\n", cpu); | ||
| 367 | } | ||
| 368 | #endif /* CONFIG_CPU_BMIPS5000 */ | ||
| 345 | /* | 369 | /* |
| 346 | * We do not actually let the counter run. Leave it until start(). | 370 | * We do not actually let the counter run. Leave it until start(). |
| 347 | */ | 371 | */ |
| @@ -655,13 +679,14 @@ static unsigned int mipspmu_perf_event_encode(const struct mips_perf_event *pev) | |||
| 655 | * event_id. | 679 | * event_id. |
| 656 | */ | 680 | */ |
| 657 | #ifdef CONFIG_MIPS_MT_SMP | 681 | #ifdef CONFIG_MIPS_MT_SMP |
| 658 | return ((unsigned int)pev->range << 24) | | 682 | if (num_possible_cpus() > 1) |
| 659 | (pev->cntr_mask & 0xffff00) | | 683 | return ((unsigned int)pev->range << 24) | |
| 660 | (pev->event_id & 0xff); | 684 | (pev->cntr_mask & 0xffff00) | |
| 661 | #else | 685 | (pev->event_id & 0xff); |
| 662 | return (pev->cntr_mask & 0xffff00) | | 686 | else |
| 663 | (pev->event_id & 0xff); | 687 | #endif /* CONFIG_MIPS_MT_SMP */ |
| 664 | #endif | 688 | return ((pev->cntr_mask & 0xffff00) | |
| 689 | (pev->event_id & 0xff)); | ||
| 665 | } | 690 | } |
| 666 | 691 | ||
| 667 | static const struct mips_perf_event *mipspmu_map_general_event(int idx) | 692 | static const struct mips_perf_event *mipspmu_map_general_event(int idx) |
| @@ -1265,37 +1290,6 @@ static const struct mips_perf_event xlp_cache_map | |||
| 1265 | }, | 1290 | }, |
| 1266 | }; | 1291 | }; |
| 1267 | 1292 | ||
| 1268 | #ifdef CONFIG_MIPS_MT_SMP | ||
| 1269 | static void check_and_calc_range(struct perf_event *event, | ||
| 1270 | const struct mips_perf_event *pev) | ||
| 1271 | { | ||
| 1272 | struct hw_perf_event *hwc = &event->hw; | ||
| 1273 | |||
| 1274 | if (event->cpu >= 0) { | ||
| 1275 | if (pev->range > V) { | ||
| 1276 | /* | ||
| 1277 | * The user selected an event that is processor | ||
| 1278 | * wide, while expecting it to be VPE wide. | ||
| 1279 | */ | ||
| 1280 | hwc->config_base |= M_TC_EN_ALL; | ||
| 1281 | } else { | ||
| 1282 | /* | ||
| 1283 | * FIXME: cpu_data[event->cpu].vpe_id reports 0 | ||
| 1284 | * for both CPUs. | ||
| 1285 | */ | ||
| 1286 | hwc->config_base |= M_PERFCTL_VPEID(event->cpu); | ||
| 1287 | hwc->config_base |= M_TC_EN_VPE; | ||
| 1288 | } | ||
| 1289 | } else | ||
| 1290 | hwc->config_base |= M_TC_EN_ALL; | ||
| 1291 | } | ||
| 1292 | #else | ||
| 1293 | static void check_and_calc_range(struct perf_event *event, | ||
| 1294 | const struct mips_perf_event *pev) | ||
| 1295 | { | ||
| 1296 | } | ||
| 1297 | #endif | ||
| 1298 | |||
| 1299 | static int __hw_perf_event_init(struct perf_event *event) | 1293 | static int __hw_perf_event_init(struct perf_event *event) |
| 1300 | { | 1294 | { |
| 1301 | struct perf_event_attr *attr = &event->attr; | 1295 | struct perf_event_attr *attr = &event->attr; |
| @@ -1331,10 +1325,6 @@ static int __hw_perf_event_init(struct perf_event *event) | |||
| 1331 | */ | 1325 | */ |
| 1332 | hwc->config_base = MIPS_PERFCTRL_IE; | 1326 | hwc->config_base = MIPS_PERFCTRL_IE; |
| 1333 | 1327 | ||
| 1334 | /* Calculate range bits and validate it. */ | ||
| 1335 | if (num_possible_cpus() > 1) | ||
| 1336 | check_and_calc_range(event, pev); | ||
| 1337 | |||
| 1338 | hwc->event_base = mipspmu_perf_event_encode(pev); | 1328 | hwc->event_base = mipspmu_perf_event_encode(pev); |
| 1339 | if (PERF_TYPE_RAW == event->attr.type) | 1329 | if (PERF_TYPE_RAW == event->attr.type) |
| 1340 | mutex_unlock(&raw_event_mutex); | 1330 | mutex_unlock(&raw_event_mutex); |
| @@ -1723,7 +1713,6 @@ init_hw_perf_events(void) | |||
| 1723 | } | 1713 | } |
| 1724 | 1714 | ||
| 1725 | #ifdef CONFIG_MIPS_PERF_SHARED_TC_COUNTERS | 1715 | #ifdef CONFIG_MIPS_PERF_SHARED_TC_COUNTERS |
| 1726 | cpu_has_mipsmt_pertccounters = read_c0_config7() & (1<<19); | ||
| 1727 | if (!cpu_has_mipsmt_pertccounters) | 1716 | if (!cpu_has_mipsmt_pertccounters) |
| 1728 | counters = counters_total_to_per_cpu(counters); | 1717 | counters = counters_total_to_per_cpu(counters); |
| 1729 | #endif | 1718 | #endif |
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c index 0c0c23c9c9f5..9f6c3f2aa2e2 100644 --- a/arch/mips/kernel/ptrace.c +++ b/arch/mips/kernel/ptrace.c | |||
| @@ -811,7 +811,7 @@ long arch_ptrace(struct task_struct *child, long request, | |||
| 811 | /* | 811 | /* |
| 812 | * The odd registers are actually the high | 812 | * The odd registers are actually the high |
| 813 | * order bits of the values stored in the even | 813 | * order bits of the values stored in the even |
| 814 | * registers - unless we're using r2k_switch.S. | 814 | * registers. |
| 815 | */ | 815 | */ |
| 816 | tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE], | 816 | tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE], |
| 817 | addr & 1); | 817 | addr & 1); |
| @@ -906,7 +906,7 @@ long arch_ptrace(struct task_struct *child, long request, | |||
| 906 | /* | 906 | /* |
| 907 | * The odd registers are actually the high | 907 | * The odd registers are actually the high |
| 908 | * order bits of the values stored in the even | 908 | * order bits of the values stored in the even |
| 909 | * registers - unless we're using r2k_switch.S. | 909 | * registers. |
| 910 | */ | 910 | */ |
| 911 | set_fpr32(&fregs[(addr & ~1) - FPR_BASE], | 911 | set_fpr32(&fregs[(addr & ~1) - FPR_BASE], |
| 912 | addr & 1, data); | 912 | addr & 1, data); |
diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c index f30c381d3e1c..7edc629304c8 100644 --- a/arch/mips/kernel/ptrace32.c +++ b/arch/mips/kernel/ptrace32.c | |||
| @@ -103,7 +103,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, | |||
| 103 | /* | 103 | /* |
| 104 | * The odd registers are actually the high | 104 | * The odd registers are actually the high |
| 105 | * order bits of the values stored in the even | 105 | * order bits of the values stored in the even |
| 106 | * registers - unless we're using r2k_switch.S. | 106 | * registers. |
| 107 | */ | 107 | */ |
| 108 | tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE], | 108 | tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE], |
| 109 | addr & 1); | 109 | addr & 1); |
| @@ -216,7 +216,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, | |||
| 216 | /* | 216 | /* |
| 217 | * The odd registers are actually the high | 217 | * The odd registers are actually the high |
| 218 | * order bits of the values stored in the even | 218 | * order bits of the values stored in the even |
| 219 | * registers - unless we're using r2k_switch.S. | 219 | * registers. |
| 220 | */ | 220 | */ |
| 221 | set_fpr32(&fregs[(addr & ~1) - FPR_BASE], | 221 | set_fpr32(&fregs[(addr & ~1) - FPR_BASE], |
| 222 | addr & 1, data); | 222 | addr & 1, data); |
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c index a6ebc8135112..bfe02ded25d1 100644 --- a/arch/mips/kernel/time.c +++ b/arch/mips/kernel/time.c | |||
| @@ -34,21 +34,6 @@ | |||
| 34 | DEFINE_SPINLOCK(rtc_lock); | 34 | DEFINE_SPINLOCK(rtc_lock); |
| 35 | EXPORT_SYMBOL(rtc_lock); | 35 | EXPORT_SYMBOL(rtc_lock); |
| 36 | 36 | ||
| 37 | int __weak rtc_mips_set_time(unsigned long sec) | ||
| 38 | { | ||
| 39 | return -ENODEV; | ||
| 40 | } | ||
| 41 | |||
| 42 | int __weak rtc_mips_set_mmss(unsigned long nowtime) | ||
| 43 | { | ||
| 44 | return rtc_mips_set_time(nowtime); | ||
| 45 | } | ||
| 46 | |||
| 47 | int update_persistent_clock(struct timespec now) | ||
| 48 | { | ||
| 49 | return rtc_mips_set_mmss(now.tv_sec); | ||
| 50 | } | ||
| 51 | |||
| 52 | static int null_perf_irq(void) | 37 | static int null_perf_irq(void) |
| 53 | { | 38 | { |
| 54 | return 0; | 39 | return 0; |
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c index 544ea21bfef9..0bef238d2c0c 100644 --- a/arch/mips/kernel/vpe.c +++ b/arch/mips/kernel/vpe.c | |||
| @@ -872,7 +872,7 @@ static ssize_t vpe_write(struct file *file, const char __user *buffer, | |||
| 872 | return -ENODEV; | 872 | return -ENODEV; |
| 873 | 873 | ||
| 874 | if ((count + v->len) > v->plen) { | 874 | if ((count + v->len) > v->plen) { |
| 875 | pr_warn("VPE loader: elf size too big. Perhaps strip uneeded symbols\n"); | 875 | pr_warn("VPE loader: elf size too big. Perhaps strip unneeded symbols\n"); |
| 876 | return -ENOMEM; | 876 | return -ENOMEM; |
| 877 | } | 877 | } |
| 878 | 878 | ||
diff --git a/arch/mips/lasat/ds1603.c b/arch/mips/lasat/ds1603.c index 8bd5cf820eed..e6ce39fefa78 100644 --- a/arch/mips/lasat/ds1603.c +++ b/arch/mips/lasat/ds1603.c | |||
| @@ -136,7 +136,7 @@ static void rtc_end_op(void) | |||
| 136 | lasat_ndelay(1000); | 136 | lasat_ndelay(1000); |
| 137 | } | 137 | } |
| 138 | 138 | ||
| 139 | void read_persistent_clock(struct timespec *ts) | 139 | void read_persistent_clock64(struct timespec64 *ts) |
| 140 | { | 140 | { |
| 141 | unsigned long word; | 141 | unsigned long word; |
| 142 | unsigned long flags; | 142 | unsigned long flags; |
| @@ -152,14 +152,19 @@ void read_persistent_clock(struct timespec *ts) | |||
| 152 | ts->tv_nsec = 0; | 152 | ts->tv_nsec = 0; |
| 153 | } | 153 | } |
| 154 | 154 | ||
| 155 | int rtc_mips_set_mmss(unsigned long time) | 155 | int update_persistent_clock64(struct timespec64 now) |
| 156 | { | 156 | { |
| 157 | time64_t time = now.tv_sec; | ||
| 157 | unsigned long flags; | 158 | unsigned long flags; |
| 158 | 159 | ||
| 159 | spin_lock_irqsave(&rtc_lock, flags); | 160 | spin_lock_irqsave(&rtc_lock, flags); |
| 160 | rtc_init_op(); | 161 | rtc_init_op(); |
| 161 | rtc_write_byte(SET_TIME_CMD); | 162 | rtc_write_byte(SET_TIME_CMD); |
| 162 | rtc_write_word(time); | 163 | /* |
| 164 | * Due to the hardware limitation, we cast to 'unsigned long' type, | ||
| 165 | * so it will overflow in year 2106 on 32-bit machine. | ||
| 166 | */ | ||
| 167 | rtc_write_word((unsigned long)time); | ||
| 163 | rtc_end_op(); | 168 | rtc_end_op(); |
| 164 | spin_unlock_irqrestore(&rtc_lock, flags); | 169 | spin_unlock_irqrestore(&rtc_lock, flags); |
| 165 | 170 | ||
diff --git a/arch/mips/lasat/sysctl.c b/arch/mips/lasat/sysctl.c index 6f7422400f32..ead07c243c6a 100644 --- a/arch/mips/lasat/sysctl.c +++ b/arch/mips/lasat/sysctl.c | |||
| @@ -73,8 +73,16 @@ int proc_dolasatrtc(struct ctl_table *table, int write, | |||
| 73 | if (r) | 73 | if (r) |
| 74 | return r; | 74 | return r; |
| 75 | 75 | ||
| 76 | if (write) | 76 | if (write) { |
| 77 | rtc_mips_set_mmss(rtctmp); | 77 | /* |
| 78 | * Due to the RTC hardware limitation, we can not actually | ||
| 79 | * use the full 64-bit range here. | ||
| 80 | */ | ||
| 81 | ts.tv_sec = rtctmp; | ||
| 82 | ts.tv_nsec = 0; | ||
| 83 | |||
| 84 | update_persistent_clock64(ts); | ||
| 85 | } | ||
| 78 | 86 | ||
| 79 | return 0; | 87 | return 0; |
| 80 | } | 88 | } |
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile index e84e12655fa8..6537e022ef62 100644 --- a/arch/mips/lib/Makefile +++ b/arch/mips/lib/Makefile | |||
| @@ -16,5 +16,4 @@ obj-$(CONFIG_CPU_R3000) += r3k_dump_tlb.o | |||
| 16 | obj-$(CONFIG_CPU_TX39XX) += r3k_dump_tlb.o | 16 | obj-$(CONFIG_CPU_TX39XX) += r3k_dump_tlb.o |
| 17 | 17 | ||
| 18 | # libgcc-style stuff needed in the kernel | 18 | # libgcc-style stuff needed in the kernel |
| 19 | obj-y += ashldi3.o ashrdi3.o bswapsi.o bswapdi.o cmpdi2.o lshrdi3.o multi3.o \ | 19 | obj-y += bswapsi.o bswapdi.o multi3.o |
| 20 | ucmpdi2.o | ||
diff --git a/arch/mips/lib/ashldi3.c b/arch/mips/lib/ashldi3.c deleted file mode 100644 index 24cd6903e797..000000000000 --- a/arch/mips/lib/ashldi3.c +++ /dev/null | |||
| @@ -1,30 +0,0 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | ||
| 2 | #include <linux/export.h> | ||
| 3 | |||
| 4 | #include "libgcc.h" | ||
| 5 | |||
| 6 | long long notrace __ashldi3(long long u, word_type b) | ||
| 7 | { | ||
| 8 | DWunion uu, w; | ||
| 9 | word_type bm; | ||
| 10 | |||
| 11 | if (b == 0) | ||
| 12 | return u; | ||
| 13 | |||
| 14 | uu.ll = u; | ||
| 15 | bm = 32 - b; | ||
| 16 | |||
| 17 | if (bm <= 0) { | ||
| 18 | w.s.low = 0; | ||
| 19 | w.s.high = (unsigned int) uu.s.low << -bm; | ||
| 20 | } else { | ||
| 21 | const unsigned int carries = (unsigned int) uu.s.low >> bm; | ||
| 22 | |||
| 23 | w.s.low = (unsigned int) uu.s.low << b; | ||
| 24 | w.s.high = ((unsigned int) uu.s.high << b) | carries; | ||
| 25 | } | ||
| 26 | |||
| 27 | return w.ll; | ||
| 28 | } | ||
| 29 | |||
| 30 | EXPORT_SYMBOL(__ashldi3); | ||
diff --git a/arch/mips/lib/ashrdi3.c b/arch/mips/lib/ashrdi3.c deleted file mode 100644 index 23f5295af51e..000000000000 --- a/arch/mips/lib/ashrdi3.c +++ /dev/null | |||
| @@ -1,32 +0,0 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | ||
| 2 | #include <linux/export.h> | ||
| 3 | |||
| 4 | #include "libgcc.h" | ||
| 5 | |||
| 6 | long long notrace __ashrdi3(long long u, word_type b) | ||
| 7 | { | ||
| 8 | DWunion uu, w; | ||
| 9 | word_type bm; | ||
| 10 | |||
| 11 | if (b == 0) | ||
| 12 | return u; | ||
| 13 | |||
| 14 | uu.ll = u; | ||
| 15 | bm = 32 - b; | ||
| 16 | |||
| 17 | if (bm <= 0) { | ||
| 18 | /* w.s.high = 1..1 or 0..0 */ | ||
| 19 | w.s.high = | ||
| 20 | uu.s.high >> 31; | ||
| 21 | w.s.low = uu.s.high >> -bm; | ||
| 22 | } else { | ||
| 23 | const unsigned int carries = (unsigned int) uu.s.high << bm; | ||
| 24 | |||
| 25 | w.s.high = uu.s.high >> b; | ||
| 26 | w.s.low = ((unsigned int) uu.s.low >> b) | carries; | ||
| 27 | } | ||
| 28 | |||
| 29 | return w.ll; | ||
| 30 | } | ||
| 31 | |||
| 32 | EXPORT_SYMBOL(__ashrdi3); | ||
diff --git a/arch/mips/lib/cmpdi2.c b/arch/mips/lib/cmpdi2.c deleted file mode 100644 index 93cfc785927d..000000000000 --- a/arch/mips/lib/cmpdi2.c +++ /dev/null | |||
| @@ -1,28 +0,0 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | ||
| 2 | #include <linux/export.h> | ||
| 3 | |||
| 4 | #include "libgcc.h" | ||
| 5 | |||
| 6 | word_type notrace __cmpdi2(long long a, long long b) | ||
| 7 | { | ||
| 8 | const DWunion au = { | ||
| 9 | .ll = a | ||
| 10 | }; | ||
| 11 | const DWunion bu = { | ||
| 12 | .ll = b | ||
| 13 | }; | ||
| 14 | |||
| 15 | if (au.s.high < bu.s.high) | ||
| 16 | return 0; | ||
| 17 | else if (au.s.high > bu.s.high) | ||
| 18 | return 2; | ||
| 19 | |||
| 20 | if ((unsigned int) au.s.low < (unsigned int) bu.s.low) | ||
| 21 | return 0; | ||
| 22 | else if ((unsigned int) au.s.low > (unsigned int) bu.s.low) | ||
| 23 | return 2; | ||
| 24 | |||
| 25 | return 1; | ||
| 26 | } | ||
| 27 | |||
| 28 | EXPORT_SYMBOL(__cmpdi2); | ||
diff --git a/arch/mips/lib/lshrdi3.c b/arch/mips/lib/lshrdi3.c deleted file mode 100644 index 914b971aca3b..000000000000 --- a/arch/mips/lib/lshrdi3.c +++ /dev/null | |||
| @@ -1,30 +0,0 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | ||
| 2 | #include <linux/export.h> | ||
| 3 | |||
| 4 | #include "libgcc.h" | ||
| 5 | |||
| 6 | long long notrace __lshrdi3(long long u, word_type b) | ||
| 7 | { | ||
| 8 | DWunion uu, w; | ||
| 9 | word_type bm; | ||
| 10 | |||
| 11 | if (b == 0) | ||
| 12 | return u; | ||
| 13 | |||
| 14 | uu.ll = u; | ||
| 15 | bm = 32 - b; | ||
| 16 | |||
| 17 | if (bm <= 0) { | ||
| 18 | w.s.high = 0; | ||
| 19 | w.s.low = (unsigned int) uu.s.high >> -bm; | ||
| 20 | } else { | ||
| 21 | const unsigned int carries = (unsigned int) uu.s.high << bm; | ||
| 22 | |||
| 23 | w.s.high = (unsigned int) uu.s.high >> b; | ||
| 24 | w.s.low = ((unsigned int) uu.s.low >> b) | carries; | ||
| 25 | } | ||
| 26 | |||
| 27 | return w.ll; | ||
| 28 | } | ||
| 29 | |||
| 30 | EXPORT_SYMBOL(__lshrdi3); | ||
diff --git a/arch/mips/lib/memset.S b/arch/mips/lib/memset.S index f7327979a8f8..1cc306520a55 100644 --- a/arch/mips/lib/memset.S +++ b/arch/mips/lib/memset.S | |||
| @@ -95,7 +95,7 @@ | |||
| 95 | 95 | ||
| 96 | sltiu t0, a2, STORSIZE /* very small region? */ | 96 | sltiu t0, a2, STORSIZE /* very small region? */ |
| 97 | bnez t0, .Lsmall_memset\@ | 97 | bnez t0, .Lsmall_memset\@ |
| 98 | andi t0, a0, STORMASK /* aligned? */ | 98 | andi t0, a0, STORMASK /* aligned? */ |
| 99 | 99 | ||
| 100 | #ifdef CONFIG_CPU_MICROMIPS | 100 | #ifdef CONFIG_CPU_MICROMIPS |
| 101 | move t8, a1 /* used by 'swp' instruction */ | 101 | move t8, a1 /* used by 'swp' instruction */ |
| @@ -103,12 +103,12 @@ | |||
| 103 | #endif | 103 | #endif |
| 104 | #ifndef CONFIG_CPU_DADDI_WORKAROUNDS | 104 | #ifndef CONFIG_CPU_DADDI_WORKAROUNDS |
| 105 | beqz t0, 1f | 105 | beqz t0, 1f |
| 106 | PTR_SUBU t0, STORSIZE /* alignment in bytes */ | 106 | PTR_SUBU t0, STORSIZE /* alignment in bytes */ |
| 107 | #else | 107 | #else |
| 108 | .set noat | 108 | .set noat |
| 109 | li AT, STORSIZE | 109 | li AT, STORSIZE |
| 110 | beqz t0, 1f | 110 | beqz t0, 1f |
| 111 | PTR_SUBU t0, AT /* alignment in bytes */ | 111 | PTR_SUBU t0, AT /* alignment in bytes */ |
| 112 | .set at | 112 | .set at |
| 113 | #endif | 113 | #endif |
| 114 | 114 | ||
| @@ -149,7 +149,7 @@ | |||
| 149 | 1: ori t1, a2, 0x3f /* # of full blocks */ | 149 | 1: ori t1, a2, 0x3f /* # of full blocks */ |
| 150 | xori t1, 0x3f | 150 | xori t1, 0x3f |
| 151 | beqz t1, .Lmemset_partial\@ /* no block to fill */ | 151 | beqz t1, .Lmemset_partial\@ /* no block to fill */ |
| 152 | andi t0, a2, 0x40-STORSIZE | 152 | andi t0, a2, 0x40-STORSIZE |
| 153 | 153 | ||
| 154 | PTR_ADDU t1, a0 /* end address */ | 154 | PTR_ADDU t1, a0 /* end address */ |
| 155 | .set reorder | 155 | .set reorder |
| @@ -174,7 +174,7 @@ | |||
| 174 | .set at | 174 | .set at |
| 175 | #endif | 175 | #endif |
| 176 | jr t1 | 176 | jr t1 |
| 177 | PTR_ADDU a0, t0 /* dest ptr */ | 177 | PTR_ADDU a0, t0 /* dest ptr */ |
| 178 | 178 | ||
| 179 | .set push | 179 | .set push |
| 180 | .set noreorder | 180 | .set noreorder |
| @@ -186,7 +186,7 @@ | |||
| 186 | 186 | ||
| 187 | beqz a2, 1f | 187 | beqz a2, 1f |
| 188 | #ifndef CONFIG_CPU_MIPSR6 | 188 | #ifndef CONFIG_CPU_MIPSR6 |
| 189 | PTR_ADDU a0, a2 /* What's left */ | 189 | PTR_ADDU a0, a2 /* What's left */ |
| 190 | R10KCBARRIER(0(ra)) | 190 | R10KCBARRIER(0(ra)) |
| 191 | #ifdef __MIPSEB__ | 191 | #ifdef __MIPSEB__ |
| 192 | EX(LONG_S_R, a1, -1(a0), .Llast_fixup\@) | 192 | EX(LONG_S_R, a1, -1(a0), .Llast_fixup\@) |
| @@ -194,7 +194,7 @@ | |||
| 194 | EX(LONG_S_L, a1, -1(a0), .Llast_fixup\@) | 194 | EX(LONG_S_L, a1, -1(a0), .Llast_fixup\@) |
| 195 | #endif | 195 | #endif |
| 196 | #else | 196 | #else |
| 197 | PTR_SUBU t0, $0, a2 | 197 | PTR_SUBU t0, $0, a2 |
| 198 | PTR_ADDIU t0, 1 | 198 | PTR_ADDIU t0, 1 |
| 199 | STORE_BYTE(0) | 199 | STORE_BYTE(0) |
| 200 | STORE_BYTE(1) | 200 | STORE_BYTE(1) |
| @@ -210,11 +210,11 @@ | |||
| 210 | 0: | 210 | 0: |
| 211 | #endif | 211 | #endif |
| 212 | 1: jr ra | 212 | 1: jr ra |
| 213 | move a2, zero | 213 | move a2, zero |
| 214 | 214 | ||
| 215 | .Lsmall_memset\@: | 215 | .Lsmall_memset\@: |
| 216 | beqz a2, 2f | 216 | beqz a2, 2f |
| 217 | PTR_ADDU t1, a0, a2 | 217 | PTR_ADDU t1, a0, a2 |
| 218 | 218 | ||
| 219 | 1: PTR_ADDIU a0, 1 /* fill bytewise */ | 219 | 1: PTR_ADDIU a0, 1 /* fill bytewise */ |
| 220 | R10KCBARRIER(0(ra)) | 220 | R10KCBARRIER(0(ra)) |
| @@ -222,7 +222,7 @@ | |||
| 222 | EX(sb, a1, -1(a0), .Lsmall_fixup\@) | 222 | EX(sb, a1, -1(a0), .Lsmall_fixup\@) |
| 223 | 223 | ||
| 224 | 2: jr ra /* done */ | 224 | 2: jr ra /* done */ |
| 225 | move a2, zero | 225 | move a2, zero |
| 226 | .if __memset == 1 | 226 | .if __memset == 1 |
| 227 | END(memset) | 227 | END(memset) |
| 228 | .set __memset, 0 | 228 | .set __memset, 0 |
| @@ -238,7 +238,7 @@ | |||
| 238 | 238 | ||
| 239 | .Lfirst_fixup\@: | 239 | .Lfirst_fixup\@: |
| 240 | jr ra | 240 | jr ra |
| 241 | nop | 241 | nop |
| 242 | 242 | ||
| 243 | .Lfwd_fixup\@: | 243 | .Lfwd_fixup\@: |
| 244 | PTR_L t0, TI_TASK($28) | 244 | PTR_L t0, TI_TASK($28) |
| @@ -246,7 +246,7 @@ | |||
| 246 | LONG_L t0, THREAD_BUADDR(t0) | 246 | LONG_L t0, THREAD_BUADDR(t0) |
| 247 | LONG_ADDU a2, t1 | 247 | LONG_ADDU a2, t1 |
| 248 | jr ra | 248 | jr ra |
| 249 | LONG_SUBU a2, t0 | 249 | LONG_SUBU a2, t0 |
| 250 | 250 | ||
| 251 | .Lpartial_fixup\@: | 251 | .Lpartial_fixup\@: |
| 252 | PTR_L t0, TI_TASK($28) | 252 | PTR_L t0, TI_TASK($28) |
| @@ -254,7 +254,7 @@ | |||
| 254 | LONG_L t0, THREAD_BUADDR(t0) | 254 | LONG_L t0, THREAD_BUADDR(t0) |
| 255 | LONG_ADDU a2, a0 | 255 | LONG_ADDU a2, a0 |
| 256 | jr ra | 256 | jr ra |
| 257 | LONG_SUBU a2, t0 | 257 | LONG_SUBU a2, t0 |
| 258 | 258 | ||
| 259 | .Llast_fixup\@: | 259 | .Llast_fixup\@: |
| 260 | jr ra | 260 | jr ra |
| @@ -278,7 +278,7 @@ | |||
| 278 | LEAF(memset) | 278 | LEAF(memset) |
| 279 | EXPORT_SYMBOL(memset) | 279 | EXPORT_SYMBOL(memset) |
| 280 | beqz a1, 1f | 280 | beqz a1, 1f |
| 281 | move v0, a0 /* result */ | 281 | move v0, a0 /* result */ |
| 282 | 282 | ||
| 283 | andi a1, 0xff /* spread fillword */ | 283 | andi a1, 0xff /* spread fillword */ |
| 284 | LONG_SLL t1, a1, 8 | 284 | LONG_SLL t1, a1, 8 |
diff --git a/arch/mips/lib/ucmpdi2.c b/arch/mips/lib/ucmpdi2.c deleted file mode 100644 index c31c78ca4175..000000000000 --- a/arch/mips/lib/ucmpdi2.c +++ /dev/null | |||
| @@ -1,22 +0,0 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | ||
| 2 | #include <linux/export.h> | ||
| 3 | |||
| 4 | #include "libgcc.h" | ||
| 5 | |||
| 6 | word_type notrace __ucmpdi2(unsigned long long a, unsigned long long b) | ||
| 7 | { | ||
| 8 | const DWunion au = {.ll = a}; | ||
| 9 | const DWunion bu = {.ll = b}; | ||
| 10 | |||
| 11 | if ((unsigned int) au.s.high < (unsigned int) bu.s.high) | ||
| 12 | return 0; | ||
| 13 | else if ((unsigned int) au.s.high > (unsigned int) bu.s.high) | ||
| 14 | return 2; | ||
| 15 | if ((unsigned int) au.s.low < (unsigned int) bu.s.low) | ||
| 16 | return 0; | ||
| 17 | else if ((unsigned int) au.s.low > (unsigned int) bu.s.low) | ||
| 18 | return 2; | ||
| 19 | return 1; | ||
| 20 | } | ||
| 21 | |||
| 22 | EXPORT_SYMBOL(__ucmpdi2); | ||
diff --git a/arch/mips/loongson64/common/time.c b/arch/mips/loongson64/common/time.c index e1a5382ad47e..0ba53c55ff33 100644 --- a/arch/mips/loongson64/common/time.c +++ b/arch/mips/loongson64/common/time.c | |||
| @@ -29,7 +29,7 @@ void __init plat_time_init(void) | |||
| 29 | #endif | 29 | #endif |
| 30 | } | 30 | } |
| 31 | 31 | ||
| 32 | void read_persistent_clock(struct timespec *ts) | 32 | void read_persistent_clock64(struct timespec64 *ts) |
| 33 | { | 33 | { |
| 34 | ts->tv_sec = mc146818_get_cmos_time(); | 34 | ts->tv_sec = mc146818_get_cmos_time(); |
| 35 | ts->tv_nsec = 0; | 35 | ts->tv_nsec = 0; |
diff --git a/arch/mips/mm/sc-debugfs.c b/arch/mips/mm/sc-debugfs.c index 2e2132d3f5c7..2a116084216f 100644 --- a/arch/mips/mm/sc-debugfs.c +++ b/arch/mips/mm/sc-debugfs.c | |||
| @@ -31,17 +31,10 @@ static ssize_t sc_prefetch_write(struct file *file, | |||
| 31 | const char __user *user_buf, | 31 | const char __user *user_buf, |
| 32 | size_t count, loff_t *ppos) | 32 | size_t count, loff_t *ppos) |
| 33 | { | 33 | { |
| 34 | char buf[32]; | ||
| 35 | ssize_t buf_size; | ||
| 36 | bool enabled; | 34 | bool enabled; |
| 37 | int err; | 35 | int err; |
| 38 | 36 | ||
| 39 | buf_size = min(count, sizeof(buf) - 1); | 37 | err = kstrtobool_from_user(user_buf, count, &enabled); |
| 40 | if (copy_from_user(buf, user_buf, buf_size)) | ||
| 41 | return -EFAULT; | ||
| 42 | |||
| 43 | buf[buf_size] = '\0'; | ||
| 44 | err = strtobool(buf, &enabled); | ||
| 45 | if (err) | 38 | if (err) |
| 46 | return err; | 39 | return err; |
| 47 | 40 | ||
diff --git a/arch/mips/mti-malta/malta-time.c b/arch/mips/mti-malta/malta-time.c index 66c866740ff2..d22b7edc3886 100644 --- a/arch/mips/mti-malta/malta-time.c +++ b/arch/mips/mti-malta/malta-time.c | |||
| @@ -134,7 +134,7 @@ static void __init estimate_frequencies(void) | |||
| 134 | } | 134 | } |
| 135 | } | 135 | } |
| 136 | 136 | ||
| 137 | void read_persistent_clock(struct timespec *ts) | 137 | void read_persistent_clock64(struct timespec64 *ts) |
| 138 | { | 138 | { |
| 139 | ts->tv_sec = mc146818_get_cmos_time(); | 139 | ts->tv_sec = mc146818_get_cmos_time(); |
| 140 | ts->tv_nsec = 0; | 140 | ts->tv_nsec = 0; |
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c index c3e4c18ef8d4..7c04b17f4a48 100644 --- a/arch/mips/oprofile/op_model_mipsxx.c +++ b/arch/mips/oprofile/op_model_mipsxx.c | |||
| @@ -36,7 +36,6 @@ static int perfcount_irq; | |||
| 36 | #endif | 36 | #endif |
| 37 | 37 | ||
| 38 | #ifdef CONFIG_MIPS_MT_SMP | 38 | #ifdef CONFIG_MIPS_MT_SMP |
| 39 | static int cpu_has_mipsmt_pertccounters; | ||
| 40 | #define WHAT (MIPS_PERFCTRL_MT_EN_VPE | \ | 39 | #define WHAT (MIPS_PERFCTRL_MT_EN_VPE | \ |
| 41 | M_PERFCTL_VPEID(cpu_vpe_id(¤t_cpu_data))) | 40 | M_PERFCTL_VPEID(cpu_vpe_id(¤t_cpu_data))) |
| 42 | #define vpe_id() (cpu_has_mipsmt_pertccounters ? \ | 41 | #define vpe_id() (cpu_has_mipsmt_pertccounters ? \ |
| @@ -326,7 +325,6 @@ static int __init mipsxx_init(void) | |||
| 326 | } | 325 | } |
| 327 | 326 | ||
| 328 | #ifdef CONFIG_MIPS_MT_SMP | 327 | #ifdef CONFIG_MIPS_MT_SMP |
| 329 | cpu_has_mipsmt_pertccounters = read_c0_config7() & (1<<19); | ||
| 330 | if (!cpu_has_mipsmt_pertccounters) | 328 | if (!cpu_has_mipsmt_pertccounters) |
| 331 | counters = counters_total_to_per_cpu(counters); | 329 | counters = counters_total_to_per_cpu(counters); |
| 332 | #endif | 330 | #endif |
diff --git a/arch/mips/sibyte/swarm/rtc_m41t81.c b/arch/mips/sibyte/swarm/rtc_m41t81.c index e62466445f08..4ac8ccdf56bb 100644 --- a/arch/mips/sibyte/swarm/rtc_m41t81.c +++ b/arch/mips/sibyte/swarm/rtc_m41t81.c | |||
| @@ -141,13 +141,13 @@ static int m41t81_write(uint8_t addr, int b) | |||
| 141 | return 0; | 141 | return 0; |
| 142 | } | 142 | } |
| 143 | 143 | ||
| 144 | int m41t81_set_time(unsigned long t) | 144 | int m41t81_set_time(time64_t t) |
| 145 | { | 145 | { |
| 146 | struct rtc_time tm; | 146 | struct rtc_time tm; |
| 147 | unsigned long flags; | 147 | unsigned long flags; |
| 148 | 148 | ||
| 149 | /* Note we don't care about the century */ | 149 | /* Note we don't care about the century */ |
| 150 | rtc_time_to_tm(t, &tm); | 150 | rtc_time64_to_tm(t, &tm); |
| 151 | 151 | ||
| 152 | /* | 152 | /* |
| 153 | * Note the write order matters as it ensures the correctness. | 153 | * Note the write order matters as it ensures the correctness. |
| @@ -188,7 +188,7 @@ int m41t81_set_time(unsigned long t) | |||
| 188 | return 0; | 188 | return 0; |
| 189 | } | 189 | } |
| 190 | 190 | ||
| 191 | unsigned long m41t81_get_time(void) | 191 | time64_t m41t81_get_time(void) |
| 192 | { | 192 | { |
| 193 | unsigned int year, mon, day, hour, min, sec; | 193 | unsigned int year, mon, day, hour, min, sec; |
| 194 | unsigned long flags; | 194 | unsigned long flags; |
| @@ -218,7 +218,7 @@ unsigned long m41t81_get_time(void) | |||
| 218 | 218 | ||
| 219 | year += 2000; | 219 | year += 2000; |
| 220 | 220 | ||
| 221 | return mktime(year, mon, day, hour, min, sec); | 221 | return mktime64(year, mon, day, hour, min, sec); |
| 222 | } | 222 | } |
| 223 | 223 | ||
| 224 | int m41t81_probe(void) | 224 | int m41t81_probe(void) |
diff --git a/arch/mips/sibyte/swarm/rtc_xicor1241.c b/arch/mips/sibyte/swarm/rtc_xicor1241.c index 50a82c495427..2dcaaa7e3bfa 100644 --- a/arch/mips/sibyte/swarm/rtc_xicor1241.c +++ b/arch/mips/sibyte/swarm/rtc_xicor1241.c | |||
| @@ -109,13 +109,13 @@ static int xicor_write(uint8_t addr, int b) | |||
| 109 | } | 109 | } |
| 110 | } | 110 | } |
| 111 | 111 | ||
| 112 | int xicor_set_time(unsigned long t) | 112 | int xicor_set_time(time64_t t) |
| 113 | { | 113 | { |
| 114 | struct rtc_time tm; | 114 | struct rtc_time tm; |
| 115 | int tmp; | 115 | int tmp; |
| 116 | unsigned long flags; | 116 | unsigned long flags; |
| 117 | 117 | ||
| 118 | rtc_time_to_tm(t, &tm); | 118 | rtc_time64_to_tm(t, &tm); |
| 119 | tm.tm_year += 1900; | 119 | tm.tm_year += 1900; |
| 120 | 120 | ||
| 121 | spin_lock_irqsave(&rtc_lock, flags); | 121 | spin_lock_irqsave(&rtc_lock, flags); |
| @@ -168,7 +168,7 @@ int xicor_set_time(unsigned long t) | |||
| 168 | return 0; | 168 | return 0; |
| 169 | } | 169 | } |
| 170 | 170 | ||
| 171 | unsigned long xicor_get_time(void) | 171 | time64_t xicor_get_time(void) |
| 172 | { | 172 | { |
| 173 | unsigned int year, mon, day, hour, min, sec, y2k; | 173 | unsigned int year, mon, day, hour, min, sec, y2k; |
| 174 | unsigned long flags; | 174 | unsigned long flags; |
| @@ -201,7 +201,7 @@ unsigned long xicor_get_time(void) | |||
| 201 | 201 | ||
| 202 | year += (y2k * 100); | 202 | year += (y2k * 100); |
| 203 | 203 | ||
| 204 | return mktime(year, mon, day, hour, min, sec); | 204 | return mktime64(year, mon, day, hour, min, sec); |
| 205 | } | 205 | } |
| 206 | 206 | ||
| 207 | int xicor_probe(void) | 207 | int xicor_probe(void) |
diff --git a/arch/mips/sibyte/swarm/setup.c b/arch/mips/sibyte/swarm/setup.c index 494fb0a475ac..152ca71cc2d7 100644 --- a/arch/mips/sibyte/swarm/setup.c +++ b/arch/mips/sibyte/swarm/setup.c | |||
| @@ -57,12 +57,12 @@ extern void sb1250_setup(void); | |||
| 57 | #endif | 57 | #endif |
| 58 | 58 | ||
| 59 | extern int xicor_probe(void); | 59 | extern int xicor_probe(void); |
| 60 | extern int xicor_set_time(unsigned long); | 60 | extern int xicor_set_time(time64_t); |
| 61 | extern unsigned long xicor_get_time(void); | 61 | extern time64_t xicor_get_time(void); |
| 62 | 62 | ||
| 63 | extern int m41t81_probe(void); | 63 | extern int m41t81_probe(void); |
| 64 | extern int m41t81_set_time(unsigned long); | 64 | extern int m41t81_set_time(time64_t); |
| 65 | extern unsigned long m41t81_get_time(void); | 65 | extern time64_t m41t81_get_time(void); |
| 66 | 66 | ||
| 67 | const char *get_system_type(void) | 67 | const char *get_system_type(void) |
| 68 | { | 68 | { |
| @@ -87,9 +87,9 @@ enum swarm_rtc_type { | |||
| 87 | 87 | ||
| 88 | enum swarm_rtc_type swarm_rtc_type; | 88 | enum swarm_rtc_type swarm_rtc_type; |
| 89 | 89 | ||
| 90 | void read_persistent_clock(struct timespec *ts) | 90 | void read_persistent_clock64(struct timespec64 *ts) |
| 91 | { | 91 | { |
| 92 | unsigned long sec; | 92 | time64_t sec; |
| 93 | 93 | ||
| 94 | switch (swarm_rtc_type) { | 94 | switch (swarm_rtc_type) { |
| 95 | case RTC_XICOR: | 95 | case RTC_XICOR: |
| @@ -102,15 +102,17 @@ void read_persistent_clock(struct timespec *ts) | |||
| 102 | 102 | ||
| 103 | case RTC_NONE: | 103 | case RTC_NONE: |
| 104 | default: | 104 | default: |
| 105 | sec = mktime(2000, 1, 1, 0, 0, 0); | 105 | sec = mktime64(2000, 1, 1, 0, 0, 0); |
| 106 | break; | 106 | break; |
| 107 | } | 107 | } |
| 108 | ts->tv_sec = sec; | 108 | ts->tv_sec = sec; |
| 109 | ts->tv_nsec = 0; | 109 | ts->tv_nsec = 0; |
| 110 | } | 110 | } |
| 111 | 111 | ||
| 112 | int rtc_mips_set_time(unsigned long sec) | 112 | int update_persistent_clock64(struct timespec64 now) |
| 113 | { | 113 | { |
| 114 | time64_t sec = now.tv_sec; | ||
| 115 | |||
| 114 | switch (swarm_rtc_type) { | 116 | switch (swarm_rtc_type) { |
| 115 | case RTC_XICOR: | 117 | case RTC_XICOR: |
| 116 | return xicor_set_time(sec); | 118 | return xicor_set_time(sec); |
diff --git a/arch/mips/sni/time.c b/arch/mips/sni/time.c index 0eb7d1e8821b..dbace1f3e1a9 100644 --- a/arch/mips/sni/time.c +++ b/arch/mips/sni/time.c | |||
| @@ -171,9 +171,3 @@ void __init plat_time_init(void) | |||
| 171 | } | 171 | } |
| 172 | setup_pit_timer(); | 172 | setup_pit_timer(); |
| 173 | } | 173 | } |
| 174 | |||
| 175 | void read_persistent_clock(struct timespec *ts) | ||
| 176 | { | ||
| 177 | ts->tv_sec = -1; | ||
| 178 | ts->tv_nsec = 0; | ||
| 179 | } | ||
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 17f19e67993b..42e581a268e1 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig | |||
| @@ -103,9 +103,9 @@ choice | |||
| 103 | config ARCH_RV32I | 103 | config ARCH_RV32I |
| 104 | bool "RV32I" | 104 | bool "RV32I" |
| 105 | select 32BIT | 105 | select 32BIT |
| 106 | select GENERIC_ASHLDI3 | 106 | select GENERIC_LIB_ASHLDI3 |
| 107 | select GENERIC_ASHRDI3 | 107 | select GENERIC_LIB_ASHRDI3 |
| 108 | select GENERIC_LSHRDI3 | 108 | select GENERIC_LIB_LSHRDI3 |
| 109 | 109 | ||
| 110 | config ARCH_RV64I | 110 | config ARCH_RV64I |
| 111 | bool "RV64I" | 111 | bool "RV64I" |
diff --git a/drivers/firmware/broadcom/bcm47xx_nvram.c b/drivers/firmware/broadcom/bcm47xx_nvram.c index 0b631e5b5b84..d25f080fcb0d 100644 --- a/drivers/firmware/broadcom/bcm47xx_nvram.c +++ b/drivers/firmware/broadcom/bcm47xx_nvram.c | |||
| @@ -36,7 +36,7 @@ struct nvram_header { | |||
| 36 | 36 | ||
| 37 | static char nvram_buf[NVRAM_SPACE]; | 37 | static char nvram_buf[NVRAM_SPACE]; |
| 38 | static size_t nvram_len; | 38 | static size_t nvram_len; |
| 39 | static const u32 nvram_sizes[] = {0x8000, 0xF000, 0x10000}; | 39 | static const u32 nvram_sizes[] = {0x6000, 0x8000, 0xF000, 0x10000}; |
| 40 | 40 | ||
| 41 | static u32 find_nvram_size(void __iomem *end) | 41 | static u32 find_nvram_size(void __iomem *end) |
| 42 | { | 42 | { |
diff --git a/drivers/watchdog/jz4740_wdt.c b/drivers/watchdog/jz4740_wdt.c index aafbeb96561b..ec4d99a830ba 100644 --- a/drivers/watchdog/jz4740_wdt.c +++ b/drivers/watchdog/jz4740_wdt.c | |||
| @@ -124,12 +124,20 @@ static int jz4740_wdt_stop(struct watchdog_device *wdt_dev) | |||
| 124 | { | 124 | { |
| 125 | struct jz4740_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); | 125 | struct jz4740_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); |
| 126 | 126 | ||
| 127 | jz4740_timer_disable_watchdog(); | ||
| 128 | writeb(0x0, drvdata->base + JZ_REG_WDT_COUNTER_ENABLE); | 127 | writeb(0x0, drvdata->base + JZ_REG_WDT_COUNTER_ENABLE); |
| 128 | jz4740_timer_disable_watchdog(); | ||
| 129 | 129 | ||
| 130 | return 0; | 130 | return 0; |
| 131 | } | 131 | } |
| 132 | 132 | ||
| 133 | static int jz4740_wdt_restart(struct watchdog_device *wdt_dev, | ||
| 134 | unsigned long action, void *data) | ||
| 135 | { | ||
| 136 | wdt_dev->timeout = 0; | ||
| 137 | jz4740_wdt_start(wdt_dev); | ||
| 138 | return 0; | ||
| 139 | } | ||
| 140 | |||
| 133 | static const struct watchdog_info jz4740_wdt_info = { | 141 | static const struct watchdog_info jz4740_wdt_info = { |
| 134 | .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, | 142 | .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, |
| 135 | .identity = "jz4740 Watchdog", | 143 | .identity = "jz4740 Watchdog", |
| @@ -141,6 +149,7 @@ static const struct watchdog_ops jz4740_wdt_ops = { | |||
| 141 | .stop = jz4740_wdt_stop, | 149 | .stop = jz4740_wdt_stop, |
| 142 | .ping = jz4740_wdt_ping, | 150 | .ping = jz4740_wdt_ping, |
| 143 | .set_timeout = jz4740_wdt_set_timeout, | 151 | .set_timeout = jz4740_wdt_set_timeout, |
| 152 | .restart = jz4740_wdt_restart, | ||
| 144 | }; | 153 | }; |
| 145 | 154 | ||
| 146 | #ifdef CONFIG_OF | 155 | #ifdef CONFIG_OF |
| @@ -179,45 +188,26 @@ static int jz4740_wdt_probe(struct platform_device *pdev) | |||
| 179 | 188 | ||
| 180 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 189 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 181 | drvdata->base = devm_ioremap_resource(&pdev->dev, res); | 190 | drvdata->base = devm_ioremap_resource(&pdev->dev, res); |
| 182 | if (IS_ERR(drvdata->base)) { | 191 | if (IS_ERR(drvdata->base)) |
| 183 | ret = PTR_ERR(drvdata->base); | 192 | return PTR_ERR(drvdata->base); |
| 184 | goto err_out; | ||
| 185 | } | ||
| 186 | 193 | ||
| 187 | drvdata->rtc_clk = clk_get(&pdev->dev, "rtc"); | 194 | drvdata->rtc_clk = devm_clk_get(&pdev->dev, "rtc"); |
| 188 | if (IS_ERR(drvdata->rtc_clk)) { | 195 | if (IS_ERR(drvdata->rtc_clk)) { |
| 189 | dev_err(&pdev->dev, "cannot find RTC clock\n"); | 196 | dev_err(&pdev->dev, "cannot find RTC clock\n"); |
| 190 | ret = PTR_ERR(drvdata->rtc_clk); | 197 | return PTR_ERR(drvdata->rtc_clk); |
| 191 | goto err_out; | ||
| 192 | } | 198 | } |
| 193 | 199 | ||
| 194 | ret = watchdog_register_device(&drvdata->wdt); | 200 | ret = devm_watchdog_register_device(&pdev->dev, &drvdata->wdt); |
| 195 | if (ret < 0) | 201 | if (ret < 0) |
| 196 | goto err_disable_clk; | 202 | return ret; |
| 197 | 203 | ||
| 198 | platform_set_drvdata(pdev, drvdata); | 204 | platform_set_drvdata(pdev, drvdata); |
| 199 | return 0; | ||
| 200 | |||
| 201 | err_disable_clk: | ||
| 202 | clk_put(drvdata->rtc_clk); | ||
| 203 | err_out: | ||
| 204 | return ret; | ||
| 205 | } | ||
| 206 | |||
| 207 | static int jz4740_wdt_remove(struct platform_device *pdev) | ||
| 208 | { | ||
| 209 | struct jz4740_wdt_drvdata *drvdata = platform_get_drvdata(pdev); | ||
| 210 | |||
| 211 | jz4740_wdt_stop(&drvdata->wdt); | ||
| 212 | watchdog_unregister_device(&drvdata->wdt); | ||
| 213 | clk_put(drvdata->rtc_clk); | ||
| 214 | 205 | ||
| 215 | return 0; | 206 | return 0; |
| 216 | } | 207 | } |
| 217 | 208 | ||
| 218 | static struct platform_driver jz4740_wdt_driver = { | 209 | static struct platform_driver jz4740_wdt_driver = { |
| 219 | .probe = jz4740_wdt_probe, | 210 | .probe = jz4740_wdt_probe, |
| 220 | .remove = jz4740_wdt_remove, | ||
| 221 | .driver = { | 211 | .driver = { |
| 222 | .name = "jz4740-wdt", | 212 | .name = "jz4740-wdt", |
| 223 | .of_match_table = of_match_ptr(jz4740_wdt_of_matches), | 213 | .of_match_table = of_match_ptr(jz4740_wdt_of_matches), |
diff --git a/lib/Kconfig b/lib/Kconfig index abc111eb5054..809fdd155739 100644 --- a/lib/Kconfig +++ b/lib/Kconfig | |||
| @@ -642,20 +642,20 @@ config STRING_SELFTEST | |||
| 642 | 642 | ||
| 643 | endmenu | 643 | endmenu |
| 644 | 644 | ||
| 645 | config GENERIC_ASHLDI3 | 645 | config GENERIC_LIB_ASHLDI3 |
| 646 | bool | 646 | bool |
| 647 | 647 | ||
| 648 | config GENERIC_ASHRDI3 | 648 | config GENERIC_LIB_ASHRDI3 |
| 649 | bool | 649 | bool |
| 650 | 650 | ||
| 651 | config GENERIC_LSHRDI3 | 651 | config GENERIC_LIB_LSHRDI3 |
| 652 | bool | 652 | bool |
| 653 | 653 | ||
| 654 | config GENERIC_MULDI3 | 654 | config GENERIC_LIB_MULDI3 |
| 655 | bool | 655 | bool |
| 656 | 656 | ||
| 657 | config GENERIC_CMPDI2 | 657 | config GENERIC_LIB_CMPDI2 |
| 658 | bool | 658 | bool |
| 659 | 659 | ||
| 660 | config GENERIC_UCMPDI2 | 660 | config GENERIC_LIB_UCMPDI2 |
| 661 | bool | 661 | bool |
diff --git a/lib/Makefile b/lib/Makefile index 84c6dcb31fbb..956b320292fe 100644 --- a/lib/Makefile +++ b/lib/Makefile | |||
| @@ -261,9 +261,9 @@ obj-$(CONFIG_SBITMAP) += sbitmap.o | |||
| 261 | obj-$(CONFIG_PARMAN) += parman.o | 261 | obj-$(CONFIG_PARMAN) += parman.o |
| 262 | 262 | ||
| 263 | # GCC library routines | 263 | # GCC library routines |
| 264 | obj-$(CONFIG_GENERIC_ASHLDI3) += ashldi3.o | 264 | obj-$(CONFIG_GENERIC_LIB_ASHLDI3) += ashldi3.o |
| 265 | obj-$(CONFIG_GENERIC_ASHRDI3) += ashrdi3.o | 265 | obj-$(CONFIG_GENERIC_LIB_ASHRDI3) += ashrdi3.o |
| 266 | obj-$(CONFIG_GENERIC_LSHRDI3) += lshrdi3.o | 266 | obj-$(CONFIG_GENERIC_LIB_LSHRDI3) += lshrdi3.o |
| 267 | obj-$(CONFIG_GENERIC_MULDI3) += muldi3.o | 267 | obj-$(CONFIG_GENERIC_LIB_MULDI3) += muldi3.o |
| 268 | obj-$(CONFIG_GENERIC_CMPDI2) += cmpdi2.o | 268 | obj-$(CONFIG_GENERIC_LIB_CMPDI2) += cmpdi2.o |
| 269 | obj-$(CONFIG_GENERIC_UCMPDI2) += ucmpdi2.o | 269 | obj-$(CONFIG_GENERIC_LIB_UCMPDI2) += ucmpdi2.o |
diff --git a/lib/ucmpdi2.c b/lib/ucmpdi2.c index 25ca2d4c1e19..597998169a96 100644 --- a/lib/ucmpdi2.c +++ b/lib/ucmpdi2.c | |||
| @@ -17,7 +17,7 @@ | |||
| 17 | #include <linux/module.h> | 17 | #include <linux/module.h> |
| 18 | #include <linux/libgcc.h> | 18 | #include <linux/libgcc.h> |
| 19 | 19 | ||
| 20 | word_type __ucmpdi2(unsigned long long a, unsigned long long b) | 20 | word_type notrace __ucmpdi2(unsigned long long a, unsigned long long b) |
| 21 | { | 21 | { |
| 22 | const DWunion au = {.ll = a}; | 22 | const DWunion au = {.ll = a}; |
| 23 | const DWunion bu = {.ll = b}; | 23 | const DWunion bu = {.ll = b}; |
