diff options
author | Arnd Bergmann <arnd@arndb.de> | 2017-04-25 15:56:53 -0400 |
---|---|---|
committer | Liviu Dudau <Liviu.Dudau@arm.com> | 2017-04-26 12:54:58 -0400 |
commit | 763656d30b3d220a52e4b2bd1fc174a4cd6c0f43 (patch) | |
tree | ea546747872e054429aab11defc21a0987ccd898 | |
parent | c2e7f82d336a451ebb904b8bf9a5a558cf16c39b (diff) |
drm: mali-dp: use div_u64 for expensive 64-bit divisions
On 32-bit machines, we can't divide 64-bit integers:
drivers/gpu/drm/arm/malidp_crtc.o: In function `malidp_crtc_atomic_check':
malidp_crtc.c:(.text.malidp_crtc_atomic_check+0x3c0): undefined reference to `__aeabi_uldivmod'
malidp_crtc.c:(.text.malidp_crtc_atomic_check+0x3dc): undefined reference to `__aeabi_uldivmod'
This calls the div_u64 function explicitly instead.
Fixes: 4cea4e9f6690 ("drm: mali-dp: Add plane upscaling support")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r-- | drivers/gpu/drm/arm/malidp_crtc.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/gpu/drm/arm/malidp_crtc.c b/drivers/gpu/drm/arm/malidp_crtc.c index 19f1f3b34691..9446a673d469 100644 --- a/drivers/gpu/drm/arm/malidp_crtc.c +++ b/drivers/gpu/drm/arm/malidp_crtc.c | |||
@@ -266,7 +266,6 @@ static int malidp_crtc_atomic_check_scaling(struct drm_crtc *crtc, | |||
266 | 266 | ||
267 | drm_atomic_crtc_state_for_each_plane_state(plane, pstate, state) { | 267 | drm_atomic_crtc_state_for_each_plane_state(plane, pstate, state) { |
268 | struct malidp_plane *mp = to_malidp_plane(plane); | 268 | struct malidp_plane *mp = to_malidp_plane(plane); |
269 | u64 crtc_w, crtc_h; | ||
270 | u32 phase; | 269 | u32 phase; |
271 | 270 | ||
272 | if (!(mp->layer->id & scaling)) | 271 | if (!(mp->layer->id & scaling)) |
@@ -276,10 +275,10 @@ static int malidp_crtc_atomic_check_scaling(struct drm_crtc *crtc, | |||
276 | * Convert crtc_[w|h] to U32.32, then divide by U16.16 src_[w|h] | 275 | * Convert crtc_[w|h] to U32.32, then divide by U16.16 src_[w|h] |
277 | * to get the U16.16 result. | 276 | * to get the U16.16 result. |
278 | */ | 277 | */ |
279 | crtc_w = (u64)pstate->crtc_w << 32; | 278 | h_upscale_factor = div_u64((u64)pstate->crtc_w << 32, |
280 | crtc_h = (u64)pstate->crtc_h << 32; | 279 | pstate->src_w); |
281 | h_upscale_factor = (u32)(crtc_w / pstate->src_w); | 280 | v_upscale_factor = div_u64((u64)pstate->crtc_h << 32, |
282 | v_upscale_factor = (u32)(crtc_h / pstate->src_h); | 281 | pstate->src_h); |
283 | 282 | ||
284 | s->enhancer_enable = ((h_upscale_factor >> 16) >= 2 || | 283 | s->enhancer_enable = ((h_upscale_factor >> 16) >= 2 || |
285 | (v_upscale_factor >> 16) >= 2); | 284 | (v_upscale_factor >> 16) >= 2); |