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authorDaniel Lezcano <daniel.lezcano@linaro.org>2015-11-08 16:55:12 -0500
committerDaniel Lezcano <daniel.lezcano@linaro.org>2015-12-15 04:12:03 -0500
commit751605152b4dbcdf3da2643c965ec1c3b734e11d (patch)
tree0db09960ca36ce8034181f98cb37f9dda79f6e1c
parent97a23beb8db9766ed8f673479af4dcc883311504 (diff)
h8300: Rename ctlr_out/in[bwl] to raw_read/write[bwl]
For the sake of consistency, let rename all ctrl_out/in calls to the write/read calls so we have the same API consistent with the other architectures hence open the door for the increasing of the test compilation coverage. The unsigned long coercive cast is removed because all variables are set to the right type "void __iomem *". Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
-rw-r--r--arch/h8300/include/asm/io.h39
-rw-r--r--arch/h8300/kernel/setup.c8
-rw-r--r--drivers/clocksource/h8300_timer16.c28
-rw-r--r--drivers/clocksource/h8300_timer8.c34
-rw-r--r--drivers/clocksource/h8300_tpu.c28
-rw-r--r--drivers/irqchip/irq-renesas-h8300h.c8
6 files changed, 76 insertions, 69 deletions
diff --git a/arch/h8300/include/asm/io.h b/arch/h8300/include/asm/io.h
index bb837cded268..f0e14f3a800d 100644
--- a/arch/h8300/include/asm/io.h
+++ b/arch/h8300/include/asm/io.h
@@ -3,40 +3,45 @@
3 3
4#ifdef __KERNEL__ 4#ifdef __KERNEL__
5 5
6#include <asm-generic/io.h>
7
8/* H8/300 internal I/O functions */ 6/* H8/300 internal I/O functions */
9static inline unsigned char ctrl_inb(unsigned long addr) 7
8#define __raw_readb __raw_readb
9static inline u8 __raw_readb(const volatile void __iomem *addr)
10{ 10{
11 return *(volatile unsigned char *)addr; 11 return *(volatile u8 *)addr;
12} 12}
13 13
14static inline unsigned short ctrl_inw(unsigned long addr) 14#define __raw_readw __raw_readw
15static inline u16 __raw_readw(const volatile void __iomem *addr)
15{ 16{
16 return *(volatile unsigned short *)addr; 17 return *(volatile u16 *)addr;
17} 18}
18 19
19static inline unsigned long ctrl_inl(unsigned long addr) 20#define __raw_readl __raw_readl
21static inline u32 __raw_readl(const volatile void __iomem *addr)
20{ 22{
21 return *(volatile unsigned long *)addr; 23 return *(volatile u32 *)addr;
22} 24}
23 25
24static inline void ctrl_outb(unsigned char b, unsigned long addr) 26#define __raw_writeb __raw_writeb
27static inline void __raw_writeb(u8 b, const volatile void __iomem *addr)
25{ 28{
26 *(volatile unsigned char *)addr = b; 29 *(volatile u8 *)addr = b;
27} 30}
28 31
29static inline void ctrl_outw(unsigned short b, unsigned long addr) 32#define __raw_writew __raw_writew
33static inline void __raw_writew(u16 b, const volatile void __iomem *addr)
30{ 34{
31 *(volatile unsigned short *)addr = b; 35 *(volatile u16 *)addr = b;
32} 36}
33 37
34static inline void ctrl_outl(unsigned long b, unsigned long addr) 38#define __raw_writel __raw_writel
39static inline void __raw_writel(u32 b, const volatile void __iomem *addr)
35{ 40{
36 *(volatile unsigned long *)addr = b; 41 *(volatile u32 *)addr = b;
37} 42}
38 43
39static inline void ctrl_bclr(int b, unsigned char *addr) 44static inline void ctrl_bclr(int b, void __iomem *addr)
40{ 45{
41 if (__builtin_constant_p(b)) 46 if (__builtin_constant_p(b))
42 __asm__("bclr %1,%0" : "+WU"(*addr): "i"(b)); 47 __asm__("bclr %1,%0" : "+WU"(*addr): "i"(b));
@@ -44,7 +49,7 @@ static inline void ctrl_bclr(int b, unsigned char *addr)
44 __asm__("bclr %w1,%0" : "+WU"(*addr): "r"(b)); 49 __asm__("bclr %w1,%0" : "+WU"(*addr): "r"(b));
45} 50}
46 51
47static inline void ctrl_bset(int b, unsigned char *addr) 52static inline void ctrl_bset(int b, void __iomem *addr)
48{ 53{
49 if (__builtin_constant_p(b)) 54 if (__builtin_constant_p(b))
50 __asm__("bset %1,%0" : "+WU"(*addr): "i"(b)); 55 __asm__("bset %1,%0" : "+WU"(*addr): "i"(b));
@@ -52,6 +57,8 @@ static inline void ctrl_bset(int b, unsigned char *addr)
52 __asm__("bset %w1,%0" : "+WU"(*addr): "r"(b)); 57 __asm__("bset %w1,%0" : "+WU"(*addr): "r"(b));
53} 58}
54 59
60#include <asm-generic/io.h>
61
55#endif /* __KERNEL__ */ 62#endif /* __KERNEL__ */
56 63
57#endif /* _H8300_IO_H */ 64#endif /* _H8300_IO_H */
diff --git a/arch/h8300/kernel/setup.c b/arch/h8300/kernel/setup.c
index c772abe6d19c..e4985dfa91dc 100644
--- a/arch/h8300/kernel/setup.c
+++ b/arch/h8300/kernel/setup.c
@@ -207,14 +207,14 @@ device_initcall(device_probe);
207#define get_wait(base, addr) ({ \ 207#define get_wait(base, addr) ({ \
208 int baddr; \ 208 int baddr; \
209 baddr = ((addr) / 0x200000 * 2); \ 209 baddr = ((addr) / 0x200000 * 2); \
210 w *= (ctrl_inw((unsigned long)(base) + 2) & (3 << baddr)) + 1; \ 210 w *= (readw((base) + 2) & (3 << baddr)) + 1; \
211 }) 211 })
212#endif 212#endif
213#if defined(CONFIG_CPU_H8S) 213#if defined(CONFIG_CPU_H8S)
214#define get_wait(base, addr) ({ \ 214#define get_wait(base, addr) ({ \
215 int baddr; \ 215 int baddr; \
216 baddr = ((addr) / 0x200000 * 16); \ 216 baddr = ((addr) / 0x200000 * 16); \
217 w *= (ctrl_inl((unsigned long)(base) + 2) & (7 << baddr)) + 1; \ 217 w *= (readl((base) + 2) & (7 << baddr)) + 1; \
218 }) 218 })
219#endif 219#endif
220 220
@@ -228,8 +228,8 @@ static __init int access_timing(void)
228 228
229 bsc = of_find_compatible_node(NULL, NULL, "renesas,h8300-bsc"); 229 bsc = of_find_compatible_node(NULL, NULL, "renesas,h8300-bsc");
230 base = of_iomap(bsc, 0); 230 base = of_iomap(bsc, 0);
231 w = (ctrl_inb((unsigned long)base + 0) & bit)?2:1; 231 w = (readb(base + 0) & bit)?2:1;
232 if (ctrl_inb((unsigned long)base + 1) & bit) 232 if (readb(base + 1) & bit)
233 w *= get_wait(base, addr); 233 w *= get_wait(base, addr);
234 else 234 else
235 w *= 2; 235 w *= 2;
diff --git a/drivers/clocksource/h8300_timer16.c b/drivers/clocksource/h8300_timer16.c
index f39660586b1a..fc14a3f741bf 100644
--- a/drivers/clocksource/h8300_timer16.c
+++ b/drivers/clocksource/h8300_timer16.c
@@ -23,8 +23,8 @@
23struct timer16_priv { 23struct timer16_priv {
24 struct clocksource cs; 24 struct clocksource cs;
25 unsigned long total_cycles; 25 unsigned long total_cycles;
26 unsigned long mapbase; 26 void __iomem *mapbase;
27 unsigned long mapcommon; 27 void __iomem *mapcommon;
28 unsigned short cs_enabled; 28 unsigned short cs_enabled;
29 unsigned char enb; 29 unsigned char enb;
30 unsigned char imfa; 30 unsigned char imfa;
@@ -38,15 +38,15 @@ static unsigned long timer16_get_counter(struct timer16_priv *p)
38 unsigned long v1, v2, v3; 38 unsigned long v1, v2, v3;
39 int o1, o2; 39 int o1, o2;
40 40
41 o1 = ctrl_inb(p->mapcommon + TISRC) & p->ovf; 41 o1 = readb(p->mapcommon + TISRC) & p->ovf;
42 42
43 /* Make sure the timer value is stable. Stolen from acpi_pm.c */ 43 /* Make sure the timer value is stable. Stolen from acpi_pm.c */
44 do { 44 do {
45 o2 = o1; 45 o2 = o1;
46 v1 = ctrl_inw(p->mapbase + TCNT); 46 v1 = readw(p->mapbase + TCNT);
47 v2 = ctrl_inw(p->mapbase + TCNT); 47 v2 = readw(p->mapbase + TCNT);
48 v3 = ctrl_inw(p->mapbase + TCNT); 48 v3 = readw(p->mapbase + TCNT);
49 o1 = ctrl_inb(p->mapcommon + TISRC) & p->ovf; 49 o1 = readb(p->mapcommon + TISRC) & p->ovf;
50 } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3) 50 } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
51 || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2))); 51 || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
52 52
@@ -59,7 +59,7 @@ static irqreturn_t timer16_interrupt(int irq, void *dev_id)
59{ 59{
60 struct timer16_priv *p = (struct timer16_priv *)dev_id; 60 struct timer16_priv *p = (struct timer16_priv *)dev_id;
61 61
62 ctrl_outb(ctrl_inb(p->mapcommon + TISRA) & ~p->imfa, 62 writeb(readb(p->mapcommon + TISRA) & ~p->imfa,
63 p->mapcommon + TISRA); 63 p->mapcommon + TISRA);
64 p->total_cycles += 0x10000; 64 p->total_cycles += 0x10000;
65 65
@@ -89,9 +89,9 @@ static int timer16_enable(struct clocksource *cs)
89 WARN_ON(p->cs_enabled); 89 WARN_ON(p->cs_enabled);
90 90
91 p->total_cycles = 0; 91 p->total_cycles = 0;
92 ctrl_outw(0x0000, p->mapbase + TCNT); 92 writew(0x0000, p->mapbase + TCNT);
93 ctrl_outb(0x83, p->mapbase + TCR); 93 writeb(0x83, p->mapbase + TCR);
94 ctrl_outb(ctrl_inb(p->mapcommon + TSTR) | p->enb, 94 writeb(readb(p->mapcommon + TSTR) | p->enb,
95 p->mapcommon + TSTR); 95 p->mapcommon + TSTR);
96 96
97 p->cs_enabled = true; 97 p->cs_enabled = true;
@@ -104,7 +104,7 @@ static void timer16_disable(struct clocksource *cs)
104 104
105 WARN_ON(!p->cs_enabled); 105 WARN_ON(!p->cs_enabled);
106 106
107 ctrl_outb(ctrl_inb(p->mapcommon + TSTR) & ~p->enb, 107 writeb(readb(p->mapcommon + TSTR) & ~p->enb,
108 p->mapcommon + TSTR); 108 p->mapcommon + TSTR);
109 109
110 p->cs_enabled = false; 110 p->cs_enabled = false;
@@ -158,8 +158,8 @@ static void __init h8300_16timer_init(struct device_node *node)
158 158
159 of_property_read_u32(node, "renesas,channel", &ch); 159 of_property_read_u32(node, "renesas,channel", &ch);
160 160
161 timer16_priv.mapbase = (unsigned long)base[REG_CH]; 161 timer16_priv.mapbase = base[REG_CH];
162 timer16_priv.mapcommon = (unsigned long)base[REG_COMM]; 162 timer16_priv.mapcommon = base[REG_COMM];
163 timer16_priv.enb = 1 << ch; 163 timer16_priv.enb = 1 << ch;
164 timer16_priv.imfa = 1 << ch; 164 timer16_priv.imfa = 1 << ch;
165 timer16_priv.imiea = 1 << (4 + ch); 165 timer16_priv.imiea = 1 << (4 + ch);
diff --git a/drivers/clocksource/h8300_timer8.c b/drivers/clocksource/h8300_timer8.c
index 187c41619b13..aa4b2a989747 100644
--- a/drivers/clocksource/h8300_timer8.c
+++ b/drivers/clocksource/h8300_timer8.c
@@ -30,7 +30,7 @@
30 30
31struct timer8_priv { 31struct timer8_priv {
32 struct clock_event_device ced; 32 struct clock_event_device ced;
33 unsigned long mapbase; 33 void __iomem *mapbase;
34 unsigned long flags; 34 unsigned long flags;
35 unsigned int rate; 35 unsigned int rate;
36 unsigned int tcora; 36 unsigned int tcora;
@@ -41,15 +41,15 @@ static unsigned long timer8_get_counter(struct timer8_priv *p)
41 unsigned long v1, v2, v3; 41 unsigned long v1, v2, v3;
42 int o1, o2; 42 int o1, o2;
43 43
44 o1 = ctrl_inb(p->mapbase + _8TCSR) & 0x20; 44 o1 = readb(p->mapbase + _8TCSR) & 0x20;
45 45
46 /* Make sure the timer value is stable. Stolen from acpi_pm.c */ 46 /* Make sure the timer value is stable. Stolen from acpi_pm.c */
47 do { 47 do {
48 o2 = o1; 48 o2 = o1;
49 v1 = ctrl_inw(p->mapbase + _8TCNT); 49 v1 = readw(p->mapbase + _8TCNT);
50 v2 = ctrl_inw(p->mapbase + _8TCNT); 50 v2 = readw(p->mapbase + _8TCNT);
51 v3 = ctrl_inw(p->mapbase + _8TCNT); 51 v3 = readw(p->mapbase + _8TCNT);
52 o1 = ctrl_inb(p->mapbase + _8TCSR) & 0x20; 52 o1 = readb(p->mapbase + _8TCSR) & 0x20;
53 } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3) 53 } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
54 || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2))); 54 || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
55 55
@@ -61,13 +61,13 @@ static irqreturn_t timer8_interrupt(int irq, void *dev_id)
61{ 61{
62 struct timer8_priv *p = dev_id; 62 struct timer8_priv *p = dev_id;
63 63
64 ctrl_outb(ctrl_inb(p->mapbase + _8TCSR) & ~0x40, 64 writeb(readb(p->mapbase + _8TCSR) & ~0x40,
65 p->mapbase + _8TCSR); 65 p->mapbase + _8TCSR);
66 66
67 ctrl_outw(p->tcora, p->mapbase + TCORA); 67 writew(p->tcora, p->mapbase + TCORA);
68 68
69 if (clockevent_state_oneshot(&p->ced)) 69 if (clockevent_state_oneshot(&p->ced))
70 ctrl_outw(0x0000, p->mapbase + _8TCR); 70 writew(0x0000, p->mapbase + _8TCR);
71 71
72 p->ced.event_handler(&p->ced); 72 p->ced.event_handler(&p->ced);
73 73
@@ -82,18 +82,18 @@ static void timer8_set_next(struct timer8_priv *p, unsigned long delta)
82 pr_warn("delta out of range\n"); 82 pr_warn("delta out of range\n");
83 now = timer8_get_counter(p); 83 now = timer8_get_counter(p);
84 p->tcora = delta; 84 p->tcora = delta;
85 ctrl_outb(ctrl_inb(p->mapbase + _8TCR) | 0x40, p->mapbase + _8TCR); 85 writeb(readb(p->mapbase + _8TCR) | 0x40, p->mapbase + _8TCR);
86 if (delta > now) 86 if (delta > now)
87 ctrl_outw(delta, p->mapbase + TCORA); 87 writew(delta, p->mapbase + TCORA);
88 else 88 else
89 ctrl_outw(now + 1, p->mapbase + TCORA); 89 writew(now + 1, p->mapbase + TCORA);
90} 90}
91 91
92static int timer8_enable(struct timer8_priv *p) 92static int timer8_enable(struct timer8_priv *p)
93{ 93{
94 ctrl_outw(0xffff, p->mapbase + TCORA); 94 writew(0xffff, p->mapbase + TCORA);
95 ctrl_outw(0x0000, p->mapbase + _8TCNT); 95 writew(0x0000, p->mapbase + _8TCNT);
96 ctrl_outw(0x0c02, p->mapbase + _8TCR); 96 writew(0x0c02, p->mapbase + _8TCR);
97 97
98 return 0; 98 return 0;
99} 99}
@@ -114,7 +114,7 @@ static int timer8_start(struct timer8_priv *p)
114 114
115static void timer8_stop(struct timer8_priv *p) 115static void timer8_stop(struct timer8_priv *p)
116{ 116{
117 ctrl_outw(0x0000, p->mapbase + _8TCR); 117 writew(0x0000, p->mapbase + _8TCR);
118} 118}
119 119
120static inline struct timer8_priv *ced_to_priv(struct clock_event_device *ced) 120static inline struct timer8_priv *ced_to_priv(struct clock_event_device *ced)
@@ -213,7 +213,7 @@ static void __init h8300_8timer_init(struct device_node *node)
213 goto unmap_reg; 213 goto unmap_reg;
214 } 214 }
215 215
216 timer8_priv.mapbase = (unsigned long)base; 216 timer8_priv.mapbase = base;
217 217
218 rate = clk_get_rate(clk) / SCALE; 218 rate = clk_get_rate(clk) / SCALE;
219 if (!rate) { 219 if (!rate) {
diff --git a/drivers/clocksource/h8300_tpu.c b/drivers/clocksource/h8300_tpu.c
index c1eef423b2a1..91bf1992320e 100644
--- a/drivers/clocksource/h8300_tpu.c
+++ b/drivers/clocksource/h8300_tpu.c
@@ -21,8 +21,8 @@
21 21
22struct tpu_priv { 22struct tpu_priv {
23 struct clocksource cs; 23 struct clocksource cs;
24 unsigned long mapbase1; 24 void __iomem *mapbase1;
25 unsigned long mapbase2; 25 void __iomem *mapbase2;
26 raw_spinlock_t lock; 26 raw_spinlock_t lock;
27 unsigned int cs_enabled; 27 unsigned int cs_enabled;
28}; 28};
@@ -31,8 +31,8 @@ static inline unsigned long read_tcnt32(struct tpu_priv *p)
31{ 31{
32 unsigned long tcnt; 32 unsigned long tcnt;
33 33
34 tcnt = ctrl_inw(p->mapbase1 + TCNT) << 16; 34 tcnt = readw(p->mapbase1 + TCNT) << 16;
35 tcnt |= ctrl_inw(p->mapbase2 + TCNT); 35 tcnt |= readw(p->mapbase2 + TCNT);
36 return tcnt; 36 return tcnt;
37} 37}
38 38
@@ -41,7 +41,7 @@ static int tpu_get_counter(struct tpu_priv *p, unsigned long long *val)
41 unsigned long v1, v2, v3; 41 unsigned long v1, v2, v3;
42 int o1, o2; 42 int o1, o2;
43 43
44 o1 = ctrl_inb(p->mapbase1 + TSR) & 0x10; 44 o1 = readb(p->mapbase1 + TSR) & 0x10;
45 45
46 /* Make sure the timer value is stable. Stolen from acpi_pm.c */ 46 /* Make sure the timer value is stable. Stolen from acpi_pm.c */
47 do { 47 do {
@@ -49,7 +49,7 @@ static int tpu_get_counter(struct tpu_priv *p, unsigned long long *val)
49 v1 = read_tcnt32(p); 49 v1 = read_tcnt32(p);
50 v2 = read_tcnt32(p); 50 v2 = read_tcnt32(p);
51 v3 = read_tcnt32(p); 51 v3 = read_tcnt32(p);
52 o1 = ctrl_inb(p->mapbase1 + TSR) & 0x10; 52 o1 = readb(p->mapbase1 + TSR) & 0x10;
53 } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3) 53 } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
54 || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2))); 54 || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
55 55
@@ -82,10 +82,10 @@ static int tpu_clocksource_enable(struct clocksource *cs)
82 82
83 WARN_ON(p->cs_enabled); 83 WARN_ON(p->cs_enabled);
84 84
85 ctrl_outw(0, p->mapbase1 + TCNT); 85 writew(0, p->mapbase1 + TCNT);
86 ctrl_outw(0, p->mapbase2 + TCNT); 86 writew(0, p->mapbase2 + TCNT);
87 ctrl_outb(0x0f, p->mapbase1 + TCR); 87 writeb(0x0f, p->mapbase1 + TCR);
88 ctrl_outb(0x03, p->mapbase2 + TCR); 88 writeb(0x03, p->mapbase2 + TCR);
89 89
90 p->cs_enabled = true; 90 p->cs_enabled = true;
91 return 0; 91 return 0;
@@ -97,8 +97,8 @@ static void tpu_clocksource_disable(struct clocksource *cs)
97 97
98 WARN_ON(!p->cs_enabled); 98 WARN_ON(!p->cs_enabled);
99 99
100 ctrl_outb(0, p->mapbase1 + TCR); 100 writeb(0, p->mapbase1 + TCR);
101 ctrl_outb(0, p->mapbase2 + TCR); 101 writeb(0, p->mapbase2 + TCR);
102 p->cs_enabled = false; 102 p->cs_enabled = false;
103} 103}
104 104
@@ -139,8 +139,8 @@ static void __init h8300_tpu_init(struct device_node *node)
139 goto unmap_L; 139 goto unmap_L;
140 } 140 }
141 141
142 tpu_priv.mapbase1 = (unsigned long)base[CH_L]; 142 tpu_priv.mapbase1 = base[CH_L];
143 tpu_priv.mapbase2 = (unsigned long)base[CH_H]; 143 tpu_priv.mapbase2 = base[CH_H];
144 144
145 clocksource_register_hz(&tpu_priv.cs, clk_get_rate(clk) / 64); 145 clocksource_register_hz(&tpu_priv.cs, clk_get_rate(clk) / 64);
146 146
diff --git a/drivers/irqchip/irq-renesas-h8300h.c b/drivers/irqchip/irq-renesas-h8300h.c
index 6fd30d5ee14d..c378768d75b3 100644
--- a/drivers/irqchip/irq-renesas-h8300h.c
+++ b/drivers/irqchip/irq-renesas-h8300h.c
@@ -21,9 +21,9 @@ static const char ipr_bit[] = {
21 10, 10, 10, 10, 9, 9, 9, 9, 21 10, 10, 10, 10, 9, 9, 9, 9,
22}; 22};
23 23
24static void *intc_baseaddr; 24static void __iomem *intc_baseaddr;
25 25
26#define IPR ((unsigned long)intc_baseaddr + 6) 26#define IPR (intc_baseaddr + 6)
27 27
28static void h8300h_disable_irq(struct irq_data *data) 28static void h8300h_disable_irq(struct irq_data *data)
29{ 29{
@@ -81,8 +81,8 @@ static int __init h8300h_intc_of_init(struct device_node *intc,
81 BUG_ON(!intc_baseaddr); 81 BUG_ON(!intc_baseaddr);
82 82
83 /* All interrupt priority low */ 83 /* All interrupt priority low */
84 ctrl_outb(0x00, IPR + 0); 84 writeb(0x00, IPR + 0);
85 ctrl_outb(0x00, IPR + 1); 85 writeb(0x00, IPR + 1);
86 86
87 domain = irq_domain_add_linear(intc, NR_IRQS, &irq_ops, NULL); 87 domain = irq_domain_add_linear(intc, NR_IRQS, &irq_ops, NULL);
88 BUG_ON(!domain); 88 BUG_ON(!domain);