diff options
author | Madhav Chauhan <madhav.chauhan@intel.com> | 2017-06-13 03:48:14 -0400 |
---|---|---|
committer | Jani Nikula <jani.nikula@intel.com> | 2017-06-15 15:56:15 -0400 |
commit | 74e4ce6a78751f0a602dcbd00b53f710e312fcc5 (patch) | |
tree | 54f5ef364ed8a336085f4f9d85ecccc670e4da3f | |
parent | f6262bda462e81e959b80a96dac799bd9df27f73 (diff) |
drm/i915/glk: Split GLK DSI device ready functionality
This patch divides glk_dsi_device_ready() function into
two part. First part will program LP wake and MIPI DSI mode
to MIPI_CTRL reg using newly defined function glk_dsi_enable_io().
glk_dsi_enable_io() will be called from intel_dsi_pre_enable.
Second part will do remaining device ready activities using
the existing function glk_dsi_device_ready().
Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1497340095-5877-1-git-send-email-madhav.chauhan@intel.com
-rw-r--r-- | drivers/gpu/drm/i915/intel_dsi.c | 25 |
1 files changed, 18 insertions, 7 deletions
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c index 721f3f3adc1e..48a078f90cac 100644 --- a/drivers/gpu/drm/i915/intel_dsi.c +++ b/drivers/gpu/drm/i915/intel_dsi.c | |||
@@ -346,12 +346,12 @@ static bool intel_dsi_compute_config(struct intel_encoder *encoder, | |||
346 | return true; | 346 | return true; |
347 | } | 347 | } |
348 | 348 | ||
349 | static void glk_dsi_device_ready(struct intel_encoder *encoder) | 349 | static void glk_dsi_enable_io(struct intel_encoder *encoder) |
350 | { | 350 | { |
351 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); | 351 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); |
352 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); | 352 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); |
353 | enum port port; | 353 | enum port port; |
354 | u32 tmp, val; | 354 | u32 tmp; |
355 | 355 | ||
356 | /* Set the MIPI mode | 356 | /* Set the MIPI mode |
357 | * If MIPI_Mode is off, then writing to LP_Wake bit is not reflecting. | 357 | * If MIPI_Mode is off, then writing to LP_Wake bit is not reflecting. |
@@ -381,6 +381,14 @@ static void glk_dsi_device_ready(struct intel_encoder *encoder) | |||
381 | GLK_MIPIIO_PORT_POWERED, 20)) | 381 | GLK_MIPIIO_PORT_POWERED, 20)) |
382 | DRM_ERROR("MIPIO port is powergated\n"); | 382 | DRM_ERROR("MIPIO port is powergated\n"); |
383 | } | 383 | } |
384 | } | ||
385 | |||
386 | static void glk_dsi_device_ready(struct intel_encoder *encoder) | ||
387 | { | ||
388 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); | ||
389 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); | ||
390 | enum port port; | ||
391 | u32 val; | ||
384 | 392 | ||
385 | /* Wait for MIPI PHY status bit to set */ | 393 | /* Wait for MIPI PHY status bit to set */ |
386 | for_each_dsi_port(port, intel_dsi->ports) { | 394 | for_each_dsi_port(port, intel_dsi->ports) { |
@@ -391,8 +399,8 @@ static void glk_dsi_device_ready(struct intel_encoder *encoder) | |||
391 | } | 399 | } |
392 | 400 | ||
393 | /* Get IO out of reset */ | 401 | /* Get IO out of reset */ |
394 | tmp = I915_READ(MIPI_CTRL(PORT_A)); | 402 | val = I915_READ(MIPI_CTRL(PORT_A)); |
395 | I915_WRITE(MIPI_CTRL(PORT_A), tmp | GLK_MIPIIO_RESET_RELEASED); | 403 | I915_WRITE(MIPI_CTRL(PORT_A), val | GLK_MIPIIO_RESET_RELEASED); |
396 | 404 | ||
397 | /* Get IO out of Low power state*/ | 405 | /* Get IO out of Low power state*/ |
398 | for_each_dsi_port(port, intel_dsi->ports) { | 406 | for_each_dsi_port(port, intel_dsi->ports) { |
@@ -427,9 +435,9 @@ static void glk_dsi_device_ready(struct intel_encoder *encoder) | |||
427 | val |= (ULPS_STATE_NORMAL_OPERATION | DEVICE_READY); | 435 | val |= (ULPS_STATE_NORMAL_OPERATION | DEVICE_READY); |
428 | I915_WRITE(MIPI_DEVICE_READY(port), val); | 436 | I915_WRITE(MIPI_DEVICE_READY(port), val); |
429 | 437 | ||
430 | tmp = I915_READ(MIPI_CTRL(port)); | 438 | val = I915_READ(MIPI_CTRL(port)); |
431 | tmp &= ~GLK_LP_WAKE; | 439 | val &= ~GLK_LP_WAKE; |
432 | I915_WRITE(MIPI_CTRL(port), tmp); | 440 | I915_WRITE(MIPI_CTRL(port), val); |
433 | } | 441 | } |
434 | 442 | ||
435 | /* Wait for Stop state */ | 443 | /* Wait for Stop state */ |
@@ -811,6 +819,9 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder, | |||
811 | /* Deassert reset */ | 819 | /* Deassert reset */ |
812 | intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DEASSERT_RESET); | 820 | intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DEASSERT_RESET); |
813 | 821 | ||
822 | if (IS_GEMINILAKE(dev_priv)) | ||
823 | glk_dsi_enable_io(encoder); | ||
824 | |||
814 | /* Put device in ready state (LP-11) */ | 825 | /* Put device in ready state (LP-11) */ |
815 | intel_dsi_device_ready(encoder); | 826 | intel_dsi_device_ready(encoder); |
816 | 827 | ||