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authorVikas Shivappa <vikas.shivappa@linux.intel.com>2017-07-25 17:14:43 -0400
committerThomas Gleixner <tglx@linutronix.de>2017-08-01 16:41:28 -0400
commit748b6b881ccdda8f0663c68605f431279e06f49a (patch)
tree57480342052d0f96215581be325b3d42fd6a7b83
parent4be6c078428b08d1a948cc09faca8f1326231866 (diff)
x86/intel_rdt/cqm: Add sched_in support
OS associates an RMID/CLOSid to a task by writing the per CPU IA32_PQR_ASSOC MSR when a task is scheduled in. The sched_in code will stay as no-op unless we are running on Intel SKU which supports either resource control or monitoring and we also enable them by mounting the resctrl fs. The per cpu CLOSid/RMID values are cached and the write is performed only when a task with a different CLOSid/RMID is scheduled in. Signed-off-by: Vikas Shivappa <vikas.shivappa@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: ravi.v.shankar@intel.com Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com Cc: peterz@infradead.org Cc: eranian@google.com Cc: vikas.shivappa@intel.com Cc: ak@linux.intel.com Cc: davidcc@google.com Cc: reinette.chatre@intel.com Link: http://lkml.kernel.org/r/1501017287-28083-25-git-send-email-vikas.shivappa@linux.intel.com
-rw-r--r--arch/x86/include/asm/intel_rdt_sched.h50
-rw-r--r--arch/x86/kernel/cpu/intel_rdt.h4
2 files changed, 29 insertions, 25 deletions
diff --git a/arch/x86/include/asm/intel_rdt_sched.h b/arch/x86/include/asm/intel_rdt_sched.h
index 8c5be0117457..3badc0a87ef5 100644
--- a/arch/x86/include/asm/intel_rdt_sched.h
+++ b/arch/x86/include/asm/intel_rdt_sched.h
@@ -15,7 +15,8 @@
15 * 15 *
16 * The upper 32 bits of IA32_PQR_ASSOC contain closid and the 16 * The upper 32 bits of IA32_PQR_ASSOC contain closid and the
17 * lower 10 bits rmid. The update to IA32_PQR_ASSOC always 17 * lower 10 bits rmid. The update to IA32_PQR_ASSOC always
18 * contains both parts, so we need to cache them. 18 * contains both parts, so we need to cache them. This also
19 * stores the user configured per cpu CLOSID and RMID.
19 * 20 *
20 * The cache also helps to avoid pointless updates if the value does 21 * The cache also helps to avoid pointless updates if the value does
21 * not change. 22 * not change.
@@ -30,38 +31,45 @@ DECLARE_PER_CPU_READ_MOSTLY(struct intel_pqr_state, rdt_cpu_default);
30 31
31DECLARE_STATIC_KEY_FALSE(rdt_enable_key); 32DECLARE_STATIC_KEY_FALSE(rdt_enable_key);
32DECLARE_STATIC_KEY_FALSE(rdt_alloc_enable_key); 33DECLARE_STATIC_KEY_FALSE(rdt_alloc_enable_key);
34DECLARE_STATIC_KEY_FALSE(rdt_mon_enable_key);
33 35
34/* 36/*
35 * __intel_rdt_sched_in() - Writes the task's CLOSid to IA32_PQR_MSR 37 * __intel_rdt_sched_in() - Writes the task's CLOSid/RMID to IA32_PQR_MSR
36 * 38 *
37 * Following considerations are made so that this has minimal impact 39 * Following considerations are made so that this has minimal impact
38 * on scheduler hot path: 40 * on scheduler hot path:
39 * - This will stay as no-op unless we are running on an Intel SKU 41 * - This will stay as no-op unless we are running on an Intel SKU
40 * which supports resource control and we enable by mounting the 42 * which supports resource control or monitoring and we enable by
41 * resctrl file system. 43 * mounting the resctrl file system.
42 * - Caches the per cpu CLOSid values and does the MSR write only 44 * - Caches the per cpu CLOSid/RMID values and does the MSR write only
43 * when a task with a different CLOSid is scheduled in. 45 * when a task with a different CLOSid/RMID is scheduled in.
44 * 46 * - We allocate RMIDs/CLOSids globally in order to keep this as
47 * simple as possible.
45 * Must be called with preemption disabled. 48 * Must be called with preemption disabled.
46 */ 49 */
47static inline void __intel_rdt_sched_in(void) 50static void __intel_rdt_sched_in(void)
48{ 51{
52 struct intel_pqr_state newstate = this_cpu_read(rdt_cpu_default);
53 struct intel_pqr_state *curstate = this_cpu_ptr(&pqr_state);
54
55 /*
56 * If this task has a closid/rmid assigned, use it.
57 * Else use the closid/rmid assigned to this cpu.
58 */
49 if (static_branch_likely(&rdt_alloc_enable_key)) { 59 if (static_branch_likely(&rdt_alloc_enable_key)) {
50 struct intel_pqr_state *state = this_cpu_ptr(&pqr_state); 60 if (current->closid)
51 u32 closid; 61 newstate.closid = current->closid;
62 }
52 63
53 /* 64 if (static_branch_likely(&rdt_mon_enable_key)) {
54 * If this task has a closid assigned, use it. 65 if (current->rmid)
55 * Else use the closid assigned to this cpu. 66 newstate.rmid = current->rmid;
56 */ 67 }
57 closid = current->closid;
58 if (closid == 0)
59 closid = this_cpu_read(rdt_cpu_default.closid);
60 68
61 if (closid != state->closid) { 69 if (newstate.closid != curstate->closid ||
62 state->closid = closid; 70 newstate.rmid != curstate->rmid) {
63 wrmsr(IA32_PQR_ASSOC, state->rmid, closid); 71 *curstate = newstate;
64 } 72 wrmsr(IA32_PQR_ASSOC, newstate.rmid, newstate.closid);
65 } 73 }
66} 74}
67 75
diff --git a/arch/x86/kernel/cpu/intel_rdt.h b/arch/x86/kernel/cpu/intel_rdt.h
index 92a5d3072d93..7fcaa5f82bd0 100644
--- a/arch/x86/kernel/cpu/intel_rdt.h
+++ b/arch/x86/kernel/cpu/intel_rdt.h
@@ -22,8 +22,6 @@
22#define RMID_VAL_ERROR BIT_ULL(63) 22#define RMID_VAL_ERROR BIT_ULL(63)
23#define RMID_VAL_UNAVAIL BIT_ULL(62) 23#define RMID_VAL_UNAVAIL BIT_ULL(62)
24 24
25DECLARE_STATIC_KEY_FALSE(rdt_enable_key);
26
27/** 25/**
28 * struct mon_evt - Entry in the event list of a resource 26 * struct mon_evt - Entry in the event list of a resource
29 * @evtid: event id 27 * @evtid: event id
@@ -61,8 +59,6 @@ extern bool rdt_alloc_capable;
61extern bool rdt_mon_capable; 59extern bool rdt_mon_capable;
62extern unsigned int rdt_mon_features; 60extern unsigned int rdt_mon_features;
63 61
64DECLARE_STATIC_KEY_FALSE(rdt_mon_enable_key);
65
66enum rdt_group_type { 62enum rdt_group_type {
67 RDTCTRL_GROUP = 0, 63 RDTCTRL_GROUP = 0,
68 RDTMON_GROUP, 64 RDTMON_GROUP,