diff options
author | Jani Nikula <jani.nikula@intel.com> | 2015-09-03 04:16:09 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-09-04 04:14:22 -0400 |
commit | 742f491d2c204204086d2bc85cc5100daa6ff336 (patch) | |
tree | c76b97887a9dae6dec2efc52338672a09327fbe4 | |
parent | 1da7d7131c35cde83f1bab8ec732b57b69bef814 (diff) |
drm/i915: use the yesno helper for logging
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r-- | drivers/gpu/drm/i915/i915_debugfs.c | 17 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 4 |
3 files changed, 11 insertions, 14 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 4563f8b955ea..41629faaf939 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c | |||
@@ -1382,17 +1382,16 @@ static int ironlake_drpc_info(struct seq_file *m) | |||
1382 | intel_runtime_pm_put(dev_priv); | 1382 | intel_runtime_pm_put(dev_priv); |
1383 | mutex_unlock(&dev->struct_mutex); | 1383 | mutex_unlock(&dev->struct_mutex); |
1384 | 1384 | ||
1385 | seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ? | 1385 | seq_printf(m, "HD boost: %s\n", yesno(rgvmodectl & MEMMODE_BOOST_EN)); |
1386 | "yes" : "no"); | ||
1387 | seq_printf(m, "Boost freq: %d\n", | 1386 | seq_printf(m, "Boost freq: %d\n", |
1388 | (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >> | 1387 | (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >> |
1389 | MEMMODE_BOOST_FREQ_SHIFT); | 1388 | MEMMODE_BOOST_FREQ_SHIFT); |
1390 | seq_printf(m, "HW control enabled: %s\n", | 1389 | seq_printf(m, "HW control enabled: %s\n", |
1391 | rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no"); | 1390 | yesno(rgvmodectl & MEMMODE_HWIDLE_EN)); |
1392 | seq_printf(m, "SW control enabled: %s\n", | 1391 | seq_printf(m, "SW control enabled: %s\n", |
1393 | rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no"); | 1392 | yesno(rgvmodectl & MEMMODE_SWMODE_EN)); |
1394 | seq_printf(m, "Gated voltage change: %s\n", | 1393 | seq_printf(m, "Gated voltage change: %s\n", |
1395 | rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no"); | 1394 | yesno(rgvmodectl & MEMMODE_RCLK_GATE)); |
1396 | seq_printf(m, "Starting frequency: P%d\n", | 1395 | seq_printf(m, "Starting frequency: P%d\n", |
1397 | (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT); | 1396 | (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT); |
1398 | seq_printf(m, "Max P-state: P%d\n", | 1397 | seq_printf(m, "Max P-state: P%d\n", |
@@ -1401,7 +1400,7 @@ static int ironlake_drpc_info(struct seq_file *m) | |||
1401 | seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f)); | 1400 | seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f)); |
1402 | seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f)); | 1401 | seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f)); |
1403 | seq_printf(m, "Render standby enabled: %s\n", | 1402 | seq_printf(m, "Render standby enabled: %s\n", |
1404 | (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes"); | 1403 | yesno(!(rstdbyctl & RCX_SW_EXIT))); |
1405 | seq_puts(m, "Current RS state: "); | 1404 | seq_puts(m, "Current RS state: "); |
1406 | switch (rstdbyctl & RSX_STATUS_MASK) { | 1405 | switch (rstdbyctl & RSX_STATUS_MASK) { |
1407 | case RSX_STATUS_ON: | 1406 | case RSX_STATUS_ON: |
@@ -2844,8 +2843,7 @@ static void intel_dp_info(struct seq_file *m, | |||
2844 | struct intel_dp *intel_dp = enc_to_intel_dp(&intel_encoder->base); | 2843 | struct intel_dp *intel_dp = enc_to_intel_dp(&intel_encoder->base); |
2845 | 2844 | ||
2846 | seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]); | 2845 | seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]); |
2847 | seq_printf(m, "\taudio support: %s\n", intel_dp->has_audio ? "yes" : | 2846 | seq_printf(m, "\taudio support: %s\n", yesno(intel_dp->has_audio)); |
2848 | "no"); | ||
2849 | if (intel_encoder->type == INTEL_OUTPUT_EDP) | 2847 | if (intel_encoder->type == INTEL_OUTPUT_EDP) |
2850 | intel_panel_info(m, &intel_connector->panel); | 2848 | intel_panel_info(m, &intel_connector->panel); |
2851 | } | 2849 | } |
@@ -2856,8 +2854,7 @@ static void intel_hdmi_info(struct seq_file *m, | |||
2856 | struct intel_encoder *intel_encoder = intel_connector->encoder; | 2854 | struct intel_encoder *intel_encoder = intel_connector->encoder; |
2857 | struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&intel_encoder->base); | 2855 | struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&intel_encoder->base); |
2858 | 2856 | ||
2859 | seq_printf(m, "\taudio support: %s\n", intel_hdmi->has_audio ? "yes" : | 2857 | seq_printf(m, "\taudio support: %s\n", yesno(intel_hdmi->has_audio)); |
2860 | "no"); | ||
2861 | } | 2858 | } |
2862 | 2859 | ||
2863 | static void intel_lvds_info(struct seq_file *m, | 2860 | static void intel_lvds_info(struct seq_file *m, |
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 44e753d5f7f5..45ab25e479ae 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
@@ -4014,8 +4014,8 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp) | |||
4014 | } | 4014 | } |
4015 | 4015 | ||
4016 | DRM_DEBUG_KMS("Display Port TPS3 support: source %s, sink %s\n", | 4016 | DRM_DEBUG_KMS("Display Port TPS3 support: source %s, sink %s\n", |
4017 | intel_dp_source_supports_hbr2(dev) ? "yes" : "no", | 4017 | yesno(intel_dp_source_supports_hbr2(dev)), |
4018 | drm_dp_tps3_supported(intel_dp->dpcd) ? "yes" : "no"); | 4018 | yesno(drm_dp_tps3_supported(intel_dp->dpcd))); |
4019 | 4019 | ||
4020 | /* Intermediate frequency support */ | 4020 | /* Intermediate frequency support */ |
4021 | if (is_edp(intel_dp) && | 4021 | if (is_edp(intel_dp) && |
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 1b90f03f7025..79cd9872bf1f 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c | |||
@@ -5550,7 +5550,7 @@ static void cherryview_enable_rps(struct drm_device *dev) | |||
5550 | /* RPS code assumes GPLL is used */ | 5550 | /* RPS code assumes GPLL is used */ |
5551 | WARN_ONCE((val & GPLLENABLE) == 0, "GPLL not enabled\n"); | 5551 | WARN_ONCE((val & GPLLENABLE) == 0, "GPLL not enabled\n"); |
5552 | 5552 | ||
5553 | DRM_DEBUG_DRIVER("GPLL enabled? %s\n", val & GPLLENABLE ? "yes" : "no"); | 5553 | DRM_DEBUG_DRIVER("GPLL enabled? %s\n", yesno(val & GPLLENABLE)); |
5554 | DRM_DEBUG_DRIVER("GPU status: 0x%08x\n", val); | 5554 | DRM_DEBUG_DRIVER("GPU status: 0x%08x\n", val); |
5555 | 5555 | ||
5556 | dev_priv->rps.cur_freq = (val >> 8) & 0xff; | 5556 | dev_priv->rps.cur_freq = (val >> 8) & 0xff; |
@@ -5640,7 +5640,7 @@ static void valleyview_enable_rps(struct drm_device *dev) | |||
5640 | /* RPS code assumes GPLL is used */ | 5640 | /* RPS code assumes GPLL is used */ |
5641 | WARN_ONCE((val & GPLLENABLE) == 0, "GPLL not enabled\n"); | 5641 | WARN_ONCE((val & GPLLENABLE) == 0, "GPLL not enabled\n"); |
5642 | 5642 | ||
5643 | DRM_DEBUG_DRIVER("GPLL enabled? %s\n", val & GPLLENABLE ? "yes" : "no"); | 5643 | DRM_DEBUG_DRIVER("GPLL enabled? %s\n", yesno(val & GPLLENABLE)); |
5644 | DRM_DEBUG_DRIVER("GPU status: 0x%08x\n", val); | 5644 | DRM_DEBUG_DRIVER("GPU status: 0x%08x\n", val); |
5645 | 5645 | ||
5646 | dev_priv->rps.cur_freq = (val >> 8) & 0xff; | 5646 | dev_priv->rps.cur_freq = (val >> 8) & 0xff; |