diff options
author | Philippe CORNU <philippe.cornu@st.com> | 2018-01-25 10:55:04 -0500 |
---|---|---|
committer | Andrzej Hajda <a.hajda@samsung.com> | 2018-04-26 02:24:26 -0400 |
commit | 741c3aeb82c78e173aa7155aaffb971e5c73ab3c (patch) | |
tree | adaa3779d56f4bbbd254836b5153f72780b72881 | |
parent | 664991010ff34ce2a51cea95dfdfb711be8c780f (diff) |
drm/bridge/synopsys: dsi: use adjusted_mode in mode_set
The "adjusted_mode" clock value (ie the real pixel clock) is more
accurate than "mode" clock value (ie the panel/bridge requested
clock value). It offers a better preciseness for timing
computations and allows to reduce the extra dsi bandwidth in
burst mode (from ~20% to ~10-12%, hw platform dependent).
Signed-off-by: Philippe Cornu <philippe.cornu@st.com>
Tested-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Yannick Fertré <yannick.fertre@st.com>
Tested-by: Yannick Fertré <yannick.fertre@st.com>
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180125155504.8611-1-philippe.cornu@st.com
-rw-r--r-- | drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c index 0c7ecf798874..fd7999642cf8 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | |||
@@ -771,20 +771,20 @@ static void dw_mipi_dsi_bridge_mode_set(struct drm_bridge *bridge, | |||
771 | 771 | ||
772 | clk_prepare_enable(dsi->pclk); | 772 | clk_prepare_enable(dsi->pclk); |
773 | 773 | ||
774 | ret = phy_ops->get_lane_mbps(priv_data, mode, dsi->mode_flags, | 774 | ret = phy_ops->get_lane_mbps(priv_data, adjusted_mode, dsi->mode_flags, |
775 | dsi->lanes, dsi->format, &dsi->lane_mbps); | 775 | dsi->lanes, dsi->format, &dsi->lane_mbps); |
776 | if (ret) | 776 | if (ret) |
777 | DRM_DEBUG_DRIVER("Phy get_lane_mbps() failed\n"); | 777 | DRM_DEBUG_DRIVER("Phy get_lane_mbps() failed\n"); |
778 | 778 | ||
779 | pm_runtime_get_sync(dsi->dev); | 779 | pm_runtime_get_sync(dsi->dev); |
780 | dw_mipi_dsi_init(dsi); | 780 | dw_mipi_dsi_init(dsi); |
781 | dw_mipi_dsi_dpi_config(dsi, mode); | 781 | dw_mipi_dsi_dpi_config(dsi, adjusted_mode); |
782 | dw_mipi_dsi_packet_handler_config(dsi); | 782 | dw_mipi_dsi_packet_handler_config(dsi); |
783 | dw_mipi_dsi_video_mode_config(dsi); | 783 | dw_mipi_dsi_video_mode_config(dsi); |
784 | dw_mipi_dsi_video_packet_config(dsi, mode); | 784 | dw_mipi_dsi_video_packet_config(dsi, adjusted_mode); |
785 | dw_mipi_dsi_command_mode_config(dsi); | 785 | dw_mipi_dsi_command_mode_config(dsi); |
786 | dw_mipi_dsi_line_timer_config(dsi, mode); | 786 | dw_mipi_dsi_line_timer_config(dsi, adjusted_mode); |
787 | dw_mipi_dsi_vertical_timing_config(dsi, mode); | 787 | dw_mipi_dsi_vertical_timing_config(dsi, adjusted_mode); |
788 | 788 | ||
789 | dw_mipi_dsi_dphy_init(dsi); | 789 | dw_mipi_dsi_dphy_init(dsi); |
790 | dw_mipi_dsi_dphy_timing_config(dsi); | 790 | dw_mipi_dsi_dphy_timing_config(dsi); |
@@ -798,7 +798,7 @@ static void dw_mipi_dsi_bridge_mode_set(struct drm_bridge *bridge, | |||
798 | 798 | ||
799 | dw_mipi_dsi_dphy_enable(dsi); | 799 | dw_mipi_dsi_dphy_enable(dsi); |
800 | 800 | ||
801 | dw_mipi_dsi_wait_for_two_frames(mode); | 801 | dw_mipi_dsi_wait_for_two_frames(adjusted_mode); |
802 | 802 | ||
803 | /* Switch to cmd mode for panel-bridge pre_enable & panel prepare */ | 803 | /* Switch to cmd mode for panel-bridge pre_enable & panel prepare */ |
804 | dw_mipi_dsi_set_mode(dsi, 0); | 804 | dw_mipi_dsi_set_mode(dsi, 0); |