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authorKamil Trzciński <ayufan@ayufan.eu>2018-01-22 12:46:22 -0500
committerHeiko Stuebner <heiko@sntech.de>2018-02-12 03:39:01 -0500
commit73e42e18669934fa96cf2bb54291da54177076d7 (patch)
tree9fda71b7be4473f202fca7876047d4c1e7daa94d
parent7928b2cbe55b2a410a0f5c1f154610059c57b1b2 (diff)
arm64: dts: rockchip: fix rock64 gmac2io stability issues
This commit enables thresh dma mode as this forces to disable checksuming, and chooses delay values which make the interface stable. These changes are needed, because ROCK64 is faced with two problems: 1. tx checksuming does not work with packets larger than 1498, 2. the default delays for tx/rx are not stable when using 1Gbps connection. Delays were found out with: https://github.com/ayufan-rock64/linux-build/tree/master/recipes/gmac-delays-test Signed-off-by: Kamil Trzciński <ayufan@ayufan.eu> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3328-rock64.dts7
1 files changed, 3 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
index 3890468678ce..28257724a56e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
@@ -132,17 +132,16 @@
132 assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; 132 assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
133 assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; 133 assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
134 clock_in_out = "input"; 134 clock_in_out = "input";
135 /* shows instability at 1GBit right now */
136 max-speed = <100>;
137 phy-supply = <&vcc_io>; 135 phy-supply = <&vcc_io>;
138 phy-mode = "rgmii"; 136 phy-mode = "rgmii";
139 pinctrl-names = "default"; 137 pinctrl-names = "default";
140 pinctrl-0 = <&rgmiim1_pins>; 138 pinctrl-0 = <&rgmiim1_pins>;
139 snps,force_thresh_dma_mode;
141 snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; 140 snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
142 snps,reset-active-low; 141 snps,reset-active-low;
143 snps,reset-delays-us = <0 10000 50000>; 142 snps,reset-delays-us = <0 10000 50000>;
144 tx_delay = <0x26>; 143 tx_delay = <0x24>;
145 rx_delay = <0x11>; 144 rx_delay = <0x18>;
146 status = "okay"; 145 status = "okay";
147}; 146};
148 147