diff options
author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-08-31 08:03:36 -0400 |
---|---|---|
committer | Stephen Boyd <sboyd@codeaurora.org> | 2017-08-31 21:34:35 -0400 |
commit | 736de651a83640c3a7597926625e48c882df8efa (patch) | |
tree | d1c8fdfca1623680a6041e874a8835bd29c05559 | |
parent | 9fa7231b1979f792b2cbc395c52e197158494948 (diff) |
clk: uniphier: add PXs3 clock data
Add basic clock data for Socionext's new SoC PXs3.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-rw-r--r-- | Documentation/devicetree/bindings/clock/uniphier-clock.txt | 3 | ||||
-rw-r--r-- | drivers/clk/uniphier/clk-uniphier-core.c | 12 | ||||
-rw-r--r-- | drivers/clk/uniphier/clk-uniphier-sys.c | 30 | ||||
-rw-r--r-- | drivers/clk/uniphier/clk-uniphier.h | 1 |
4 files changed, 46 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/uniphier-clock.txt b/Documentation/devicetree/bindings/clock/uniphier-clock.txt index 2aec32d888ac..7b5f602765fe 100644 --- a/Documentation/devicetree/bindings/clock/uniphier-clock.txt +++ b/Documentation/devicetree/bindings/clock/uniphier-clock.txt | |||
@@ -13,6 +13,7 @@ Required properties: | |||
13 | "socionext,uniphier-pxs2-clock" - for PXs2/LD6b SoC. | 13 | "socionext,uniphier-pxs2-clock" - for PXs2/LD6b SoC. |
14 | "socionext,uniphier-ld11-clock" - for LD11 SoC. | 14 | "socionext,uniphier-ld11-clock" - for LD11 SoC. |
15 | "socionext,uniphier-ld20-clock" - for LD20 SoC. | 15 | "socionext,uniphier-ld20-clock" - for LD20 SoC. |
16 | "socionext,uniphier-pxs3-clock" - for PXs3 SoC | ||
16 | - #clock-cells: should be 1. | 17 | - #clock-cells: should be 1. |
17 | 18 | ||
18 | Example: | 19 | Example: |
@@ -54,6 +55,7 @@ Required properties: | |||
54 | "socionext,uniphier-pxs2-sd-clock" - for PXs2/LD6b SoC. | 55 | "socionext,uniphier-pxs2-sd-clock" - for PXs2/LD6b SoC. |
55 | "socionext,uniphier-ld11-mio-clock" - for LD11 SoC. | 56 | "socionext,uniphier-ld11-mio-clock" - for LD11 SoC. |
56 | "socionext,uniphier-ld20-sd-clock" - for LD20 SoC. | 57 | "socionext,uniphier-ld20-sd-clock" - for LD20 SoC. |
58 | "socionext,uniphier-pxs3-sd-clock" - for PXs3 SoC | ||
57 | - #clock-cells: should be 1. | 59 | - #clock-cells: should be 1. |
58 | 60 | ||
59 | Example: | 61 | Example: |
@@ -97,6 +99,7 @@ Required properties: | |||
97 | "socionext,uniphier-pxs2-peri-clock" - for PXs2/LD6b SoC. | 99 | "socionext,uniphier-pxs2-peri-clock" - for PXs2/LD6b SoC. |
98 | "socionext,uniphier-ld11-peri-clock" - for LD11 SoC. | 100 | "socionext,uniphier-ld11-peri-clock" - for LD11 SoC. |
99 | "socionext,uniphier-ld20-peri-clock" - for LD20 SoC. | 101 | "socionext,uniphier-ld20-peri-clock" - for LD20 SoC. |
102 | "socionext,uniphier-pxs3-peri-clock" - for PXs3 SoC | ||
100 | - #clock-cells: should be 1. | 103 | - #clock-cells: should be 1. |
101 | 104 | ||
102 | Example: | 105 | Example: |
diff --git a/drivers/clk/uniphier/clk-uniphier-core.c b/drivers/clk/uniphier/clk-uniphier-core.c index cb6ae261bb36..e09f3dd46318 100644 --- a/drivers/clk/uniphier/clk-uniphier-core.c +++ b/drivers/clk/uniphier/clk-uniphier-core.c | |||
@@ -138,6 +138,10 @@ static const struct of_device_id uniphier_clk_match[] = { | |||
138 | .compatible = "socionext,uniphier-ld20-clock", | 138 | .compatible = "socionext,uniphier-ld20-clock", |
139 | .data = uniphier_ld20_sys_clk_data, | 139 | .data = uniphier_ld20_sys_clk_data, |
140 | }, | 140 | }, |
141 | { | ||
142 | .compatible = "socionext,uniphier-pxs3-clock", | ||
143 | .data = uniphier_pxs3_sys_clk_data, | ||
144 | }, | ||
141 | /* Media I/O clock, SD clock */ | 145 | /* Media I/O clock, SD clock */ |
142 | { | 146 | { |
143 | .compatible = "socionext,uniphier-ld4-mio-clock", | 147 | .compatible = "socionext,uniphier-ld4-mio-clock", |
@@ -167,6 +171,10 @@ static const struct of_device_id uniphier_clk_match[] = { | |||
167 | .compatible = "socionext,uniphier-ld20-sd-clock", | 171 | .compatible = "socionext,uniphier-ld20-sd-clock", |
168 | .data = uniphier_pro5_sd_clk_data, | 172 | .data = uniphier_pro5_sd_clk_data, |
169 | }, | 173 | }, |
174 | { | ||
175 | .compatible = "socionext,uniphier-pxs3-sd-clock", | ||
176 | .data = uniphier_pro5_sd_clk_data, | ||
177 | }, | ||
170 | /* Peripheral clock */ | 178 | /* Peripheral clock */ |
171 | { | 179 | { |
172 | .compatible = "socionext,uniphier-ld4-peri-clock", | 180 | .compatible = "socionext,uniphier-ld4-peri-clock", |
@@ -196,6 +204,10 @@ static const struct of_device_id uniphier_clk_match[] = { | |||
196 | .compatible = "socionext,uniphier-ld20-peri-clock", | 204 | .compatible = "socionext,uniphier-ld20-peri-clock", |
197 | .data = uniphier_pro4_peri_clk_data, | 205 | .data = uniphier_pro4_peri_clk_data, |
198 | }, | 206 | }, |
207 | { | ||
208 | .compatible = "socionext,uniphier-pxs3-peri-clock", | ||
209 | .data = uniphier_pro4_peri_clk_data, | ||
210 | }, | ||
199 | { /* sentinel */ } | 211 | { /* sentinel */ } |
200 | }; | 212 | }; |
201 | 213 | ||
diff --git a/drivers/clk/uniphier/clk-uniphier-sys.c b/drivers/clk/uniphier/clk-uniphier-sys.c index 01da1414ec37..44225702bb1f 100644 --- a/drivers/clk/uniphier/clk-uniphier-sys.c +++ b/drivers/clk/uniphier/clk-uniphier-sys.c | |||
@@ -205,3 +205,33 @@ const struct uniphier_clk_data uniphier_ld20_sys_clk_data[] = { | |||
205 | "spll/4", "spll/8", "s2pll/4", "s2pll/8"), | 205 | "spll/4", "spll/8", "s2pll/4", "s2pll/8"), |
206 | { /* sentinel */ } | 206 | { /* sentinel */ } |
207 | }; | 207 | }; |
208 | |||
209 | const struct uniphier_clk_data uniphier_pxs3_sys_clk_data[] = { | ||
210 | UNIPHIER_CLK_FACTOR("cpll", -1, "ref", 104, 1), /* ARM: 2600 MHz */ | ||
211 | UNIPHIER_CLK_FACTOR("spll", -1, "ref", 80, 1), /* 2000 MHz */ | ||
212 | UNIPHIER_CLK_FACTOR("s2pll", -1, "ref", 88, 1), /* IPP: 2400 MHz */ | ||
213 | UNIPHIER_CLK_FACTOR("uart", 0, "spll", 1, 34), | ||
214 | UNIPHIER_CLK_FACTOR("i2c", 1, "spll", 1, 40), | ||
215 | UNIPHIER_LD20_SYS_CLK_SD, | ||
216 | UNIPHIER_LD11_SYS_CLK_NAND(2), | ||
217 | UNIPHIER_LD11_SYS_CLK_EMMC(4), | ||
218 | UNIPHIER_CLK_GATE("usb30", 12, NULL, 0x2104, 4), /* =GIO0 */ | ||
219 | UNIPHIER_CLK_GATE("usb31-0", 13, NULL, 0x2104, 5), /* =GIO1 */ | ||
220 | UNIPHIER_CLK_GATE("usb31-1", 14, NULL, 0x2104, 6), /* =GIO1-1 */ | ||
221 | UNIPHIER_CLK_GATE("usb30-phy0", 16, NULL, 0x210c, 16), | ||
222 | UNIPHIER_CLK_GATE("usb30-phy1", 17, NULL, 0x210c, 18), | ||
223 | UNIPHIER_CLK_GATE("usb30-phy2", 18, NULL, 0x210c, 20), | ||
224 | UNIPHIER_CLK_GATE("usb31-phy0", 20, NULL, 0x210c, 17), | ||
225 | UNIPHIER_CLK_GATE("usb31-phy1", 21, NULL, 0x210c, 19), | ||
226 | /* CPU gears */ | ||
227 | UNIPHIER_CLK_DIV4("cpll", 2, 3, 4, 8), | ||
228 | UNIPHIER_CLK_DIV4("spll", 2, 3, 4, 8), | ||
229 | UNIPHIER_CLK_DIV4("s2pll", 2, 3, 4, 8), | ||
230 | UNIPHIER_CLK_CPUGEAR("cpu-ca53", 33, 0x8080, 0xf, 8, | ||
231 | "cpll/2", "spll/2", "cpll/3", "spll/3", | ||
232 | "spll/4", "spll/8", "cpll/4", "cpll/8"), | ||
233 | UNIPHIER_CLK_CPUGEAR("cpu-ipp", 34, 0x8100, 0xf, 8, | ||
234 | "s2pll/2", "spll/2", "s2pll/3", "spll/3", | ||
235 | "spll/4", "spll/8", "s2pll/4", "s2pll/8"), | ||
236 | { /* sentinel */ } | ||
237 | }; | ||
diff --git a/drivers/clk/uniphier/clk-uniphier.h b/drivers/clk/uniphier/clk-uniphier.h index 827164093172..d10a009ada96 100644 --- a/drivers/clk/uniphier/clk-uniphier.h +++ b/drivers/clk/uniphier/clk-uniphier.h | |||
@@ -154,6 +154,7 @@ extern const struct uniphier_clk_data uniphier_pro5_sys_clk_data[]; | |||
154 | extern const struct uniphier_clk_data uniphier_pxs2_sys_clk_data[]; | 154 | extern const struct uniphier_clk_data uniphier_pxs2_sys_clk_data[]; |
155 | extern const struct uniphier_clk_data uniphier_ld11_sys_clk_data[]; | 155 | extern const struct uniphier_clk_data uniphier_ld11_sys_clk_data[]; |
156 | extern const struct uniphier_clk_data uniphier_ld20_sys_clk_data[]; | 156 | extern const struct uniphier_clk_data uniphier_ld20_sys_clk_data[]; |
157 | extern const struct uniphier_clk_data uniphier_pxs3_sys_clk_data[]; | ||
157 | extern const struct uniphier_clk_data uniphier_ld4_mio_clk_data[]; | 158 | extern const struct uniphier_clk_data uniphier_ld4_mio_clk_data[]; |
158 | extern const struct uniphier_clk_data uniphier_pro5_sd_clk_data[]; | 159 | extern const struct uniphier_clk_data uniphier_pro5_sd_clk_data[]; |
159 | extern const struct uniphier_clk_data uniphier_ld4_peri_clk_data[]; | 160 | extern const struct uniphier_clk_data uniphier_ld4_peri_clk_data[]; |