diff options
author | Tariq Toukan <tariqt@mellanox.com> | 2018-02-11 08:21:33 -0500 |
---|---|---|
committer | Saeed Mahameed <saeedm@mellanox.com> | 2018-03-30 19:16:17 -0400 |
commit | 73281b78a37a1a3f392fd5b6116d04e597484529 (patch) | |
tree | 723a3c3ca78b72e8b67c8e9408a66afffd462064 | |
parent | 472a1e44b3495df01c83e048667ef93dd2ea1ca0 (diff) |
net/mlx5e: Derive Striding RQ size from MTU
In Striding RQ, each WQE serves multiple packets
(hence called Multi-Packet WQE, MPWQE).
The size of a MPWQE is constant (currently 256KB).
Upon a ringparam set operation, we calculate the number of
MPWQEs per RQ. For this, first it is needed to determine the
number of packets that can reside within a single MPWQE.
In this patch we use the actual MTU size instead of ETH_DATA_LEN
for this calculation.
This implies that a change in MTU might require a change
in Striding RQ ring size.
In addition, this obsoletes some WQEs-to-packets translation
functions and helps delete ~60 LOC.
Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
6 files changed, 80 insertions, 139 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en.h b/drivers/net/ethernet/mellanox/mlx5/core/en.h index 823876bfd6ab..1f89e2194b61 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en.h | |||
@@ -63,18 +63,6 @@ | |||
63 | #define MLX5E_MAX_DSCP 64 | 63 | #define MLX5E_MAX_DSCP 64 |
64 | #define MLX5E_MAX_NUM_TC 8 | 64 | #define MLX5E_MAX_NUM_TC 8 |
65 | 65 | ||
66 | #define MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE 0x6 | ||
67 | #define MLX5E_PARAMS_DEFAULT_LOG_SQ_SIZE 0xa | ||
68 | #define MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE 0xd | ||
69 | |||
70 | #define MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE 0x1 | ||
71 | #define MLX5E_PARAMS_DEFAULT_LOG_RQ_SIZE 0xa | ||
72 | #define MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE 0xd | ||
73 | |||
74 | #define MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE_MPW 0x2 | ||
75 | #define MLX5E_PARAMS_DEFAULT_LOG_RQ_SIZE_MPW 0x3 | ||
76 | #define MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE_MPW 0x6 | ||
77 | |||
78 | #define MLX5_RX_HEADROOM NET_SKB_PAD | 66 | #define MLX5_RX_HEADROOM NET_SKB_PAD |
79 | #define MLX5_SKB_FRAG_SZ(len) (SKB_DATA_ALIGN(len) + \ | 67 | #define MLX5_SKB_FRAG_SZ(len) (SKB_DATA_ALIGN(len) + \ |
80 | SKB_DATA_ALIGN(sizeof(struct skb_shared_info))) | 68 | SKB_DATA_ALIGN(sizeof(struct skb_shared_info))) |
@@ -95,9 +83,27 @@ | |||
95 | #define MLX5_MPWRQ_PAGES_PER_WQE BIT(MLX5_MPWRQ_WQE_PAGE_ORDER) | 83 | #define MLX5_MPWRQ_PAGES_PER_WQE BIT(MLX5_MPWRQ_WQE_PAGE_ORDER) |
96 | 84 | ||
97 | #define MLX5_MTT_OCTW(npages) (ALIGN(npages, 8) / 2) | 85 | #define MLX5_MTT_OCTW(npages) (ALIGN(npages, 8) / 2) |
98 | #define MLX5E_REQUIRED_MTTS(wqes) \ | 86 | #define MLX5E_REQUIRED_WQE_MTTS (ALIGN(MLX5_MPWRQ_PAGES_PER_WQE, 8)) |
99 | (wqes * ALIGN(MLX5_MPWRQ_PAGES_PER_WQE, 8)) | 87 | #define MLX5E_REQUIRED_MTTS(wqes) (wqes * MLX5E_REQUIRED_WQE_MTTS) |
100 | #define MLX5E_VALID_NUM_MTTS(num_mtts) (MLX5_MTT_OCTW(num_mtts) - 1 <= U16_MAX) | 88 | #define MLX5E_MAX_RQ_NUM_MTTS \ |
89 | ((1 << 16) * 2) /* So that MLX5_MTT_OCTW(num_mtts) fits into u16 */ | ||
90 | #define MLX5E_ORDER2_MAX_PACKET_MTU (order_base_2(10 * 1024)) | ||
91 | #define MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE_MPW \ | ||
92 | (ilog2(MLX5E_MAX_RQ_NUM_MTTS / MLX5E_REQUIRED_WQE_MTTS)) | ||
93 | #define MLX5E_LOG_MAX_RQ_NUM_PACKETS_MPW \ | ||
94 | (MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE_MPW + \ | ||
95 | (MLX5_MPWRQ_LOG_WQE_SZ - MLX5E_ORDER2_MAX_PACKET_MTU)) | ||
96 | |||
97 | #define MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE 0x6 | ||
98 | #define MLX5E_PARAMS_DEFAULT_LOG_SQ_SIZE 0xa | ||
99 | #define MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE 0xd | ||
100 | |||
101 | #define MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE 0x1 | ||
102 | #define MLX5E_PARAMS_DEFAULT_LOG_RQ_SIZE 0xa | ||
103 | #define MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE min_t(u8, 0xd, \ | ||
104 | MLX5E_LOG_MAX_RQ_NUM_PACKETS_MPW) | ||
105 | |||
106 | #define MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE_MPW 0x2 | ||
101 | 107 | ||
102 | #define MLX5_UMR_ALIGN (2048) | 108 | #define MLX5_UMR_ALIGN (2048) |
103 | #define MLX5_MPWRQ_SMALL_PACKET_THRESHOLD (256) | 109 | #define MLX5_MPWRQ_SMALL_PACKET_THRESHOLD (256) |
@@ -155,26 +161,6 @@ static inline u16 mlx5_min_rx_wqes(int wq_type, u32 wq_size) | |||
155 | } | 161 | } |
156 | } | 162 | } |
157 | 163 | ||
158 | static inline int mlx5_min_log_rq_size(int wq_type) | ||
159 | { | ||
160 | switch (wq_type) { | ||
161 | case MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ: | ||
162 | return MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE_MPW; | ||
163 | default: | ||
164 | return MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE; | ||
165 | } | ||
166 | } | ||
167 | |||
168 | static inline int mlx5_max_log_rq_size(int wq_type) | ||
169 | { | ||
170 | switch (wq_type) { | ||
171 | case MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ: | ||
172 | return MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE_MPW; | ||
173 | default: | ||
174 | return MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE; | ||
175 | } | ||
176 | } | ||
177 | |||
178 | static inline int mlx5e_get_max_num_channels(struct mlx5_core_dev *mdev) | 164 | static inline int mlx5e_get_max_num_channels(struct mlx5_core_dev *mdev) |
179 | { | 165 | { |
180 | return is_kdump_kernel() ? | 166 | return is_kdump_kernel() ? |
@@ -233,7 +219,7 @@ enum mlx5e_priv_flag { | |||
233 | struct mlx5e_params { | 219 | struct mlx5e_params { |
234 | u8 log_sq_size; | 220 | u8 log_sq_size; |
235 | u8 rq_wq_type; | 221 | u8 rq_wq_type; |
236 | u8 log_rq_size; | 222 | u8 log_rq_mtu_frames; |
237 | u16 num_channels; | 223 | u16 num_channels; |
238 | u8 num_tc; | 224 | u8 num_tc; |
239 | bool rx_cqe_compress_def; | 225 | bool rx_cqe_compress_def; |
@@ -849,11 +835,6 @@ void mlx5e_dealloc_rx_wqe(struct mlx5e_rq *rq, u16 ix); | |||
849 | void mlx5e_dealloc_rx_mpwqe(struct mlx5e_rq *rq, u16 ix); | 835 | void mlx5e_dealloc_rx_mpwqe(struct mlx5e_rq *rq, u16 ix); |
850 | void mlx5e_free_rx_mpwqe(struct mlx5e_rq *rq, struct mlx5e_mpw_info *wi); | 836 | void mlx5e_free_rx_mpwqe(struct mlx5e_rq *rq, struct mlx5e_mpw_info *wi); |
851 | 837 | ||
852 | u8 mlx5e_mpwqe_get_log_stride_size(struct mlx5_core_dev *mdev, | ||
853 | struct mlx5e_params *params); | ||
854 | u8 mlx5e_mpwqe_get_log_num_strides(struct mlx5_core_dev *mdev, | ||
855 | struct mlx5e_params *params); | ||
856 | |||
857 | void mlx5e_update_stats(struct mlx5e_priv *priv); | 838 | void mlx5e_update_stats(struct mlx5e_priv *priv); |
858 | 839 | ||
859 | int mlx5e_create_flow_steering(struct mlx5e_priv *priv); | 840 | int mlx5e_create_flow_steering(struct mlx5e_priv *priv); |
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c b/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c index c57c929d7973..a87d46bc2299 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c | |||
@@ -220,60 +220,12 @@ static void mlx5e_get_ethtool_stats(struct net_device *dev, | |||
220 | mlx5e_ethtool_get_ethtool_stats(priv, stats, data); | 220 | mlx5e_ethtool_get_ethtool_stats(priv, stats, data); |
221 | } | 221 | } |
222 | 222 | ||
223 | static u32 mlx5e_rx_wqes_to_packets(struct mlx5e_priv *priv, int rq_wq_type, | ||
224 | int num_wqe) | ||
225 | { | ||
226 | int packets_per_wqe; | ||
227 | int stride_size; | ||
228 | int num_strides; | ||
229 | int wqe_size; | ||
230 | |||
231 | if (rq_wq_type != MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ) | ||
232 | return num_wqe; | ||
233 | |||
234 | stride_size = 1 << mlx5e_mpwqe_get_log_stride_size(priv->mdev, &priv->channels.params); | ||
235 | num_strides = 1 << mlx5e_mpwqe_get_log_num_strides(priv->mdev, &priv->channels.params); | ||
236 | wqe_size = stride_size * num_strides; | ||
237 | |||
238 | packets_per_wqe = wqe_size / | ||
239 | ALIGN(ETH_DATA_LEN, stride_size); | ||
240 | return (1 << (order_base_2(num_wqe * packets_per_wqe) - 1)); | ||
241 | } | ||
242 | |||
243 | static u32 mlx5e_packets_to_rx_wqes(struct mlx5e_priv *priv, int rq_wq_type, | ||
244 | int num_packets) | ||
245 | { | ||
246 | int packets_per_wqe; | ||
247 | int stride_size; | ||
248 | int num_strides; | ||
249 | int wqe_size; | ||
250 | int num_wqes; | ||
251 | |||
252 | if (rq_wq_type != MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ) | ||
253 | return num_packets; | ||
254 | |||
255 | stride_size = 1 << mlx5e_mpwqe_get_log_stride_size(priv->mdev, &priv->channels.params); | ||
256 | num_strides = 1 << mlx5e_mpwqe_get_log_num_strides(priv->mdev, &priv->channels.params); | ||
257 | wqe_size = stride_size * num_strides; | ||
258 | |||
259 | num_packets = (1 << order_base_2(num_packets)); | ||
260 | |||
261 | packets_per_wqe = wqe_size / | ||
262 | ALIGN(ETH_DATA_LEN, stride_size); | ||
263 | num_wqes = DIV_ROUND_UP(num_packets, packets_per_wqe); | ||
264 | return 1 << (order_base_2(num_wqes)); | ||
265 | } | ||
266 | |||
267 | void mlx5e_ethtool_get_ringparam(struct mlx5e_priv *priv, | 223 | void mlx5e_ethtool_get_ringparam(struct mlx5e_priv *priv, |
268 | struct ethtool_ringparam *param) | 224 | struct ethtool_ringparam *param) |
269 | { | 225 | { |
270 | int rq_wq_type = priv->channels.params.rq_wq_type; | 226 | param->rx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE; |
271 | |||
272 | param->rx_max_pending = mlx5e_rx_wqes_to_packets(priv, rq_wq_type, | ||
273 | 1 << mlx5_max_log_rq_size(rq_wq_type)); | ||
274 | param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE; | 227 | param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE; |
275 | param->rx_pending = mlx5e_rx_wqes_to_packets(priv, rq_wq_type, | 228 | param->rx_pending = 1 << priv->channels.params.log_rq_mtu_frames; |
276 | 1 << priv->channels.params.log_rq_size); | ||
277 | param->tx_pending = 1 << priv->channels.params.log_sq_size; | 229 | param->tx_pending = 1 << priv->channels.params.log_sq_size; |
278 | } | 230 | } |
279 | 231 | ||
@@ -288,13 +240,9 @@ static void mlx5e_get_ringparam(struct net_device *dev, | |||
288 | int mlx5e_ethtool_set_ringparam(struct mlx5e_priv *priv, | 240 | int mlx5e_ethtool_set_ringparam(struct mlx5e_priv *priv, |
289 | struct ethtool_ringparam *param) | 241 | struct ethtool_ringparam *param) |
290 | { | 242 | { |
291 | int rq_wq_type = priv->channels.params.rq_wq_type; | ||
292 | struct mlx5e_channels new_channels = {}; | 243 | struct mlx5e_channels new_channels = {}; |
293 | u32 rx_pending_wqes; | ||
294 | u32 min_rq_size; | ||
295 | u8 log_rq_size; | 244 | u8 log_rq_size; |
296 | u8 log_sq_size; | 245 | u8 log_sq_size; |
297 | u32 num_mtts; | ||
298 | int err = 0; | 246 | int err = 0; |
299 | 247 | ||
300 | if (param->rx_jumbo_pending) { | 248 | if (param->rx_jumbo_pending) { |
@@ -308,23 +256,10 @@ int mlx5e_ethtool_set_ringparam(struct mlx5e_priv *priv, | |||
308 | return -EINVAL; | 256 | return -EINVAL; |
309 | } | 257 | } |
310 | 258 | ||
311 | min_rq_size = mlx5e_rx_wqes_to_packets(priv, rq_wq_type, | 259 | if (param->rx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE)) { |
312 | 1 << mlx5_min_log_rq_size(rq_wq_type)); | ||
313 | rx_pending_wqes = mlx5e_packets_to_rx_wqes(priv, rq_wq_type, | ||
314 | param->rx_pending); | ||
315 | |||
316 | if (param->rx_pending < min_rq_size) { | ||
317 | netdev_info(priv->netdev, "%s: rx_pending (%d) < min (%d)\n", | 260 | netdev_info(priv->netdev, "%s: rx_pending (%d) < min (%d)\n", |
318 | __func__, param->rx_pending, | 261 | __func__, param->rx_pending, |
319 | min_rq_size); | 262 | 1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE); |
320 | return -EINVAL; | ||
321 | } | ||
322 | |||
323 | num_mtts = MLX5E_REQUIRED_MTTS(rx_pending_wqes); | ||
324 | if (priv->channels.params.rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ && | ||
325 | !MLX5E_VALID_NUM_MTTS(num_mtts)) { | ||
326 | netdev_info(priv->netdev, "%s: rx_pending (%d) request can't be satisfied, try to reduce.\n", | ||
327 | __func__, param->rx_pending); | ||
328 | return -EINVAL; | 263 | return -EINVAL; |
329 | } | 264 | } |
330 | 265 | ||
@@ -335,17 +270,17 @@ int mlx5e_ethtool_set_ringparam(struct mlx5e_priv *priv, | |||
335 | return -EINVAL; | 270 | return -EINVAL; |
336 | } | 271 | } |
337 | 272 | ||
338 | log_rq_size = order_base_2(rx_pending_wqes); | 273 | log_rq_size = order_base_2(param->rx_pending); |
339 | log_sq_size = order_base_2(param->tx_pending); | 274 | log_sq_size = order_base_2(param->tx_pending); |
340 | 275 | ||
341 | if (log_rq_size == priv->channels.params.log_rq_size && | 276 | if (log_rq_size == priv->channels.params.log_rq_mtu_frames && |
342 | log_sq_size == priv->channels.params.log_sq_size) | 277 | log_sq_size == priv->channels.params.log_sq_size) |
343 | return 0; | 278 | return 0; |
344 | 279 | ||
345 | mutex_lock(&priv->state_lock); | 280 | mutex_lock(&priv->state_lock); |
346 | 281 | ||
347 | new_channels.params = priv->channels.params; | 282 | new_channels.params = priv->channels.params; |
348 | new_channels.params.log_rq_size = log_rq_size; | 283 | new_channels.params.log_rq_mtu_frames = log_rq_size; |
349 | new_channels.params.log_sq_size = log_sq_size; | 284 | new_channels.params.log_sq_size = log_sq_size; |
350 | 285 | ||
351 | if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) { | 286 | if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) { |
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c index af345323b2ce..e627b81cebe9 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c | |||
@@ -78,15 +78,38 @@ bool mlx5e_check_fragmented_striding_rq_cap(struct mlx5_core_dev *mdev) | |||
78 | MLX5_CAP_ETH(mdev, reg_umr_sq); | 78 | MLX5_CAP_ETH(mdev, reg_umr_sq); |
79 | } | 79 | } |
80 | 80 | ||
81 | u8 mlx5e_mpwqe_get_log_stride_size(struct mlx5_core_dev *mdev, | 81 | static u32 mlx5e_mpwqe_get_linear_frag_sz(struct mlx5e_params *params) |
82 | struct mlx5e_params *params) | 82 | { |
83 | u16 hw_mtu = MLX5E_SW2HW_MTU(params, params->sw_mtu); | ||
84 | |||
85 | return hw_mtu; | ||
86 | } | ||
87 | |||
88 | static u8 mlx5e_mpwqe_log_pkts_per_wqe(struct mlx5e_params *params) | ||
89 | { | ||
90 | u32 linear_frag_sz = mlx5e_mpwqe_get_linear_frag_sz(params); | ||
91 | |||
92 | return MLX5_MPWRQ_LOG_WQE_SZ - order_base_2(linear_frag_sz); | ||
93 | } | ||
94 | |||
95 | static u8 mlx5e_mpwqe_get_log_rq_size(struct mlx5e_params *params) | ||
96 | { | ||
97 | if (params->log_rq_mtu_frames < | ||
98 | mlx5e_mpwqe_log_pkts_per_wqe(params) + MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE_MPW) | ||
99 | return MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE_MPW; | ||
100 | |||
101 | return params->log_rq_mtu_frames - mlx5e_mpwqe_log_pkts_per_wqe(params); | ||
102 | } | ||
103 | |||
104 | static u8 mlx5e_mpwqe_get_log_stride_size(struct mlx5_core_dev *mdev, | ||
105 | struct mlx5e_params *params) | ||
83 | { | 106 | { |
84 | return MLX5E_MPWQE_STRIDE_SZ(mdev, | 107 | return MLX5E_MPWQE_STRIDE_SZ(mdev, |
85 | MLX5E_GET_PFLAG(params, MLX5E_PFLAG_RX_CQE_COMPRESS)); | 108 | MLX5E_GET_PFLAG(params, MLX5E_PFLAG_RX_CQE_COMPRESS)); |
86 | } | 109 | } |
87 | 110 | ||
88 | u8 mlx5e_mpwqe_get_log_num_strides(struct mlx5_core_dev *mdev, | 111 | static u8 mlx5e_mpwqe_get_log_num_strides(struct mlx5_core_dev *mdev, |
89 | struct mlx5e_params *params) | 112 | struct mlx5e_params *params) |
90 | { | 113 | { |
91 | return MLX5_MPWRQ_LOG_WQE_SZ - | 114 | return MLX5_MPWRQ_LOG_WQE_SZ - |
92 | mlx5e_mpwqe_get_log_stride_size(mdev, params); | 115 | mlx5e_mpwqe_get_log_stride_size(mdev, params); |
@@ -109,17 +132,13 @@ void mlx5e_init_rq_type_params(struct mlx5_core_dev *mdev, | |||
109 | struct mlx5e_params *params) | 132 | struct mlx5e_params *params) |
110 | { | 133 | { |
111 | params->lro_wqe_sz = MLX5E_PARAMS_DEFAULT_LRO_WQE_SZ; | 134 | params->lro_wqe_sz = MLX5E_PARAMS_DEFAULT_LRO_WQE_SZ; |
135 | params->log_rq_mtu_frames = is_kdump_kernel() ? | ||
136 | MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE : | ||
137 | MLX5E_PARAMS_DEFAULT_LOG_RQ_SIZE; | ||
112 | switch (params->rq_wq_type) { | 138 | switch (params->rq_wq_type) { |
113 | case MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ: | 139 | case MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ: |
114 | params->log_rq_size = is_kdump_kernel() ? | ||
115 | MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE_MPW : | ||
116 | MLX5E_PARAMS_DEFAULT_LOG_RQ_SIZE_MPW; | ||
117 | break; | 140 | break; |
118 | default: /* MLX5_WQ_TYPE_LINKED_LIST */ | 141 | default: /* MLX5_WQ_TYPE_LINKED_LIST */ |
119 | params->log_rq_size = is_kdump_kernel() ? | ||
120 | MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE : | ||
121 | MLX5E_PARAMS_DEFAULT_LOG_RQ_SIZE; | ||
122 | |||
123 | /* Extra room needed for build_skb */ | 142 | /* Extra room needed for build_skb */ |
124 | params->lro_wqe_sz -= mlx5e_get_rq_headroom(params) + | 143 | params->lro_wqe_sz -= mlx5e_get_rq_headroom(params) + |
125 | SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); | 144 | SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); |
@@ -127,7 +146,7 @@ void mlx5e_init_rq_type_params(struct mlx5_core_dev *mdev, | |||
127 | 146 | ||
128 | mlx5_core_info(mdev, "MLX5E: StrdRq(%d) RqSz(%ld) StrdSz(%ld) RxCqeCmprss(%d)\n", | 147 | mlx5_core_info(mdev, "MLX5E: StrdRq(%d) RqSz(%ld) StrdSz(%ld) RxCqeCmprss(%d)\n", |
129 | params->rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ, | 148 | params->rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ, |
130 | BIT(params->log_rq_size), | 149 | BIT(params->log_rq_mtu_frames), |
131 | BIT(mlx5e_mpwqe_get_log_stride_size(mdev, params)), | 150 | BIT(mlx5e_mpwqe_get_log_stride_size(mdev, params)), |
132 | MLX5E_GET_PFLAG(params, MLX5E_PFLAG_RX_CQE_COMPRESS)); | 151 | MLX5E_GET_PFLAG(params, MLX5E_PFLAG_RX_CQE_COMPRESS)); |
133 | } | 152 | } |
@@ -351,9 +370,6 @@ static int mlx5e_create_umr_mkey(struct mlx5_core_dev *mdev, | |||
351 | u32 *in; | 370 | u32 *in; |
352 | int err; | 371 | int err; |
353 | 372 | ||
354 | if (!MLX5E_VALID_NUM_MTTS(npages)) | ||
355 | return -EINVAL; | ||
356 | |||
357 | in = kvzalloc(inlen, GFP_KERNEL); | 373 | in = kvzalloc(inlen, GFP_KERNEL); |
358 | if (!in) | 374 | if (!in) |
359 | return -ENOMEM; | 375 | return -ENOMEM; |
@@ -1872,14 +1888,15 @@ static void mlx5e_build_rq_param(struct mlx5e_priv *priv, | |||
1872 | MLX5_SET(wq, wq, log_wqe_stride_size, | 1888 | MLX5_SET(wq, wq, log_wqe_stride_size, |
1873 | mlx5e_mpwqe_get_log_stride_size(mdev, params) - 6); | 1889 | mlx5e_mpwqe_get_log_stride_size(mdev, params) - 6); |
1874 | MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ); | 1890 | MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ); |
1891 | MLX5_SET(wq, wq, log_wq_sz, mlx5e_mpwqe_get_log_rq_size(params)); | ||
1875 | break; | 1892 | break; |
1876 | default: /* MLX5_WQ_TYPE_LINKED_LIST */ | 1893 | default: /* MLX5_WQ_TYPE_LINKED_LIST */ |
1877 | MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_LINKED_LIST); | 1894 | MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_LINKED_LIST); |
1895 | MLX5_SET(wq, wq, log_wq_sz, params->log_rq_mtu_frames); | ||
1878 | } | 1896 | } |
1879 | 1897 | ||
1880 | MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); | 1898 | MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); |
1881 | MLX5_SET(wq, wq, log_wq_stride, ilog2(sizeof(struct mlx5e_rx_wqe))); | 1899 | MLX5_SET(wq, wq, log_wq_stride, ilog2(sizeof(struct mlx5e_rx_wqe))); |
1882 | MLX5_SET(wq, wq, log_wq_sz, params->log_rq_size); | ||
1883 | MLX5_SET(wq, wq, pd, mdev->mlx5e_res.pdn); | 1900 | MLX5_SET(wq, wq, pd, mdev->mlx5e_res.pdn); |
1884 | MLX5_SET(rqc, rqc, counter_set_id, priv->q_counter); | 1901 | MLX5_SET(rqc, rqc, counter_set_id, priv->q_counter); |
1885 | MLX5_SET(rqc, rqc, vsd, params->vlan_strip_disable); | 1902 | MLX5_SET(rqc, rqc, vsd, params->vlan_strip_disable); |
@@ -1939,16 +1956,17 @@ static void mlx5e_build_rx_cq_param(struct mlx5e_priv *priv, | |||
1939 | struct mlx5e_params *params, | 1956 | struct mlx5e_params *params, |
1940 | struct mlx5e_cq_param *param) | 1957 | struct mlx5e_cq_param *param) |
1941 | { | 1958 | { |
1959 | struct mlx5_core_dev *mdev = priv->mdev; | ||
1942 | void *cqc = param->cqc; | 1960 | void *cqc = param->cqc; |
1943 | u8 log_cq_size; | 1961 | u8 log_cq_size; |
1944 | 1962 | ||
1945 | switch (params->rq_wq_type) { | 1963 | switch (params->rq_wq_type) { |
1946 | case MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ: | 1964 | case MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ: |
1947 | log_cq_size = params->log_rq_size + | 1965 | log_cq_size = mlx5e_mpwqe_get_log_rq_size(params) + |
1948 | mlx5e_mpwqe_get_log_num_strides(priv->mdev, params); | 1966 | mlx5e_mpwqe_get_log_num_strides(mdev, params); |
1949 | break; | 1967 | break; |
1950 | default: /* MLX5_WQ_TYPE_LINKED_LIST */ | 1968 | default: /* MLX5_WQ_TYPE_LINKED_LIST */ |
1951 | log_cq_size = params->log_rq_size; | 1969 | log_cq_size = params->log_rq_mtu_frames; |
1952 | } | 1970 | } |
1953 | 1971 | ||
1954 | MLX5_SET(cqc, cqc, log_cq_size, log_cq_size); | 1972 | MLX5_SET(cqc, cqc, log_cq_size, log_cq_size); |
@@ -3421,11 +3439,20 @@ static int mlx5e_change_mtu(struct net_device *netdev, int new_mtu) | |||
3421 | mutex_lock(&priv->state_lock); | 3439 | mutex_lock(&priv->state_lock); |
3422 | 3440 | ||
3423 | params = &priv->channels.params; | 3441 | params = &priv->channels.params; |
3424 | reset = !params->lro_en && | ||
3425 | (params->rq_wq_type != MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ); | ||
3426 | 3442 | ||
3443 | reset = !params->lro_en; | ||
3427 | reset = reset && test_bit(MLX5E_STATE_OPENED, &priv->state); | 3444 | reset = reset && test_bit(MLX5E_STATE_OPENED, &priv->state); |
3428 | 3445 | ||
3446 | new_channels.params = *params; | ||
3447 | new_channels.params.sw_mtu = new_mtu; | ||
3448 | |||
3449 | if (params->rq_wq_type != MLX5_WQ_TYPE_LINKED_LIST) { | ||
3450 | u8 ppw_old = mlx5e_mpwqe_log_pkts_per_wqe(params); | ||
3451 | u8 ppw_new = mlx5e_mpwqe_log_pkts_per_wqe(&new_channels.params); | ||
3452 | |||
3453 | reset = reset && (ppw_old != ppw_new); | ||
3454 | } | ||
3455 | |||
3429 | if (!reset) { | 3456 | if (!reset) { |
3430 | params->sw_mtu = new_mtu; | 3457 | params->sw_mtu = new_mtu; |
3431 | mlx5e_set_dev_port_mtu(priv); | 3458 | mlx5e_set_dev_port_mtu(priv); |
@@ -3433,8 +3460,6 @@ static int mlx5e_change_mtu(struct net_device *netdev, int new_mtu) | |||
3433 | goto out; | 3460 | goto out; |
3434 | } | 3461 | } |
3435 | 3462 | ||
3436 | new_channels.params = *params; | ||
3437 | new_channels.params.sw_mtu = new_mtu; | ||
3438 | err = mlx5e_open_channels(priv, &new_channels); | 3463 | err = mlx5e_open_channels(priv, &new_channels); |
3439 | if (err) | 3464 | if (err) |
3440 | goto out; | 3465 | goto out; |
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_rep.c b/drivers/net/ethernet/mellanox/mlx5/core/en_rep.c index cd884829cb30..8e70fa9ef39a 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_rep.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_rep.c | |||
@@ -880,7 +880,7 @@ static void mlx5e_build_rep_params(struct mlx5_core_dev *mdev, | |||
880 | params->hard_mtu = MLX5E_ETH_HARD_MTU; | 880 | params->hard_mtu = MLX5E_ETH_HARD_MTU; |
881 | params->log_sq_size = MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE; | 881 | params->log_sq_size = MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE; |
882 | params->rq_wq_type = MLX5_WQ_TYPE_LINKED_LIST; | 882 | params->rq_wq_type = MLX5_WQ_TYPE_LINKED_LIST; |
883 | params->log_rq_size = MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE; | 883 | params->log_rq_mtu_frames = MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE; |
884 | 884 | ||
885 | params->rx_dim_enabled = MLX5_CAP_GEN(mdev, cq_moderation); | 885 | params->rx_dim_enabled = MLX5_CAP_GEN(mdev, cq_moderation); |
886 | mlx5e_set_rx_cq_mode_params(params, cq_period_mode); | 886 | mlx5e_set_rx_cq_mode_params(params, cq_period_mode); |
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c b/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c index dc5e9e706362..af3bb2f7a504 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c | |||
@@ -61,7 +61,7 @@ static void mlx5i_build_nic_params(struct mlx5_core_dev *mdev, | |||
61 | mlx5e_init_rq_type_params(mdev, params); | 61 | mlx5e_init_rq_type_params(mdev, params); |
62 | 62 | ||
63 | /* RQ size in ipoib by default is 512 */ | 63 | /* RQ size in ipoib by default is 512 */ |
64 | params->log_rq_size = is_kdump_kernel() ? | 64 | params->log_rq_mtu_frames = is_kdump_kernel() ? |
65 | MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE : | 65 | MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE : |
66 | MLX5I_PARAMS_DEFAULT_LOG_RQ_SIZE; | 66 | MLX5I_PARAMS_DEFAULT_LOG_RQ_SIZE; |
67 | 67 | ||
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib_vlan.c b/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib_vlan.c index b69e9d847a6b..54a188f41f90 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib_vlan.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib_vlan.c | |||
@@ -290,7 +290,7 @@ static void mlx5i_pkey_init(struct mlx5_core_dev *mdev, | |||
290 | netdev->ethtool_ops = &mlx5i_pkey_ethtool_ops; | 290 | netdev->ethtool_ops = &mlx5i_pkey_ethtool_ops; |
291 | 291 | ||
292 | /* Use dummy rqs */ | 292 | /* Use dummy rqs */ |
293 | priv->channels.params.log_rq_size = MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE; | 293 | priv->channels.params.log_rq_mtu_frames = MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE; |
294 | } | 294 | } |
295 | 295 | ||
296 | /* Called directly before IPoIB netdevice is destroyed to cleanup SW structs */ | 296 | /* Called directly before IPoIB netdevice is destroyed to cleanup SW structs */ |