aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorArnd Bergmann <arnd@arndb.de>2016-09-13 11:31:16 -0400
committerArnd Bergmann <arnd@arndb.de>2016-09-13 11:31:16 -0400
commit72f61d2e92c43621d93f61ee2cfddc7ce7ac16c5 (patch)
tree37fe1b1cc025378a56891356663f6530969b01a2
parent9992f21333c1514d41a6cae50928c4c466b8465c (diff)
parenta305cc2fce217510dd255356d783e2c01cbc3a8f (diff)
Merge tag 'mvebu-dt-4.9-1' of git://git.infradead.org/linux-mvebu into next/dt
Pull "mvebu dt for 4.9 (part 1)" from Gregory CLEMENT: - update for Armada XP/38x allowing using direct access SPI - various improvement for Armada 39x platforms - add pinctrl information for NANd on Armada 38x - fix the kirkwood based Openblock A6 external GPIO pins * tag 'mvebu-dt-4.9-1' of git://git.infradead.org/linux-mvebu: ARM: dts: mvebu: fix reference to a390 spi controller ARM: dts: armada-38x: Add NAND pinctrl information ARM: dts: kirkwood: Fix Openblock A6 external GPIO pins ARM: dts: mvebu: armada-395-gp: add support for the Armada 395 GP Board ARM: dts: mvebu: armada-390-db: add support for the Armada 390 DB board ARM: dts: mvebu: armada-398-db: enable supported usb interfaces ARM: dts: mvebu: armada-398: update the dtsi about missing interfaces ARM: dts: mvebu: armada-395: add support for the Armada 395 SoC family ARM: dts: mvebu: armada-39x: enable rtc for all Armada-39x SoCs ARM: dts: mvebu: armada-39x: add missing nodes describing GPIO's ARM: dts: mvebu: armada-39x: enable watchdog for all Armada-39x SoCs ARM: dts: mvebu: armada-39x: enable the thermal sensor in Armada-39x SoCs ARM: dts: mvebu: armada-39x: enable PMU, CA9 SoC Controller and Coherency fabric ARM: dts: mvebu: armada-39x: update the SDHCI node on Armada 39x ARM: dts: mvebu: armada-390: add missing compatibility string and bracket ARM: dts: mvebu: a385-db-ap: add default partition description for NAND ARM: dts: mvebu: a385-db-ap: enable USB (orion-ehci) port ARM: dts: mvebu: armada-370-xp: Add MBus mappings for all SPI devices ARM: dts: mvebu: A37x/XP/38x/39x: Move SPI controller nodes into 'soc' node ARM: dts: mvebu: Add SPI1 pinctrl defines for Armada XP
Diffstat
-rw-r--r--Documentation/devicetree/bindings/arm/marvell/armada-39x.txt15
-rw-r--r--arch/arm/boot/dts/armada-370-db.dts29
-rw-r--r--arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi40
-rw-r--r--arch/arm/boot/dts/armada-370-synology-ds213j.dts112
-rw-r--r--arch/arm/boot/dts/armada-370-xp.dtsi56
-rw-r--r--arch/arm/boot/dts/armada-370.dtsi34
-rw-r--r--arch/arm/boot/dts/armada-385-db-ap.dts58
-rw-r--r--arch/arm/boot/dts/armada-385-linksys.dtsi9
-rw-r--r--arch/arm/boot/dts/armada-388-clearfog.dts48
-rw-r--r--arch/arm/boot/dts/armada-388-db.dts25
-rw-r--r--arch/arm/boot/dts/armada-388-gp.dts30
-rw-r--r--arch/arm/boot/dts/armada-388-rd.dts25
-rw-r--r--arch/arm/boot/dts/armada-38x.dtsi57
-rw-r--r--arch/arm/boot/dts/armada-390-db.dts175
-rw-r--r--arch/arm/boot/dts/armada-390.dtsi3
-rw-r--r--arch/arm/boot/dts/armada-395-gp.dts163
-rw-r--r--arch/arm/boot/dts/armada-395.dtsi76
-rw-r--r--arch/arm/boot/dts/armada-398-db.dts56
-rw-r--r--arch/arm/boot/dts/armada-398.dtsi10
-rw-r--r--arch/arm/boot/dts/armada-39x.dtsi126
-rw-r--r--arch/arm/boot/dts/armada-xp-axpwifiap.dts24
-rw-r--r--arch/arm/boot/dts/armada-xp-db.dts24
-rw-r--r--arch/arm/boot/dts/armada-xp-gp.dts24
-rw-r--r--arch/arm/boot/dts/armada-xp-linksys-mamba.dts24
-rw-r--r--arch/arm/boot/dts/armada-xp-synology-ds414.dts112
-rw-r--r--arch/arm/boot/dts/armada-xp.dtsi31
-rw-r--r--arch/arm/boot/dts/kirkwood-openblocks_a6.dts9
27 files changed, 988 insertions, 407 deletions
diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-39x.txt b/Documentation/devicetree/bindings/arm/marvell/armada-39x.txt
index 53d4ff9ea8ad..89468664f6ea 100644
--- a/Documentation/devicetree/bindings/arm/marvell/armada-39x.txt
+++ b/Documentation/devicetree/bindings/arm/marvell/armada-39x.txt
@@ -8,8 +8,19 @@ Required root node property:
8 8
9 - compatible: must contain "marvell,armada390" 9 - compatible: must contain "marvell,armada390"
10 10
11In addition, boards using the Marvell Armada 398 SoC shall have the 11In addition, boards using the Marvell Armada 395 SoC shall have the
12following property before the previous one: 12following property before the common "marvell,armada390" one:
13
14Required root node property:
15
16compatible: must contain "marvell,armada395"
17
18Example:
19
20compatible = "marvell,a395-gp", "marvell,armada395", "marvell,armada390";
21
22Boards using the Marvell Armada 398 SoC shall have the following
23property before the common "marvell,armada390" one:
13 24
14Required root node property: 25Required root node property:
15 26
diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts
index 2364fc56ae13..033fa63544f7 100644
--- a/arch/arm/boot/dts/armada-370-db.dts
+++ b/arch/arm/boot/dts/armada-370-db.dts
@@ -155,20 +155,6 @@
155 status = "okay"; 155 status = "okay";
156 }; 156 };
157 157
158 spi0: spi@10600 {
159 pinctrl-0 = <&spi0_pins2>;
160 pinctrl-names = "default";
161 status = "okay";
162
163 spi-flash@0 {
164 #address-cells = <1>;
165 #size-cells = <1>;
166 compatible = "mx25l25635e", "jedec,spi-nor";
167 reg = <0>; /* Chip select 0 */
168 spi-max-frequency = <50000000>;
169 };
170 };
171
172 nand@d0000 { 158 nand@d0000 {
173 status = "okay"; 159 status = "okay";
174 num-cs = <1>; 160 num-cs = <1>;
@@ -274,3 +260,18 @@
274 compatible = "linux,spdif-dir"; 260 compatible = "linux,spdif-dir";
275 }; 261 };
276}; 262};
263
264&spi0 {
265 pinctrl-0 = <&spi0_pins2>;
266 pinctrl-names = "default";
267 status = "okay";
268
269 spi-flash@0 {
270 #address-cells = <1>;
271 #size-cells = <1>;
272 compatible = "mx25l25635e", "jedec,spi-nor";
273 reg = <0>; /* Chip select 0 */
274 spi-max-frequency = <50000000>;
275 };
276};
277
diff --git a/arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi b/arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi
index 1aba08e4377c..01cded310cbc 100644
--- a/arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi
+++ b/arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi
@@ -68,26 +68,6 @@
68 phy-mode = "rgmii-id"; 68 phy-mode = "rgmii-id";
69 }; 69 };
70 70
71 spi@10600 {
72 status = "okay";
73 pinctrl-0 = <&spi0_pins2>;
74 pinctrl-names = "default";
75
76 spi-flash@0 {
77 #address-cells = <1>;
78 #size-cells = <1>;
79 /* MX25L8006E */
80 compatible = "mxicy,mx25l8005", "jedec,spi-nor";
81 reg = <0>; /* Chip select 0 */
82 spi-max-frequency = <50000000>;
83
84 partition@0 {
85 label = "u-boot";
86 reg = <0x0 0x100000>;
87 };
88 };
89 };
90
91 usb@50000 { 71 usb@50000 {
92 status = "okay"; 72 status = "okay";
93 }; 73 };
@@ -176,3 +156,23 @@
176 marvell,function = "gpio"; 156 marvell,function = "gpio";
177 }; 157 };
178}; 158};
159
160&spi0 {
161 status = "okay";
162 pinctrl-0 = <&spi0_pins2>;
163 pinctrl-names = "default";
164
165 spi-flash@0 {
166 #address-cells = <1>;
167 #size-cells = <1>;
168 /* MX25L8006E */
169 compatible = "mxicy,mx25l8005", "jedec,spi-nor";
170 reg = <0>; /* Chip select 0 */
171 spi-max-frequency = <50000000>;
172
173 partition@0 {
174 label = "u-boot";
175 reg = <0x0 0x100000>;
176 };
177 };
178};
diff --git a/arch/arm/boot/dts/armada-370-synology-ds213j.dts b/arch/arm/boot/dts/armada-370-synology-ds213j.dts
index 8ca7a4340c0f..a9cc42776874 100644
--- a/arch/arm/boot/dts/armada-370-synology-ds213j.dts
+++ b/arch/arm/boot/dts/armada-370-synology-ds213j.dts
@@ -87,62 +87,6 @@
87 status = "disabled"; 87 status = "disabled";
88 }; 88 };
89 89
90 spi0: spi@10600 {
91 status = "okay";
92
93 spi-flash@0 {
94 #address-cells = <1>;
95 #size-cells = <1>;
96 compatible = "micron,n25q064", "jedec,spi-nor";
97 reg = <0>; /* Chip select 0 */
98 spi-max-frequency = <20000000>;
99
100 /*
101 * Warning!
102 *
103 * Synology u-boot uses its compiled-in environment
104 * and it seems Synology did not care to change u-boot
105 * default configuration in order to allow saving a
106 * modified environment at a sensible location. So,
107 * if you do a 'saveenv' under u-boot, your modified
108 * environment will be saved at 1MB after the start
109 * of the flash, i.e. in the middle of the uImage.
110 * For that reason, it is strongly advised not to
111 * change the default environment, unless you know
112 * what you are doing.
113 */
114 partition@00000000 { /* u-boot */
115 label = "RedBoot";
116 reg = <0x00000000 0x000c0000>; /* 768KB */
117 };
118
119 partition@000c0000 { /* uImage */
120 label = "zImage";
121 reg = <0x000c0000 0x002d0000>; /* 2880KB */
122 };
123
124 partition@00390000 { /* uInitramfs */
125 label = "rd.gz";
126 reg = <0x00390000 0x00440000>; /* 4250KB */
127 };
128
129 partition@007d0000 { /* MAC address and serial number */
130 label = "vendor";
131 reg = <0x007d0000 0x00010000>; /* 64KB */
132 };
133
134 partition@007e0000 {
135 label = "RedBoot config";
136 reg = <0x007e0000 0x00010000>; /* 64KB */
137 };
138
139 partition@007f0000 {
140 label = "FIS directory";
141 reg = <0x007f0000 0x00010000>; /* 64KB */
142 };
143 };
144 };
145
146 i2c@11000 { 90 i2c@11000 {
147 compatible = "marvell,mv64xxx-i2c"; 91 compatible = "marvell,mv64xxx-i2c";
148 pinctrl-0 = <&i2c0_pins>; 92 pinctrl-0 = <&i2c0_pins>;
@@ -347,3 +291,59 @@
347 marvell,function = "gpio"; 291 marvell,function = "gpio";
348 }; 292 };
349}; 293};
294
295&spi0 {
296 status = "okay";
297
298 spi-flash@0 {
299 #address-cells = <1>;
300 #size-cells = <1>;
301 compatible = "micron,n25q064", "jedec,spi-nor";
302 reg = <0>; /* Chip select 0 */
303 spi-max-frequency = <20000000>;
304
305 /*
306 * Warning!
307 *
308 * Synology u-boot uses its compiled-in environment
309 * and it seems Synology did not care to change u-boot
310 * default configuration in order to allow saving a
311 * modified environment at a sensible location. So,
312 * if you do a 'saveenv' under u-boot, your modified
313 * environment will be saved at 1MB after the start
314 * of the flash, i.e. in the middle of the uImage.
315 * For that reason, it is strongly advised not to
316 * change the default environment, unless you know
317 * what you are doing.
318 */
319 partition@00000000 { /* u-boot */
320 label = "RedBoot";
321 reg = <0x00000000 0x000c0000>; /* 768KB */
322 };
323
324 partition@000c0000 { /* uImage */
325 label = "zImage";
326 reg = <0x000c0000 0x002d0000>; /* 2880KB */
327 };
328
329 partition@00390000 { /* uInitramfs */
330 label = "rd.gz";
331 reg = <0x00390000 0x00440000>; /* 4250KB */
332 };
333
334 partition@007d0000 { /* MAC address and serial number */
335 label = "vendor";
336 reg = <0x007d0000 0x00010000>; /* 64KB */
337 };
338
339 partition@007e0000 {
340 label = "RedBoot config";
341 reg = <0x007e0000 0x00010000>; /* 64KB */
342 };
343
344 partition@007f0000 {
345 label = "FIS directory";
346 reg = <0x007f0000 0x00010000>; /* 64KB */
347 };
348 };
349};
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index a718866ba52d..3ccedc9dffb2 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -148,26 +148,6 @@
148 interrupts = <50>; 148 interrupts = <50>;
149 }; 149 };
150 150
151 spi0: spi@10600 {
152 reg = <0x10600 0x28>;
153 #address-cells = <1>;
154 #size-cells = <0>;
155 cell-index = <0>;
156 interrupts = <30>;
157 clocks = <&coreclk 0>;
158 status = "disabled";
159 };
160
161 spi1: spi@10680 {
162 reg = <0x10680 0x28>;
163 #address-cells = <1>;
164 #size-cells = <0>;
165 cell-index = <1>;
166 interrupts = <92>;
167 clocks = <&coreclk 0>;
168 status = "disabled";
169 };
170
171 i2c0: i2c@11000 { 151 i2c0: i2c@11000 {
172 compatible = "marvell,mv64xxx-i2c"; 152 compatible = "marvell,mv64xxx-i2c";
173 #address-cells = <1>; 153 #address-cells = <1>;
@@ -320,6 +300,42 @@
320 status = "disabled"; 300 status = "disabled";
321 }; 301 };
322 }; 302 };
303
304 spi0: spi@10600 {
305 reg = <MBUS_ID(0xf0, 0x01) 0x10600 0x28>, /* control */
306 <MBUS_ID(0x01, 0x1e) 0 0xffffffff>, /* CS0 */
307 <MBUS_ID(0x01, 0x5e) 0 0xffffffff>, /* CS1 */
308 <MBUS_ID(0x01, 0x9e) 0 0xffffffff>, /* CS2 */
309 <MBUS_ID(0x01, 0xde) 0 0xffffffff>, /* CS3 */
310 <MBUS_ID(0x01, 0x1f) 0 0xffffffff>, /* CS4 */
311 <MBUS_ID(0x01, 0x5f) 0 0xffffffff>, /* CS5 */
312 <MBUS_ID(0x01, 0x9f) 0 0xffffffff>, /* CS6 */
313 <MBUS_ID(0x01, 0xdf) 0 0xffffffff>; /* CS7 */
314 #address-cells = <1>;
315 #size-cells = <0>;
316 cell-index = <0>;
317 interrupts = <30>;
318 clocks = <&coreclk 0>;
319 status = "disabled";
320 };
321
322 spi1: spi@10680 {
323 reg = <MBUS_ID(0xf0, 0x01) 0x10680 0x28>, /* control */
324 <MBUS_ID(0x01, 0x1a) 0 0xffffffff>, /* CS0 */
325 <MBUS_ID(0x01, 0x5a) 0 0xffffffff>, /* CS1 */
326 <MBUS_ID(0x01, 0x9a) 0 0xffffffff>, /* CS2 */
327 <MBUS_ID(0x01, 0xda) 0 0xffffffff>, /* CS3 */
328 <MBUS_ID(0x01, 0x1b) 0 0xffffffff>, /* CS4 */
329 <MBUS_ID(0x01, 0x5b) 0 0xffffffff>, /* CS5 */
330 <MBUS_ID(0x01, 0x9b) 0 0xffffffff>, /* CS6 */
331 <MBUS_ID(0x01, 0xdb) 0 0xffffffff>; /* CS7 */
332 #address-cells = <1>;
333 #size-cells = <0>;
334 cell-index = <1>;
335 interrupts = <92>;
336 clocks = <&coreclk 0>;
337 status = "disabled";
338 };
323 }; 339 };
324 340
325 clocks { 341 clocks {
diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index 3b06aa835448..b4258105e91f 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -134,24 +134,6 @@
134 wt-override; 134 wt-override;
135 }; 135 };
136 136
137 /*
138 * Default SPI pinctrl setting, can be overwritten on
139 * board level if a different configuration is used.
140 */
141 spi0: spi@10600 {
142 compatible = "marvell,armada-370-spi",
143 "marvell,orion-spi";
144 pinctrl-0 = <&spi0_pins1>;
145 pinctrl-names = "default";
146 };
147
148 spi1: spi@10680 {
149 compatible = "marvell,armada-370-spi",
150 "marvell,orion-spi";
151 pinctrl-0 = <&spi1_pins>;
152 pinctrl-names = "default";
153 };
154
155 i2c0: i2c@11000 { 137 i2c0: i2c@11000 {
156 reg = <0x11000 0x20>; 138 reg = <0x11000 0x20>;
157 }; 139 };
@@ -447,3 +429,19 @@
447 marvell,function = "ge1"; 429 marvell,function = "ge1";
448 }; 430 };
449}; 431};
432
433/*
434 * Default SPI pinctrl setting, can be overwritten on
435 * board level if a different configuration is used.
436 */
437&spi0 {
438 compatible = "marvell,armada-370-spi", "marvell,orion-spi";
439 pinctrl-0 = <&spi0_pins1>;
440 pinctrl-names = "default";
441};
442
443&spi1 {
444 compatible = "marvell,armada-370-spi", "marvell,orion-spi";
445 pinctrl-0 = <&spi1_pins>;
446 pinctrl-names = "default";
447};
diff --git a/arch/arm/boot/dts/armada-385-db-ap.dts b/arch/arm/boot/dts/armada-385-db-ap.dts
index 2d3fd6e76e2c..db5b9f6b615d 100644
--- a/arch/arm/boot/dts/armada-385-db-ap.dts
+++ b/arch/arm/boot/dts/armada-385-db-ap.dts
@@ -65,20 +65,6 @@
65 MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>; 65 MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
66 66
67 internal-regs { 67 internal-regs {
68 spi1: spi@10680 {
69 pinctrl-names = "default";
70 pinctrl-0 = <&spi1_pins>;
71 status = "okay";
72
73 spi-flash@0 {
74 #address-cells = <1>;
75 #size-cells = <1>;
76 compatible = "st,m25p128", "jedec,spi-nor";
77 reg = <0>; /* Chip select 0 */
78 spi-max-frequency = <54000000>;
79 };
80 };
81
82 i2c0: i2c@11000 { 68 i2c0: i2c@11000 {
83 pinctrl-names = "default"; 69 pinctrl-names = "default";
84 pinctrl-0 = <&i2c0_pins>; 70 pinctrl-0 = <&i2c0_pins>;
@@ -155,6 +141,10 @@
155 bm,pool-short = <3>; 141 bm,pool-short = <3>;
156 }; 142 };
157 143
144 usb@58000 {
145 status = "okay";
146 };
147
158 /* CON4 */ 148 /* CON4 */
159 ethernet@70000 { 149 ethernet@70000 {
160 pinctrl-names = "default"; 150 pinctrl-names = "default";
@@ -178,15 +168,35 @@
178 168
179 nfc: flash@d0000 { 169 nfc: flash@d0000 {
180 status = "okay"; 170 status = "okay";
181 #address-cells = <1>;
182 #size-cells = <1>;
183
184 num-cs = <1>; 171 num-cs = <1>;
185 nand-ecc-strength = <4>; 172 nand-ecc-strength = <4>;
186 nand-ecc-step-size = <512>; 173 nand-ecc-step-size = <512>;
187 marvell,nand-keep-config; 174 marvell,nand-keep-config;
188 marvell,nand-enable-arbiter; 175 marvell,nand-enable-arbiter;
189 nand-on-flash-bbt; 176 nand-on-flash-bbt;
177
178 partitions {
179 compatible = "fixed-partitions";
180 #address-cells = <1>;
181 #size-cells = <1>;
182
183 partition@0 {
184 label = "U-Boot";
185 reg = <0x00000000 0x00800000>;
186 read-only;
187 };
188
189 partition@800000 {
190 label = "uImage";
191 reg = <0x00800000 0x00400000>;
192 read-only;
193 };
194
195 partition@c00000 {
196 label = "Root";
197 reg = <0x00c00000 0x3f400000>;
198 };
199 };
190 }; 200 };
191 201
192 usb3@f0000 { 202 usb3@f0000 {
@@ -239,3 +249,17 @@
239 gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>; 249 gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
240 }; 250 };
241}; 251};
252
253&spi1 {
254 pinctrl-names = "default";
255 pinctrl-0 = <&spi1_pins>;
256 status = "okay";
257
258 spi-flash@0 {
259 #address-cells = <1>;
260 #size-cells = <1>;
261 compatible = "st,m25p128", "jedec,spi-nor";
262 reg = <0>; /* Chip select 0 */
263 spi-max-frequency = <54000000>;
264 };
265};
diff --git a/arch/arm/boot/dts/armada-385-linksys.dtsi b/arch/arm/boot/dts/armada-385-linksys.dtsi
index 22f7a13e20b4..8f0e508f64ae 100644
--- a/arch/arm/boot/dts/armada-385-linksys.dtsi
+++ b/arch/arm/boot/dts/armada-385-linksys.dtsi
@@ -62,11 +62,6 @@
62 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>; 62 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
63 63
64 internal-regs { 64 internal-regs {
65
66 spi@10600 {
67 status = "disabled";
68 };
69
70 i2c@11000 { 65 i2c@11000 {
71 pinctrl-names = "default"; 66 pinctrl-names = "default";
72 pinctrl-0 = <&i2c0_pins>; 67 pinctrl-0 = <&i2c0_pins>;
@@ -332,3 +327,7 @@
332 marvell,function = "gpio"; 327 marvell,function = "gpio";
333 }; 328 };
334}; 329};
330
331&spi0 {
332 status = "disabled";
333};
diff --git a/arch/arm/boot/dts/armada-388-clearfog.dts b/arch/arm/boot/dts/armada-388-clearfog.dts
index 2e0556af6e5e..2d2593023fd0 100644
--- a/arch/arm/boot/dts/armada-388-clearfog.dts
+++ b/arch/arm/boot/dts/armada-388-clearfog.dts
@@ -315,30 +315,6 @@
315 status = "okay"; 315 status = "okay";
316 }; 316 };
317 317
318 spi@10680 {
319 /*
320 * We don't seem to have the W25Q32 on the
321 * A1 Rev 2.0 boards, so disable SPI.
322 * CS0: W25Q32 (doesn't appear to be present)
323 * CS1:
324 * CS2: mikrobus
325 */
326 pinctrl-0 = <&spi1_pins
327 &clearfog_spi1_cs_pins
328 &mikro_spi_pins>;
329 pinctrl-names = "default";
330 status = "okay";
331
332 spi-flash@0 {
333 #address-cells = <1>;
334 #size-cells = <0>;
335 compatible = "w25q32", "jedec,spi-nor";
336 reg = <0>; /* Chip select 0 */
337 spi-max-frequency = <3000000>;
338 status = "disabled";
339 };
340 };
341
342 usb@58000 { 318 usb@58000 {
343 /* CON3, nearest power. */ 319 /* CON3, nearest power. */
344 status = "okay"; 320 status = "okay";
@@ -444,3 +420,27 @@
444 }; 420 };
445 }; 421 };
446}; 422};
423
424&spi1 {
425 /*
426 * We don't seem to have the W25Q32 on the
427 * A1 Rev 2.0 boards, so disable SPI.
428 * CS0: W25Q32 (doesn't appear to be present)
429 * CS1:
430 * CS2: mikrobus
431 */
432 pinctrl-0 = <&spi1_pins
433 &clearfog_spi1_cs_pins
434 &mikro_spi_pins>;
435 pinctrl-names = "default";
436 status = "okay";
437
438 spi-flash@0 {
439 #address-cells = <1>;
440 #size-cells = <0>;
441 compatible = "w25q32", "jedec,spi-nor";
442 reg = <0>; /* Chip select 0 */
443 spi-max-frequency = <3000000>;
444 status = "disabled";
445 };
446};
diff --git a/arch/arm/boot/dts/armada-388-db.dts b/arch/arm/boot/dts/armada-388-db.dts
index ea93ed727030..de26c762239c 100644
--- a/arch/arm/boot/dts/armada-388-db.dts
+++ b/arch/arm/boot/dts/armada-388-db.dts
@@ -70,18 +70,6 @@
70 MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>; 70 MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
71 71
72 internal-regs { 72 internal-regs {
73 spi@10600 {
74 status = "okay";
75
76 spi-flash@0 {
77 #address-cells = <1>;
78 #size-cells = <1>;
79 compatible = "w25q32", "jedec,spi-nor";
80 reg = <0>; /* Chip select 0 */
81 spi-max-frequency = <108000000>;
82 };
83 };
84
85 i2c@11000 { 73 i2c@11000 {
86 status = "okay"; 74 status = "okay";
87 clock-frequency = <100000>; 75 clock-frequency = <100000>;
@@ -201,3 +189,16 @@
201 }; 189 };
202 }; 190 };
203}; 191};
192
193&spi0 {
194 status = "okay";
195
196 spi-flash@0 {
197 #address-cells = <1>;
198 #size-cells = <1>;
199 compatible = "w25q32", "jedec,spi-nor";
200 reg = <0>; /* Chip select 0 */
201 spi-max-frequency = <108000000>;
202 };
203};
204
diff --git a/arch/arm/boot/dts/armada-388-gp.dts b/arch/arm/boot/dts/armada-388-gp.dts
index fd75e5e9550f..895fa6cfa15a 100644
--- a/arch/arm/boot/dts/armada-388-gp.dts
+++ b/arch/arm/boot/dts/armada-388-gp.dts
@@ -64,21 +64,6 @@
64 MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>; 64 MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
65 65
66 internal-regs { 66 internal-regs {
67 spi@10600 {
68 pinctrl-names = "default";
69 pinctrl-0 = <&spi0_pins>;
70 status = "okay";
71
72 spi-flash@0 {
73 #address-cells = <1>;
74 #size-cells = <1>;
75 compatible = "st,m25p128", "jedec,spi-nor";
76 reg = <0>; /* Chip select 0 */
77 spi-max-frequency = <50000000>;
78 m25p,fast-read;
79 };
80 };
81
82 i2c@11000 { 67 i2c@11000 {
83 pinctrl-names = "default"; 68 pinctrl-names = "default";
84 pinctrl-0 = <&i2c0_pins>; 69 pinctrl-0 = <&i2c0_pins>;
@@ -433,3 +418,18 @@
433 marvell,function = "gpio"; 418 marvell,function = "gpio";
434 }; 419 };
435}; 420};
421
422&spi0 {
423 pinctrl-names = "default";
424 pinctrl-0 = <&spi0_pins>;
425 status = "okay";
426
427 spi-flash@0 {
428 #address-cells = <1>;
429 #size-cells = <1>;
430 compatible = "st,m25p128", "jedec,spi-nor";
431 reg = <0>; /* Chip select 0 */
432 spi-max-frequency = <50000000>;
433 m25p,fast-read;
434 };
435};
diff --git a/arch/arm/boot/dts/armada-388-rd.dts b/arch/arm/boot/dts/armada-388-rd.dts
index 853f9735cc70..dd3462ddb6b9 100644
--- a/arch/arm/boot/dts/armada-388-rd.dts
+++ b/arch/arm/boot/dts/armada-388-rd.dts
@@ -70,18 +70,6 @@
70 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>; 70 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
71 71
72 internal-regs { 72 internal-regs {
73 spi@10600 {
74 status = "okay";
75
76 spi-flash@0 {
77 #address-cells = <1>;
78 #size-cells = <1>;
79 compatible = "st,m25p128", "jedec,spi-nor";
80 reg = <0>; /* Chip select 0 */
81 spi-max-frequency = <108000000>;
82 };
83 };
84
85 i2c@11000 { 73 i2c@11000 {
86 status = "okay"; 74 status = "okay";
87 clock-frequency = <100000>; 75 clock-frequency = <100000>;
@@ -142,3 +130,16 @@
142 }; 130 };
143 }; 131 };
144}; 132};
133
134&spi0 {
135 status = "okay";
136
137 spi-flash@0 {
138 #address-cells = <1>;
139 #size-cells = <1>;
140 compatible = "st,m25p128", "jedec,spi-nor";
141 reg = <0>; /* Chip select 0 */
142 spi-max-frequency = <108000000>;
143 };
144};
145
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index 3312be6c82cc..2d7668848c5a 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -170,30 +170,6 @@
170 <0xc100 0x100>; 170 <0xc100 0x100>;
171 }; 171 };
172 172
173 spi0: spi@10600 {
174 compatible = "marvell,armada-380-spi",
175 "marvell,orion-spi";
176 reg = <0x10600 0x50>;
177 #address-cells = <1>;
178 #size-cells = <0>;
179 cell-index = <0>;
180 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
181 clocks = <&coreclk 0>;
182 status = "disabled";
183 };
184
185 spi1: spi@10680 {
186 compatible = "marvell,armada-380-spi",
187 "marvell,orion-spi";
188 reg = <0x10680 0x50>;
189 #address-cells = <1>;
190 #size-cells = <0>;
191 cell-index = <1>;
192 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
193 clocks = <&coreclk 0>;
194 status = "disabled";
195 };
196
197 i2c0: i2c@11000 { 173 i2c0: i2c@11000 {
198 compatible = "marvell,mv64xxx-i2c"; 174 compatible = "marvell,mv64xxx-i2c";
199 reg = <0x11000 0x20>; 175 reg = <0x11000 0x20>;
@@ -287,6 +263,15 @@
287 marvell,function = "spi1"; 263 marvell,function = "spi1";
288 }; 264 };
289 265
266 nand_pins: nand-pins {
267 marvell,pins = "mpp22", "mpp34", "mpp23",
268 "mpp33", "mpp38", "mpp28",
269 "mpp40", "mpp42", "mpp35",
270 "mpp36", "mpp25", "mpp30",
271 "mpp32";
272 marvell,function = "dev";
273 };
274
290 uart0_pins: uart-pins-0 { 275 uart0_pins: uart-pins-0 {
291 marvell,pins = "mpp0", "mpp1"; 276 marvell,pins = "mpp0", "mpp1";
292 marvell,function = "ua0"; 277 marvell,function = "ua0";
@@ -649,6 +634,30 @@
649 no-memory-wc; 634 no-memory-wc;
650 status = "disabled"; 635 status = "disabled";
651 }; 636 };
637
638 spi0: spi@10600 {
639 compatible = "marvell,armada-380-spi",
640 "marvell,orion-spi";
641 reg = <MBUS_ID(0xf0, 0x01) 0x10600 0x50>;
642 #address-cells = <1>;
643 #size-cells = <0>;
644 cell-index = <0>;
645 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
646 clocks = <&coreclk 0>;
647 status = "disabled";
648 };
649
650 spi1: spi@10680 {
651 compatible = "marvell,armada-380-spi",
652 "marvell,orion-spi";
653 reg = <MBUS_ID(0xf0, 0x01) 0x10680 0x50>;
654 #address-cells = <1>;
655 #size-cells = <0>;
656 cell-index = <1>;
657 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
658 clocks = <&coreclk 0>;
659 status = "disabled";
660 };
652 }; 661 };
653 662
654 clocks { 663 clocks {
diff --git a/arch/arm/boot/dts/armada-390-db.dts b/arch/arm/boot/dts/armada-390-db.dts
new file mode 100644
index 000000000000..34e279d973c8
--- /dev/null
+++ b/arch/arm/boot/dts/armada-390-db.dts
@@ -0,0 +1,175 @@
1/*
2 * Device Tree file for Marvell Armada 390 Development Board
3 * (DB-88F6920)
4 *
5 * Copyright (C) 2016 Marvell
6 *
7 * Grzegorz Jaszczyk <jaz@semihalf.com>
8 *
9 * This file is dual-licensed: you can use it either under the terms
10 * of the GPL or the X11 license, at your option. Note that this dual
11 * licensing only applies to this file, and not this project as a
12 * whole.
13 *
14 * a) This file is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of the
17 * License, or (at your option) any later version.
18 *
19 * This file is distributed in the hope that it will be useful
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * Or, alternatively
25 *
26 * b) Permission is hereby granted, free of charge, to any person
27 * obtaining a copy of this software and associated documentation
28 * files (the "Software"), to deal in the Software without
29 * restriction, including without limitation the rights to use
30 * copy, modify, merge, publish, distribute, sublicense, and/or
31 * sell copies of the Software, and to permit persons to whom the
32 * Software is furnished to do so, subject to the following
33 * conditions:
34 *
35 * The above copyright notice and this permission notice shall be
36 * included in all copies or substantial portions of the Software.
37 *
38 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
39 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
43 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45 * OTHER DEALINGS IN THE SOFTWARE.
46 */
47
48/dts-v1/;
49#include "armada-390.dtsi"
50
51/ {
52 model = "Marvell Armada 390 Development Board";
53 compatible = "marvell,a390-db", "marvell,armada390";
54
55 chosen {
56 stdout-path = "serial0:115200n8";
57 };
58
59 memory {
60 device_type = "memory";
61 reg = <0x00000000 0x80000000>; /* 2 GB */
62 };
63
64 soc {
65 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
66 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
67
68 internal-regs {
69 i2c@11000 {
70 status = "okay";
71 clock-frequency = <100000>;
72
73 eeprom@50 {
74 compatible = "atmel,24c64";
75 reg = <0x50>;
76 };
77 };
78
79 /* CON104 */
80 serial@12000 {
81 status = "okay";
82 };
83
84 /* CON97 */
85 usb@58000 {
86 status = "okay";
87 };
88
89 flash@d0000 {
90 status = "okay";
91 pinctrl-0 = <&nand_pins>;
92 pinctrl-names = "default";
93 num-cs = <1>;
94 marvell,nand-keep-config;
95 marvell,nand-enable-arbiter;
96 nand-on-flash-bbt;
97 nand-ecc-strength = <8>;
98 nand-ecc-step-size = <512>;
99
100 partitions {
101 compatible = "fixed-partitions";
102 #address-cells = <1>;
103 #size-cells = <1>;
104
105 partition@0 {
106 label = "U-Boot";
107 reg = <0 0x800000>;
108 };
109 partition@800000 {
110 label = "Linux";
111 reg = <0x800000 0x800000>;
112 };
113 partition@1000000 {
114 label = "Filesystem";
115 reg = <0x1000000 0x3f000000>;
116 };
117 };
118 };
119
120 /* CON98 */
121 usb3@f8000 {
122 status = "okay";
123 };
124 };
125
126 pcie-controller {
127 status = "okay";
128
129 /* CON30 */
130 pcie@1,0 {
131 status = "okay";
132 };
133
134 /* CON44 */
135 pcie@2,0 {
136 status = "okay";
137 };
138
139 /* CON61 */
140 pcie@3,0 {
141 status = "okay";
142 };
143 };
144 };
145};
146
147&spi1 {
148 status = "okay";
149 pinctrl-0 = <&spi1_pins>;
150 pinctrl-names = "default";
151
152 spi-flash@1 {
153 #address-cells = <1>;
154 #size-cells = <1>;
155 compatible = "n25q128a13",
156 "jedec,spi-nor";
157 reg = <0>; /* Chip select 0 */
158 spi-max-frequency = <108000000>;
159
160 partitions {
161 compatible = "fixed-partitions";
162 #address-cells = <1>;
163 #size-cells = <1>;
164
165 partition@0 {
166 label = "U-Boot";
167 reg = <0 0x400000>;
168 };
169 partition@400000 {
170 label = "Filesystem";
171 reg = <0x400000 0xc00000>;
172 };
173 };
174 };
175};
diff --git a/arch/arm/boot/dts/armada-390.dtsi b/arch/arm/boot/dts/armada-390.dtsi
index 094e39c66039..6cd18d8aaac7 100644
--- a/arch/arm/boot/dts/armada-390.dtsi
+++ b/arch/arm/boot/dts/armada-390.dtsi
@@ -47,6 +47,8 @@
47#include "armada-39x.dtsi" 47#include "armada-39x.dtsi"
48 48
49/ { 49/ {
50 compatible = "marvell,armada390";
51
50 soc { 52 soc {
51 internal-regs { 53 internal-regs {
52 pinctrl@18000 { 54 pinctrl@18000 {
@@ -54,4 +56,5 @@
54 reg = <0x18000 0x20>; 56 reg = <0x18000 0x20>;
55 }; 57 };
56 }; 58 };
59 };
57}; 60};
diff --git a/arch/arm/boot/dts/armada-395-gp.dts b/arch/arm/boot/dts/armada-395-gp.dts
new file mode 100644
index 000000000000..2cdbba804c1e
--- /dev/null
+++ b/arch/arm/boot/dts/armada-395-gp.dts
@@ -0,0 +1,163 @@
1/*
2 * Device Tree file for Marvell Armada 395 GP board
3 *
4 * Copyright (C) 2016 Marvell
5 *
6 * Grzegorz Jaszczyk <jaz@semihalf.com>
7 *
8 * This file is dual-licensed: you can use it either under the terms
9 * of the GPL or the X11 license, at your option. Note that this dual
10 * licensing only applies to this file, and not this project as a
11 * whole.
12 *
13 * a) This file is licensed under the terms of the GNU General Public
14 * License version 2. This program is licensed "as is" without
15 * any warranty of any kind, whether express or implied.
16 *
17 * Or, alternatively,
18 *
19 * b) Permission is hereby granted, free of charge, to any person
20 * obtaining a copy of this software and associated documentation
21 * files (the "Software"), to deal in the Software without
22 * restriction, including without limitation the rights to use,
23 * copy, modify, merge, publish, distribute, sublicense, and/or
24 * sell copies of the Software, and to permit persons to whom the
25 * Software is furnished to do so, subject to the following
26 * conditions:
27 *
28 * The above copyright notice and this permission notice shall be
29 * included in all copies or substantial portions of the Software.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
32 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
33 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
34 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
35 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
36 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
37 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
38 * OTHER DEALINGS IN THE SOFTWARE.
39 */
40
41/dts-v1/;
42#include "armada-395.dtsi"
43
44/ {
45 model = "Marvell Armada 395 GP Board";
46 compatible = "marvell,a395-gp", "marvell,armada395",
47 "marvell,armada390";
48
49 chosen {
50 stdout-path = "serial0:115200n8";
51 };
52
53 memory {
54 device_type = "memory";
55 reg = <0x00000000 0x40000000>; /* 1 GB */
56 };
57
58 soc {
59 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
60 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
61
62 internal-regs {
63 i2c@11000 {
64 status = "okay";
65 clock-frequency = <100000>;
66
67 eeprom@57 {
68 compatible = "atmel,24c64";
69 reg = <0x57>;
70 };
71 };
72
73 serial@12000 {
74 /*
75 * Exported on the micro USB connector CON17
76 * through an FTDI
77 */
78 status = "okay";
79 };
80
81 /* CON1 */
82 usb@58000 {
83 status = "okay";
84 };
85
86 /* CON2 */
87 sata@a8000 {
88 status = "okay";
89 };
90
91 flash@d0000 {
92 status = "okay";
93 pinctrl-0 = <&nand_pins>;
94 pinctrl-names = "default";
95 num-cs = <1>;
96 marvell,nand-keep-config;
97 marvell,nand-enable-arbiter;
98 nand-on-flash-bbt;
99 nand-ecc-strength = <4>;
100 nand-ecc-step-size = <512>;
101
102 partitions {
103 compatible = "fixed-partitions";
104 #address-cells = <1>;
105 #size-cells = <1>;
106
107 partition@0 {
108 label = "U-Boot";
109 reg = <0x00000000 0x00600000>;
110 read-only;
111 };
112
113 partition@800000 {
114 label = "uImage";
115 reg = <0x00600000 0x00400000>;
116 read-only;
117 };
118
119 partition@1000000 {
120 label = "Root";
121 reg = <0x00a00000 0x3f600000>;
122 };
123 };
124 };
125
126 /* CON18 */
127 sdhci@d8000 {
128 clock-frequency = <200000000>;
129 broken-cd;
130 wp-inverted;
131 bus-width = <8>;
132 status = "okay";
133 no-1-8-v;
134 };
135
136 /* CON4 */
137 usb3@f0000 {
138 status = "okay";
139 };
140 };
141
142 pcie-controller {
143 status = "okay";
144
145 /*
146 * The two PCIe units are accessible through
147 * mini PCIe slot on the board.
148 */
149
150 /* CON7 */
151 pcie@2,0 {
152 /* Port 1, Lane 0 */
153 status = "okay";
154 };
155
156 /* CON8 */
157 pcie@4,0 {
158 /* Port 3, Lane 0 */
159 status = "okay";
160 };
161 };
162 };
163};
diff --git a/arch/arm/boot/dts/armada-395.dtsi b/arch/arm/boot/dts/armada-395.dtsi
new file mode 100644
index 000000000000..ab5dc49f2bff
--- /dev/null
+++ b/arch/arm/boot/dts/armada-395.dtsi
@@ -0,0 +1,76 @@
1/*
2 * Device Tree Include file for Marvell Armada 395 SoC.
3 *
4 * Copyright (C) 2016 Marvell
5 *
6 * Grzegorz Jaszczyk <jaz@semihalf.com>
7 *
8 * This file is dual-licensed: you can use it either under the terms
9 * of the GPL or the X11 license, at your option. Note that this dual
10 * licensing only applies to this file, and not this project as a
11 * whole.
12 *
13 * a) This file is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of the
16 * License, or (at your option) any later version.
17 *
18 * This file is distributed in the hope that it will be useful
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * Or, alternatively
24 *
25 * b) Permission is hereby granted, free of charge, to any person
26 * obtaining a copy of this software and associated documentation
27 * files (the "Software"), to deal in the Software without
28 * restriction, including without limitation the rights to use
29 * copy, modify, merge, publish, distribute, sublicense, and/or
30 * sell copies of the Software, and to permit persons to whom the
31 * Software is furnished to do so, subject to the following
32 * conditions:
33 *
34 * The above copyright notice and this permission notice shall be
35 * included in all copies or substantial portions of the Software.
36 *
37 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
38 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
39 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
40 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
42 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
43 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
44 * OTHER DEALINGS IN THE SOFTWARE.
45 */
46
47#include "armada-39x.dtsi"
48
49/ {
50 compatible = "marvell,armada395", "marvell,armada390";
51
52 soc {
53 internal-regs {
54 pinctrl@18000 {
55 compatible = "marvell,mv88f6925-pinctrl";
56 reg = <0x18000 0x20>;
57 };
58
59 sata@a8000 {
60 compatible = "marvell,armada-380-ahci";
61 reg = <0xa8000 0x2000>;
62 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
63 clocks = <&gateclk 15>;
64 status = "disabled";
65 };
66
67 usb3@f0000 {
68 compatible = "marvell,armada-380-xhci";
69 reg = <0xf0000 0x4000>,<0xf4000 0x4000>;
70 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
71 clocks = <&gateclk 9>;
72 status = "disabled";
73 };
74 };
75 };
76};
diff --git a/arch/arm/boot/dts/armada-398-db.dts b/arch/arm/boot/dts/armada-398-db.dts
index 788c3badb681..268c8349c884 100644
--- a/arch/arm/boot/dts/armada-398-db.dts
+++ b/arch/arm/boot/dts/armada-398-db.dts
@@ -65,30 +65,6 @@
65 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>; 65 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
66 66
67 internal-regs { 67 internal-regs {
68 spi@10680 {
69 status = "okay";
70 pinctrl-0 = <&spi1_pins>;
71 pinctrl-names = "default";
72
73 spi-flash@0 {
74 #address-cells = <1>;
75 #size-cells = <0>;
76 compatible = "n25q128a13", "jedec,spi-nor";
77 reg = <0>;
78 spi-max-frequency = <108000000>;
79
80 partition@0 {
81 label = "U-Boot";
82 reg = <0 0x400000>;
83 };
84
85 partition@400000 {
86 label = "Filesystem";
87 reg = <0x400000 0x1000000>;
88 };
89 };
90 };
91
92 i2c@11000 { 68 i2c@11000 {
93 pinctrl-0 = <&i2c0_pins>; 69 pinctrl-0 = <&i2c0_pins>;
94 pinctrl-names = "default"; 70 pinctrl-names = "default";
@@ -108,6 +84,10 @@
108 status = "okay"; 84 status = "okay";
109 }; 85 };
110 86
87 usb@58000 {
88 status = "okay";
89 };
90
111 flash@d0000 { 91 flash@d0000 {
112 status = "okay"; 92 status = "okay";
113 pinctrl-0 = <&nand_pins>; 93 pinctrl-0 = <&nand_pins>;
@@ -132,6 +112,10 @@
132 reg = <0x1000000 0x3f000000>; 112 reg = <0x1000000 0x3f000000>;
133 }; 113 };
134 }; 114 };
115
116 usb3@f8000 {
117 status = "okay";
118 };
135 }; 119 };
136 120
137 pcie-controller { 121 pcie-controller {
@@ -151,3 +135,27 @@
151 }; 135 };
152 }; 136 };
153}; 137};
138
139&spi1 {
140 status = "okay";
141 pinctrl-0 = <&spi1_pins>;
142 pinctrl-names = "default";
143
144 spi-flash@0 {
145 #address-cells = <1>;
146 #size-cells = <0>;
147 compatible = "n25q128a13", "jedec,spi-nor";
148 reg = <0>;
149 spi-max-frequency = <108000000>;
150
151 partition@0 {
152 label = "U-Boot";
153 reg = <0 0x400000>;
154 };
155
156 partition@400000 {
157 label = "Filesystem";
158 reg = <0x400000 0x1000000>;
159 };
160 };
161};
diff --git a/arch/arm/boot/dts/armada-398.dtsi b/arch/arm/boot/dts/armada-398.dtsi
index fdc25914e3a3..234a99891a29 100644
--- a/arch/arm/boot/dts/armada-398.dtsi
+++ b/arch/arm/boot/dts/armada-398.dtsi
@@ -44,7 +44,7 @@
44 * OTHER DEALINGS IN THE SOFTWARE. 44 * OTHER DEALINGS IN THE SOFTWARE.
45 */ 45 */
46 46
47#include "armada-39x.dtsi" 47#include "armada-395.dtsi"
48 48
49/ { 49/ {
50 compatible = "marvell,armada398", "marvell,armada390"; 50 compatible = "marvell,armada398", "marvell,armada390";
@@ -55,6 +55,14 @@
55 compatible = "marvell,mv88f6928-pinctrl"; 55 compatible = "marvell,mv88f6928-pinctrl";
56 reg = <0x18000 0x20>; 56 reg = <0x18000 0x20>;
57 }; 57 };
58
59 sata@e0000 {
60 compatible = "marvell,armada-380-ahci";
61 reg = <0xe0000 0x2000>;
62 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
63 clocks = <&gateclk 30>;
64 status = "disabled";
65 };
58 }; 66 };
59 }; 67 };
60}; 68};
diff --git a/arch/arm/boot/dts/armada-39x.dtsi b/arch/arm/boot/dts/armada-39x.dtsi
index dc6efd386dbc..34cba87f9200 100644
--- a/arch/arm/boot/dts/armada-39x.dtsi
+++ b/arch/arm/boot/dts/armada-39x.dtsi
@@ -55,6 +55,8 @@
55 compatible = "marvell,armada390"; 55 compatible = "marvell,armada390";
56 56
57 aliases { 57 aliases {
58 gpio0 = &gpio0;
59 gpio1 = &gpio1;
58 serial0 = &uart0; 60 serial0 = &uart0;
59 serial1 = &uart1; 61 serial1 = &uart1;
60 serial2 = &uart2; 62 serial2 = &uart2;
@@ -78,6 +80,11 @@
78 }; 80 };
79 }; 81 };
80 82
83 pmu {
84 compatible = "arm,cortex-a9-pmu";
85 interrupts-extended = <&mpic 3>;
86 };
87
81 soc { 88 soc {
82 compatible = "marvell,armada390-mbus", "marvell,armadaxp-mbus", 89 compatible = "marvell,armada390-mbus", "marvell,armadaxp-mbus",
83 "simple-bus"; 90 "simple-bus";
@@ -131,30 +138,6 @@
131 <0xc100 0x100>; 138 <0xc100 0x100>;
132 }; 139 };
133 140
134 spi0: spi@10600 {
135 compatible = "marvell,armada-390-spi",
136 "marvell,orion-spi";
137 reg = <0x10600 0x50>;
138 #address-cells = <1>;
139 #size-cells = <0>;
140 cell-index = <0>;
141 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
142 clocks = <&coreclk 0>;
143 status = "disabled";
144 };
145
146 spi1: spi@10680 {
147 compatible = "marvell,armada-390-spi",
148 "marvell,orion-spi";
149 reg = <0x10680 0x50>;
150 #address-cells = <1>;
151 #size-cells = <0>;
152 cell-index = <1>;
153 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
154 clocks = <&coreclk 0>;
155 status = "disabled";
156 };
157
158 i2c0: i2c@11000 { 141 i2c0: i2c@11000 {
159 compatible = "marvell,mv64xxx-i2c"; 142 compatible = "marvell,mv64xxx-i2c";
160 reg = <0x11000 0x20>; 143 reg = <0x11000 0x20>;
@@ -269,6 +252,34 @@
269 }; 252 };
270 }; 253 };
271 254
255 gpio0: gpio@18100 {
256 compatible = "marvell,orion-gpio";
257 reg = <0x18100 0x40>;
258 ngpios = <32>;
259 gpio-controller;
260 #gpio-cells = <2>;
261 interrupt-controller;
262 #interrupt-cells = <2>;
263 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
264 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
265 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
266 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
267 };
268
269 gpio1: gpio@18140 {
270 compatible = "marvell,orion-gpio";
271 reg = <0x18140 0x40>;
272 ngpios = <28>;
273 gpio-controller;
274 #gpio-cells = <2>;
275 interrupt-controller;
276 #interrupt-cells = <2>;
277 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
278 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
279 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
280 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
281 };
282
272 system-controller@18200 { 283 system-controller@18200 {
273 compatible = "marvell,armada-390-system-controller", 284 compatible = "marvell,armada-390-system-controller",
274 "marvell,armada-370-xp-system-controller"; 285 "marvell,armada-370-xp-system-controller";
@@ -317,11 +328,29 @@
317 clock-names = "nbclk", "fixed"; 328 clock-names = "nbclk", "fixed";
318 }; 329 };
319 330
331 watchdog@20300 {
332 compatible = "marvell,armada-380-wdt";
333 reg = <0x20300 0x34>, <0x20704 0x4>,
334 <0x18260 0x4>;
335 clocks = <&coreclk 2>, <&refclk>;
336 clock-names = "nbclk", "fixed";
337 };
338
320 cpurst@20800 { 339 cpurst@20800 {
321 compatible = "marvell,armada-370-cpu-reset"; 340 compatible = "marvell,armada-370-cpu-reset";
322 reg = <0x20800 0x10>; 341 reg = <0x20800 0x10>;
323 }; 342 };
324 343
344 mpcore-soc-ctrl@20d20 {
345 compatible = "marvell,armada-380-mpcore-soc-ctrl";
346 reg = <0x20d20 0x6c>;
347 };
348
349 coherency-fabric@21010 {
350 compatible = "marvell,armada-380-coherency-fabric";
351 reg = <0x21010 0x1c>;
352 };
353
325 pmsu@22000 { 354 pmsu@22000 {
326 compatible = "marvell,armada-390-pmsu", 355 compatible = "marvell,armada-390-pmsu",
327 "marvell,armada-380-pmsu"; 356 "marvell,armada-380-pmsu";
@@ -368,6 +397,13 @@
368 }; 397 };
369 }; 398 };
370 399
400 rtc@a3800 {
401 compatible = "marvell,armada-380-rtc";
402 reg = <0xa3800 0x20>, <0x184a0 0x0c>;
403 reg-names = "rtc", "rtc-soc";
404 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
405 };
406
371 flash@d0000 { 407 flash@d0000 {
372 compatible = "marvell,armada370-nand"; 408 compatible = "marvell,armada370-nand";
373 reg = <0xd0000 0x54>; 409 reg = <0xd0000 0x54>;
@@ -380,7 +416,10 @@
380 416
381 sdhci@d8000 { 417 sdhci@d8000 {
382 compatible = "marvell,armada-380-sdhci"; 418 compatible = "marvell,armada-380-sdhci";
383 reg = <0xd8000 0x1000>, <0xdc000 0x100>; 419 reg-names = "sdhci", "mbus", "conf-sdio3";
420 reg = <0xd8000 0x1000>,
421 <0xdc000 0x100>,
422 <0x18454 0x4>;
384 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 423 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
385 clocks = <&gateclk 17>; 424 clocks = <&gateclk 17>;
386 mrvl,clk-delay-cycles = <0x1F>; 425 mrvl,clk-delay-cycles = <0x1F>;
@@ -395,6 +434,12 @@
395 clocks = <&mainpll>; 434 clocks = <&mainpll>;
396 clock-output-names = "nand"; 435 clock-output-names = "nand";
397 }; 436 };
437
438 thermal@e8078 {
439 compatible = "marvell,armada380-thermal";
440 reg = <0xe4078 0x4>, <0xe4074 0x4>;
441 status = "okay";
442 };
398 }; 443 };
399 444
400 pcie-controller { 445 pcie-controller {
@@ -501,6 +546,30 @@
501 status = "disabled"; 546 status = "disabled";
502 }; 547 };
503 }; 548 };
549
550 spi0: spi@10600 {
551 compatible = "marvell,armada-390-spi",
552 "marvell,orion-spi";
553 reg = <MBUS_ID(0xf0, 0x01) 0x10600 0x50>;
554 #address-cells = <1>;
555 #size-cells = <0>;
556 cell-index = <0>;
557 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
558 clocks = <&coreclk 0>;
559 status = "disabled";
560 };
561
562 spi1: spi@10680 {
563 compatible = "marvell,armada-390-spi",
564 "marvell,orion-spi";
565 reg = <MBUS_ID(0xf0, 0x01) 0x10680 0x50>;
566 #address-cells = <1>;
567 #size-cells = <0>;
568 cell-index = <1>;
569 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
570 clocks = <&coreclk 0>;
571 status = "disabled";
572 };
504 }; 573 };
505 574
506 clocks { 575 clocks {
@@ -510,5 +579,12 @@
510 #clock-cells = <0>; 579 #clock-cells = <0>;
511 clock-frequency = <1000000000>; 580 clock-frequency = <1000000000>;
512 }; 581 };
582
583 /* 25 MHz reference crystal */
584 refclk: oscillator {
585 compatible = "fixed-clock";
586 #clock-cells = <0>;
587 clock-frequency = <25000000>;
588 };
513 }; 589 };
514}; 590};
diff --git a/arch/arm/boot/dts/armada-xp-axpwifiap.dts b/arch/arm/boot/dts/armada-xp-axpwifiap.dts
index 5c21b236721f..ce152719bc28 100644
--- a/arch/arm/boot/dts/armada-xp-axpwifiap.dts
+++ b/arch/arm/boot/dts/armada-xp-axpwifiap.dts
@@ -135,18 +135,6 @@
135 phy = <&phy1>; 135 phy = <&phy1>;
136 phy-mode = "rgmii-id"; 136 phy-mode = "rgmii-id";
137 }; 137 };
138
139 spi0: spi@10600 {
140 status = "okay";
141
142 spi-flash@0 {
143 #address-cells = <1>;
144 #size-cells = <1>;
145 compatible = "n25q128a13", "jedec,spi-nor";
146 reg = <0>; /* Chip select 0 */
147 spi-max-frequency = <108000000>;
148 };
149 };
150 }; 138 };
151 }; 139 };
152 140
@@ -179,3 +167,15 @@
179 marvell,function = "gpio"; 167 marvell,function = "gpio";
180 }; 168 };
181}; 169};
170
171&spi0 {
172 status = "okay";
173
174 spi-flash@0 {
175 #address-cells = <1>;
176 #size-cells = <1>;
177 compatible = "n25q128a13", "jedec,spi-nor";
178 reg = <0>; /* Chip select 0 */
179 spi-max-frequency = <108000000>;
180 };
181};
diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts
index 62422a90aeb2..075120bc3ec4 100644
--- a/arch/arm/boot/dts/armada-xp-db.dts
+++ b/arch/arm/boot/dts/armada-xp-db.dts
@@ -231,18 +231,6 @@
231 status = "okay"; 231 status = "okay";
232 }; 232 };
233 233
234 spi0: spi@10600 {
235 status = "okay";
236
237 spi-flash@0 {
238 #address-cells = <1>;
239 #size-cells = <1>;
240 compatible = "m25p64", "jedec,spi-nor";
241 reg = <0>; /* Chip select 0 */
242 spi-max-frequency = <20000000>;
243 };
244 };
245
246 nand@d0000 { 234 nand@d0000 {
247 status = "okay"; 235 status = "okay";
248 num-cs = <1>; 236 num-cs = <1>;
@@ -277,3 +265,15 @@
277 }; 265 };
278 }; 266 };
279}; 267};
268
269&spi0 {
270 status = "okay";
271
272 spi-flash@0 {
273 #address-cells = <1>;
274 #size-cells = <1>;
275 compatible = "m25p64", "jedec,spi-nor";
276 reg = <0>; /* Chip select 0 */
277 spi-max-frequency = <20000000>;
278 };
279};
diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts
index 061f4237760e..190e4eccb180 100644
--- a/arch/arm/boot/dts/armada-xp-gp.dts
+++ b/arch/arm/boot/dts/armada-xp-gp.dts
@@ -232,18 +232,6 @@
232 status = "okay"; 232 status = "okay";
233 }; 233 };
234 234
235 spi0: spi@10600 {
236 status = "okay";
237
238 spi-flash@0 {
239 #address-cells = <1>;
240 #size-cells = <1>;
241 compatible = "n25q128a13", "jedec,spi-nor";
242 reg = <0>; /* Chip select 0 */
243 spi-max-frequency = <108000000>;
244 };
245 };
246
247 bm@c0000 { 235 bm@c0000 {
248 status = "okay"; 236 status = "okay";
249 }; 237 };
@@ -262,3 +250,15 @@
262 }; 250 };
263 }; 251 };
264}; 252};
253
254&spi0 {
255 status = "okay";
256
257 spi-flash@0 {
258 #address-cells = <1>;
259 #size-cells = <1>;
260 compatible = "n25q128a13", "jedec,spi-nor";
261 reg = <0>; /* Chip select 0 */
262 spi-max-frequency = <108000000>;
263 };
264};
diff --git a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
index 7a461541ce50..076f27f22c3b 100644
--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
@@ -279,18 +279,6 @@
279 reg = <0x180000 0x780000>; /* 7.5MB */ 279 reg = <0x180000 0x780000>; /* 7.5MB */
280 }; 280 };
281 }; 281 };
282
283 spi0: spi@10600 {
284 status = "okay";
285
286 spi-flash@0 {
287 #address-cells = <1>;
288 #size-cells = <1>;
289 compatible = "everspin,mr25h256";
290 reg = <0>; /* Chip select 0 */
291 spi-max-frequency = <40000000>;
292 };
293 };
294 }; 282 };
295 }; 283 };
296 284
@@ -398,3 +386,15 @@
398 marvell,function = "gpio"; 386 marvell,function = "gpio";
399 }; 387 };
400}; 388};
389
390&spi0 {
391 status = "okay";
392
393 spi-flash@0 {
394 #address-cells = <1>;
395 #size-cells = <1>;
396 compatible = "everspin,mr25h256";
397 reg = <0>; /* Chip select 0 */
398 spi-max-frequency = <40000000>;
399 };
400};
diff --git a/arch/arm/boot/dts/armada-xp-synology-ds414.dts b/arch/arm/boot/dts/armada-xp-synology-ds414.dts
index d17dab0a6f51..ae286736b90a 100644
--- a/arch/arm/boot/dts/armada-xp-synology-ds414.dts
+++ b/arch/arm/boot/dts/armada-xp-synology-ds414.dts
@@ -110,62 +110,6 @@
110 status = "disabled"; 110 status = "disabled";
111 }; 111 };
112 112
113 spi0: spi@10600 {
114 status = "okay";
115
116 spi-flash@0 {
117 #address-cells = <1>;
118 #size-cells = <1>;
119 compatible = "micron,n25q064", "jedec,spi-nor";
120 reg = <0>; /* Chip select 0 */
121 spi-max-frequency = <20000000>;
122
123 /*
124 * Warning!
125 *
126 * Synology u-boot uses its compiled-in environment
127 * and it seems Synology did not care to change u-boot
128 * default configuration in order to allow saving a
129 * modified environment at a sensible location. So,
130 * if you do a 'saveenv' under u-boot, your modified
131 * environment will be saved at 1MB after the start
132 * of the flash, i.e. in the middle of the uImage.
133 * For that reason, it is strongly advised not to
134 * change the default environment, unless you know
135 * what you are doing.
136 */
137 partition@00000000 { /* u-boot */
138 label = "RedBoot";
139 reg = <0x00000000 0x000d0000>; /* 832KB */
140 };
141
142 partition@000c0000 { /* uImage */
143 label = "zImage";
144 reg = <0x000d0000 0x002d0000>; /* 2880KB */
145 };
146
147 partition@003a0000 { /* uInitramfs */
148 label = "rd.gz";
149 reg = <0x003a0000 0x00430000>; /* 4250KB */
150 };
151
152 partition@007d0000 { /* MAC address and serial number */
153 label = "vendor";
154 reg = <0x007d0000 0x00010000>; /* 64KB */
155 };
156
157 partition@007e0000 {
158 label = "RedBoot config";
159 reg = <0x007e0000 0x00010000>; /* 64KB */
160 };
161
162 partition@007f0000 {
163 label = "FIS directory";
164 reg = <0x007f0000 0x00010000>; /* 64KB */
165 };
166 };
167 };
168
169 i2c@11000 { 113 i2c@11000 {
170 clock-frequency = <400000>; 114 clock-frequency = <400000>;
171 status = "okay"; 115 status = "okay";
@@ -362,3 +306,59 @@
362 marvell,function = "gpio"; 306 marvell,function = "gpio";
363 }; 307 };
364}; 308};
309
310&spi0 {
311 status = "okay";
312
313 spi-flash@0 {
314 #address-cells = <1>;
315 #size-cells = <1>;
316 compatible = "micron,n25q064", "jedec,spi-nor";
317 reg = <0>; /* Chip select 0 */
318 spi-max-frequency = <20000000>;
319
320 /*
321 * Warning!
322 *
323 * Synology u-boot uses its compiled-in environment
324 * and it seems Synology did not care to change u-boot
325 * default configuration in order to allow saving a
326 * modified environment at a sensible location. So,
327 * if you do a 'saveenv' under u-boot, your modified
328 * environment will be saved at 1MB after the start
329 * of the flash, i.e. in the middle of the uImage.
330 * For that reason, it is strongly advised not to
331 * change the default environment, unless you know
332 * what you are doing.
333 */
334 partition@00000000 { /* u-boot */
335 label = "RedBoot";
336 reg = <0x00000000 0x000d0000>; /* 832KB */
337 };
338
339 partition@000c0000 { /* uImage */
340 label = "zImage";
341 reg = <0x000d0000 0x002d0000>; /* 2880KB */
342 };
343
344 partition@003a0000 { /* uInitramfs */
345 label = "rd.gz";
346 reg = <0x003a0000 0x00430000>; /* 4250KB */
347 };
348
349 partition@007d0000 { /* MAC address and serial number */
350 label = "vendor";
351 reg = <0x007d0000 0x00010000>; /* 64KB */
352 };
353
354 partition@007e0000 {
355 label = "RedBoot config";
356 reg = <0x007e0000 0x00010000>; /* 64KB */
357 };
358
359 partition@007f0000 {
360 label = "FIS directory";
361 reg = <0x007f0000 0x00010000>; /* 64KB */
362 };
363 };
364};
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index 553349c07f28..4a5f99e65b51 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -84,19 +84,6 @@
84 wt-override; 84 wt-override;
85 }; 85 };
86 86
87 spi0: spi@10600 {
88 compatible = "marvell,armada-xp-spi",
89 "marvell,orion-spi";
90 pinctrl-0 = <&spi0_pins>;
91 pinctrl-names = "default";
92 };
93
94 spi1: spi@10680 {
95 compatible = "marvell,armada-xp-spi",
96 "marvell,orion-spi";
97 };
98
99
100 i2c0: i2c@11000 { 87 i2c0: i2c@11000 {
101 compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; 88 compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
102 reg = <0x11000 0x100>; 89 reg = <0x11000 0x100>;
@@ -362,6 +349,12 @@
362 marvell,function = "spi0"; 349 marvell,function = "spi0";
363 }; 350 };
364 351
352 spi1_pins: spi1-pins {
353 marvell,pins = "mpp13", "mpp14",
354 "mpp16", "mpp17";
355 marvell,function = "spi1";
356 };
357
365 uart2_pins: uart2-pins { 358 uart2_pins: uart2-pins {
366 marvell,pins = "mpp42", "mpp43"; 359 marvell,pins = "mpp42", "mpp43";
367 marvell,function = "uart2"; 360 marvell,function = "uart2";
@@ -372,3 +365,15 @@
372 marvell,function = "uart3"; 365 marvell,function = "uart3";
373 }; 366 };
374}; 367};
368
369&spi0 {
370 compatible = "marvell,armada-xp-spi", "marvell,orion-spi";
371 pinctrl-0 = <&spi0_pins>;
372 pinctrl-names = "default";
373};
374
375&spi1 {
376 compatible = "marvell,armada-xp-spi", "marvell,orion-spi";
377 pinctrl-0 = <&spi1_pins>;
378 pinctrl-names = "default";
379};
diff --git a/arch/arm/boot/dts/kirkwood-openblocks_a6.dts b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
index 0db0e3edc88f..94e49f32d5f9 100644
--- a/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
+++ b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
@@ -41,7 +41,7 @@
41 }; 41 };
42 42
43 pinctrl: pin-controller@10000 { 43 pinctrl: pin-controller@10000 {
44 pinctrl-0 = <&pmx_dip_switches &pmx_gpio_header>; 44 pinctrl-0 = <&pmx_dip_switches>;
45 pinctrl-names = "default"; 45 pinctrl-names = "default";
46 46
47 pmx_uart0: pmx-uart0 { 47 pmx_uart0: pmx-uart0 {
@@ -174,3 +174,10 @@
174 phy-handle = <&ethphy0>; 174 phy-handle = <&ethphy0>;
175 }; 175 };
176}; 176};
177
178&gpio0 {
179 status = "okay";
180
181 pinctrl-0 = <&pmx_gpio_header>;
182 pinctrl-names = "default";
183};
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-22 00:35:16 -0400