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authorTony Lindgren <tony@atomide.com>2015-01-21 19:21:52 -0500
committerTony Lindgren <tony@atomide.com>2015-01-28 12:06:18 -0500
commit72d032266b630e29ef97fc01a6cb1e15d7a20d4c (patch)
treed4c857d9eeff1c815679e37d09c300de104bc894
parent1e1e8cb3fa819ba94e1e505572dd8fff646f4294 (diff)
ARM: dts: Fix dm816x pinctrl and syscon so they are children of SCM
Looks like I only got half done with moving pinctrl and syscon to be children of the SCM. I've set up the FAPLL clocks that way already, but did not complete the job as I copied the syscon values from am33xx.dtsi. To make sure the syscon mapping works, I've verfified that we can set up davinci_emac mac address the same way as cpsw already does with the syscon mapping. So let's add that too. Cc: Brian Hutchinson <b.hutchman@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r--arch/arm/boot/dts/dm816x.dtsi35
1 files changed, 20 insertions, 15 deletions
diff --git a/arch/arm/boot/dts/dm816x.dtsi b/arch/arm/boot/dts/dm816x.dtsi
index 7adac097a71c..d98d0f7de380 100644
--- a/arch/arm/boot/dts/dm816x.dtsi
+++ b/arch/arm/boot/dts/dm816x.dtsi
@@ -50,15 +50,6 @@
50 }; 50 };
51 }; 51 };
52 52
53 dm816x_pinmux: pinmux@44e10800 {
54 compatible = "pinctrl-single";
55 reg = <0x48140800 0x50a>;
56 #address-cells = <1>;
57 #size-cells = <0>;
58 pinctrl-single,register-width = <16>;
59 pinctrl-single,function-mask = <0xf>;
60 };
61
62 /* 53 /*
63 * XXX: Use a flat representation of the dm816x interconnect. 54 * XXX: Use a flat representation of the dm816x interconnect.
64 * The real dm816x interconnect network is quite complex. Since 55 * The real dm816x interconnect network is quite complex. Since
@@ -89,12 +80,29 @@
89 }; 80 };
90 81
91 scrm: scrm@48140000 { 82 scrm: scrm@48140000 {
92 compatible = "ti,dm816-scrm"; 83 compatible = "ti,dm816-scrm", "simple-bus";
93 reg = <0x48140000 0x21000>; 84 reg = <0x48140000 0x21000>;
94 #address-cells = <1>; 85 #address-cells = <1>;
95 #size-cells = <1>; 86 #size-cells = <1>;
96 ranges = <0 0x48140000 0x21000>; 87 ranges = <0 0x48140000 0x21000>;
97 88
89 dm816x_pinmux: pinmux@800 {
90 compatible = "pinctrl-single";
91 reg = <0x800 0x50a>;
92 #address-cells = <1>;
93 #size-cells = <0>;
94 pinctrl-single,register-width = <16>;
95 pinctrl-single,function-mask = <0xf>;
96 };
97
98 /* Device Configuration Registers */
99 scm_conf: syscon@600 {
100 compatible = "syscon";
101 reg = <0x600 0x110>;
102 #address-cells = <1>;
103 #size-cells = <1>;
104 };
105
98 scrm_clocks: clocks { 106 scrm_clocks: clocks {
99 #address-cells = <1>; 107 #address-cells = <1>;
100 #size-cells = <0>; 108 #size-cells = <0>;
@@ -104,11 +112,6 @@
104 }; 112 };
105 }; 113 };
106 114
107 cm: syscon@44e10000 {
108 compatible = "ti,am33xx-controlmodule", "syscon";
109 reg = <0x44e10000 0x800>;
110 };
111
112 edma: edma@49000000 { 115 edma: edma@49000000 {
113 compatible = "ti,edma3"; 116 compatible = "ti,edma3";
114 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2", "tptc3"; 117 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2", "tptc3";
@@ -213,6 +216,7 @@
213 reg = <0x4a100000 0x800 216 reg = <0x4a100000 0x800
214 0x4a100900 0x3700>; 217 0x4a100900 0x3700>;
215 clocks = <&sysclk24_ck>; 218 clocks = <&sysclk24_ck>;
219 syscon = <&scm_conf>;
216 ti,davinci-ctrl-reg-offset = <0>; 220 ti,davinci-ctrl-reg-offset = <0>;
217 ti,davinci-ctrl-mod-reg-offset = <0x900>; 221 ti,davinci-ctrl-mod-reg-offset = <0x900>;
218 ti,davinci-ctrl-ram-offset = <0x2000>; 222 ti,davinci-ctrl-ram-offset = <0x2000>;
@@ -226,6 +230,7 @@
226 ti,hwmods = "emac1"; 230 ti,hwmods = "emac1";
227 reg = <0x4a120000 0x4000>; 231 reg = <0x4a120000 0x4000>;
228 clocks = <&sysclk24_ck>; 232 clocks = <&sysclk24_ck>;
233 syscon = <&scm_conf>;
229 ti,davinci-ctrl-reg-offset = <0>; 234 ti,davinci-ctrl-reg-offset = <0>;
230 ti,davinci-ctrl-mod-reg-offset = <0x900>; 235 ti,davinci-ctrl-mod-reg-offset = <0x900>;
231 ti,davinci-ctrl-ram-offset = <0x2000>; 236 ti,davinci-ctrl-ram-offset = <0x2000>;