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authorAndrew Duggan <aduggan@synaptics.com>2015-07-10 15:48:21 -0400
committerJiri Kosina <jkosina@suse.com>2015-07-13 07:13:56 -0400
commit7035f3a4e2444490d461f8b17c2275d61fefd980 (patch)
treeb87d75849a5f56badb61dcaacfb73bf7ae591071
parent0925636042170e0b6716cd86635899c5f4258f69 (diff)
HID: rmi: Write updated F11 control registers after reset
When a device is reset the values of control registers will be reset to the defaults. This patch reapplies the control register values set for F11 by the driver. Signed-off-by: Andrew Duggan <aduggan@synaptics.com> Tested-by: Gabriele Mazzotta <gabriele.mzt@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.com>
-rw-r--r--drivers/hid/hid-rmi.c56
1 files changed, 43 insertions, 13 deletions
diff --git a/drivers/hid/hid-rmi.c b/drivers/hid/hid-rmi.c
index af191a265b80..9a792e725ea3 100644
--- a/drivers/hid/hid-rmi.c
+++ b/drivers/hid/hid-rmi.c
@@ -40,6 +40,14 @@
40#define RMI_DEVICE BIT(0) 40#define RMI_DEVICE BIT(0)
41#define RMI_DEVICE_HAS_PHYS_BUTTONS BIT(1) 41#define RMI_DEVICE_HAS_PHYS_BUTTONS BIT(1)
42 42
43/*
44 * retrieve the ctrl registers
45 * the ctrl register has a size of 20 but a fw bug split it into 16 + 4,
46 * and there is no way to know if the first 20 bytes are here or not.
47 * We use only the first 12 bytes, so get only them.
48 */
49#define RMI_F11_CTRL_REG_COUNT 12
50
43enum rmi_mode_type { 51enum rmi_mode_type {
44 RMI_MODE_OFF = 0, 52 RMI_MODE_OFF = 0,
45 RMI_MODE_ATTN_REPORTS = 1, 53 RMI_MODE_ATTN_REPORTS = 1,
@@ -116,6 +124,8 @@ struct rmi_data {
116 unsigned int max_y; 124 unsigned int max_y;
117 unsigned int x_size_mm; 125 unsigned int x_size_mm;
118 unsigned int y_size_mm; 126 unsigned int y_size_mm;
127 bool read_f11_ctrl_regs;
128 u8 f11_ctrl_regs[RMI_F11_CTRL_REG_COUNT];
119 129
120 unsigned int gpio_led_count; 130 unsigned int gpio_led_count;
121 unsigned int button_count; 131 unsigned int button_count;
@@ -557,6 +567,18 @@ static int rmi_set_sleep_mode(struct hid_device *hdev, int sleep_mode)
557 567
558static int rmi_suspend(struct hid_device *hdev, pm_message_t message) 568static int rmi_suspend(struct hid_device *hdev, pm_message_t message)
559{ 569{
570 struct rmi_data *data = hid_get_drvdata(hdev);
571 int ret;
572 u8 buf[RMI_F11_CTRL_REG_COUNT];
573
574 ret = rmi_read_block(hdev, data->f11.control_base_addr, buf,
575 RMI_F11_CTRL_REG_COUNT);
576 if (ret)
577 hid_warn(hdev, "can not read F11 control registers\n");
578 else
579 memcpy(data->f11_ctrl_regs, buf, RMI_F11_CTRL_REG_COUNT);
580
581
560 if (!device_may_wakeup(hdev->dev.parent)) 582 if (!device_may_wakeup(hdev->dev.parent))
561 return rmi_set_sleep_mode(hdev, RMI_SLEEP_DEEP_SLEEP); 583 return rmi_set_sleep_mode(hdev, RMI_SLEEP_DEEP_SLEEP);
562 584
@@ -565,6 +587,7 @@ static int rmi_suspend(struct hid_device *hdev, pm_message_t message)
565 587
566static int rmi_post_reset(struct hid_device *hdev) 588static int rmi_post_reset(struct hid_device *hdev)
567{ 589{
590 struct rmi_data *data = hid_get_drvdata(hdev);
568 int ret; 591 int ret;
569 592
570 ret = rmi_set_mode(hdev, RMI_MODE_ATTN_REPORTS); 593 ret = rmi_set_mode(hdev, RMI_MODE_ATTN_REPORTS);
@@ -573,6 +596,14 @@ static int rmi_post_reset(struct hid_device *hdev)
573 return ret; 596 return ret;
574 } 597 }
575 598
599 if (data->read_f11_ctrl_regs) {
600 ret = rmi_write_block(hdev, data->f11.control_base_addr,
601 data->f11_ctrl_regs, RMI_F11_CTRL_REG_COUNT);
602 if (ret)
603 hid_warn(hdev,
604 "can not write F11 control registers after reset\n");
605 }
606
576 if (!device_may_wakeup(hdev->dev.parent)) { 607 if (!device_may_wakeup(hdev->dev.parent)) {
577 ret = rmi_set_sleep_mode(hdev, RMI_SLEEP_NORMAL); 608 ret = rmi_set_sleep_mode(hdev, RMI_SLEEP_NORMAL);
578 if (ret) { 609 if (ret) {
@@ -957,24 +988,23 @@ static int rmi_populate_f11(struct hid_device *hdev)
957 if (has_data40) 988 if (has_data40)
958 data->f11.report_size += data->max_fingers * 2; 989 data->f11.report_size += data->max_fingers * 2;
959 990
960 /* 991 ret = rmi_read_block(hdev, data->f11.control_base_addr,
961 * retrieve the ctrl registers 992 data->f11_ctrl_regs, RMI_F11_CTRL_REG_COUNT);
962 * the ctrl register has a size of 20 but a fw bug split it into 16 + 4,
963 * and there is no way to know if the first 20 bytes are here or not.
964 * We use only the first 12 bytes, so get only them.
965 */
966 ret = rmi_read_block(hdev, data->f11.control_base_addr, buf, 12);
967 if (ret) { 993 if (ret) {
968 hid_err(hdev, "can not read ctrl block of size 11: %d.\n", ret); 994 hid_err(hdev, "can not read ctrl block of size 11: %d.\n", ret);
969 return ret; 995 return ret;
970 } 996 }
971 997
972 data->max_x = buf[6] | (buf[7] << 8); 998 /* data->f11_ctrl_regs now contains valid register data */
973 data->max_y = buf[8] | (buf[9] << 8); 999 data->read_f11_ctrl_regs = true;
1000
1001 data->max_x = data->f11_ctrl_regs[6] | (data->f11_ctrl_regs[7] << 8);
1002 data->max_y = data->f11_ctrl_regs[8] | (data->f11_ctrl_regs[9] << 8);
974 1003
975 if (has_dribble) { 1004 if (has_dribble) {
976 buf[0] = buf[0] & ~BIT(6); 1005 data->f11_ctrl_regs[0] = data->f11_ctrl_regs[0] & ~BIT(6);
977 ret = rmi_write(hdev, data->f11.control_base_addr, buf); 1006 ret = rmi_write(hdev, data->f11.control_base_addr,
1007 data->f11_ctrl_regs);
978 if (ret) { 1008 if (ret) {
979 hid_err(hdev, "can not write to control reg 0: %d.\n", 1009 hid_err(hdev, "can not write to control reg 0: %d.\n",
980 ret); 1010 ret);
@@ -983,9 +1013,9 @@ static int rmi_populate_f11(struct hid_device *hdev)
983 } 1013 }
984 1014
985 if (has_palm_detect) { 1015 if (has_palm_detect) {
986 buf[11] = buf[11] & ~BIT(0); 1016 data->f11_ctrl_regs[11] = data->f11_ctrl_regs[11] & ~BIT(0);
987 ret = rmi_write(hdev, data->f11.control_base_addr + 11, 1017 ret = rmi_write(hdev, data->f11.control_base_addr + 11,
988 &buf[11]); 1018 &data->f11_ctrl_regs[11]);
989 if (ret) { 1019 if (ret) {
990 hid_err(hdev, "can not write to control reg 11: %d.\n", 1020 hid_err(hdev, "can not write to control reg 11: %d.\n",
991 ret); 1021 ret);