diff options
author | Romain Perier <romain.perier@collabora.com> | 2017-09-04 04:51:19 -0400 |
---|---|---|
committer | Heiko Stuebner <heiko@sntech.de> | 2017-10-24 09:25:27 -0400 |
commit | 6f8c539313d884f4715b328e1ce4a3987649b97e (patch) | |
tree | d1b701bd908b8c5ac156f7cbbec0e81a545927bb | |
parent | c1cf6e1a20b79dc29f05ece99f4c1d219af1eb6c (diff) |
arm64: dts: rockchip: add efuse for RK3368 SoCs
This adds the definition for eFuse that is found on RK3368 SoCs with the
corresponding data cells.
Signed-off-by: Romain Perier <romain.perier@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3368.dtsi | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index e0518b4bc6c2..fffcc61e1c89 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi | |||
@@ -854,6 +854,22 @@ | |||
854 | status = "disabled"; | 854 | status = "disabled"; |
855 | }; | 855 | }; |
856 | 856 | ||
857 | efuse256: efuse@ffb00000 { | ||
858 | compatible = "rockchip,rk3368-efuse"; | ||
859 | reg = <0x0 0xffb00000 0x0 0x20>; | ||
860 | #address-cells = <1>; | ||
861 | #size-cells = <1>; | ||
862 | clocks = <&cru PCLK_EFUSE256>; | ||
863 | clock-names = "pclk_efuse"; | ||
864 | |||
865 | cpu_leakage: cpu-leakage@17 { | ||
866 | reg = <0x17 0x1>; | ||
867 | }; | ||
868 | temp_adjust: temp-adjust@1f { | ||
869 | reg = <0x1f 0x1>; | ||
870 | }; | ||
871 | }; | ||
872 | |||
857 | gic: interrupt-controller@ffb71000 { | 873 | gic: interrupt-controller@ffb71000 { |
858 | compatible = "arm,gic-400"; | 874 | compatible = "arm,gic-400"; |
859 | interrupt-controller; | 875 | interrupt-controller; |