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authorLucas Stach <l.stach@pengutronix.de>2015-09-21 12:53:59 -0400
committerShawn Guo <shawnguo@kernel.org>2015-09-26 00:58:50 -0400
commit6f1871316347a5ef098d85305d5eb5ac6ac1f52a (patch)
tree22f185dea27975a984370ea62b2c6088db79150d
parent517c7f9302efdde86fe8ebca80bc9ef826fa62e5 (diff)
clk: imx27: retain early UART clocks during kernel init
Make sure to keep UART clocks enabled during kernel init if earlyprintk or earlycon are active. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-rw-r--r--drivers/clk/imx/clk-imx27.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/clk/imx/clk-imx27.c b/drivers/clk/imx/clk-imx27.c
index d9d50d54ef2a..0d7b8df04dfa 100644
--- a/drivers/clk/imx/clk-imx27.c
+++ b/drivers/clk/imx/clk-imx27.c
@@ -47,6 +47,17 @@ static const char *ssi_sel_clks[] = { "spll_gate", "mpll", };
47static struct clk *clk[IMX27_CLK_MAX]; 47static struct clk *clk[IMX27_CLK_MAX];
48static struct clk_onecell_data clk_data; 48static struct clk_onecell_data clk_data;
49 49
50static struct clk ** const uart_clks[] __initconst = {
51 &clk[IMX27_CLK_PER1_GATE],
52 &clk[IMX27_CLK_UART1_IPG_GATE],
53 &clk[IMX27_CLK_UART2_IPG_GATE],
54 &clk[IMX27_CLK_UART3_IPG_GATE],
55 &clk[IMX27_CLK_UART4_IPG_GATE],
56 &clk[IMX27_CLK_UART5_IPG_GATE],
57 &clk[IMX27_CLK_UART6_IPG_GATE],
58 NULL
59};
60
50static void __init _mx27_clocks_init(unsigned long fref) 61static void __init _mx27_clocks_init(unsigned long fref)
51{ 62{
52 BUG_ON(!ccm); 63 BUG_ON(!ccm);
@@ -163,6 +174,8 @@ static void __init _mx27_clocks_init(unsigned long fref)
163 174
164 clk_prepare_enable(clk[IMX27_CLK_EMI_AHB_GATE]); 175 clk_prepare_enable(clk[IMX27_CLK_EMI_AHB_GATE]);
165 176
177 imx_register_uart_clocks(uart_clks);
178
166 imx_print_silicon_rev("i.MX27", mx27_revision()); 179 imx_print_silicon_rev("i.MX27", mx27_revision());
167} 180}
168 181