diff options
author | Archit Taneja <architt@codeaurora.org> | 2015-12-01 01:18:15 -0500 |
---|---|---|
committer | Rob Clark <robdclark@gmail.com> | 2015-12-14 11:49:24 -0500 |
commit | 6dc1341044952004daeb10212b685c180fb7780a (patch) | |
tree | 817abbccbac4bf50b9064ae263b520c93e39f4ce | |
parent | 60834ca112f6cac9027ec830bcbd24ec0961175e (diff) |
dt-bindings: msm/dsi: Add DSIv2 documentation
Add additional property info needed for DSIv2 DT.
Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
-rw-r--r-- | Documentation/devicetree/bindings/display/msm/dsi.txt | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/display/msm/dsi.txt b/Documentation/devicetree/bindings/display/msm/dsi.txt index e097955516f0..e7423bea1424 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi.txt +++ b/Documentation/devicetree/bindings/display/msm/dsi.txt | |||
@@ -21,10 +21,13 @@ Required properties: | |||
21 | * "byte_clk" | 21 | * "byte_clk" |
22 | * "pixel_clk" | 22 | * "pixel_clk" |
23 | * "core_clk" | 23 | * "core_clk" |
24 | For DSIv2, we need an additional clock: | ||
25 | * "src_clk" | ||
24 | - vdd-supply: phandle to vdd regulator device node | 26 | - vdd-supply: phandle to vdd regulator device node |
25 | - vddio-supply: phandle to vdd-io regulator device node | 27 | - vddio-supply: phandle to vdd-io regulator device node |
26 | - vdda-supply: phandle to vdda regulator device node | 28 | - vdda-supply: phandle to vdda regulator device node |
27 | - qcom,dsi-phy: phandle to DSI PHY device node | 29 | - qcom,dsi-phy: phandle to DSI PHY device node |
30 | - syscon-sfpb: A phandle to mmss_sfpb syscon node (only for DSIv2) | ||
28 | 31 | ||
29 | Optional properties: | 32 | Optional properties: |
30 | - panel@0: Node of panel connected to this DSI controller. | 33 | - panel@0: Node of panel connected to this DSI controller. |
@@ -51,6 +54,7 @@ Required properties: | |||
51 | * "qcom,dsi-phy-28nm-hpm" | 54 | * "qcom,dsi-phy-28nm-hpm" |
52 | * "qcom,dsi-phy-28nm-lp" | 55 | * "qcom,dsi-phy-28nm-lp" |
53 | * "qcom,dsi-phy-20nm" | 56 | * "qcom,dsi-phy-20nm" |
57 | * "qcom,dsi-phy-28nm-8960" | ||
54 | - reg: Physical base address and length of the registers of PLL, PHY and PHY | 58 | - reg: Physical base address and length of the registers of PLL, PHY and PHY |
55 | regulator | 59 | regulator |
56 | - reg-names: The names of register regions. The following regions are required: | 60 | - reg-names: The names of register regions. The following regions are required: |