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authorAndre Przywara <andre.przywara@arm.com>2017-11-25 07:01:59 -0500
committerMaxime Ripard <maxime.ripard@free-electrons.com>2017-11-27 03:23:28 -0500
commit6d84b6c9c624db16920091f9e1558948e1446bb7 (patch)
tree97df3355b8ea08c17e9bf49ca8621ba14b598cbc
parente570101031837151dc92acf45a707bc3c3d92cc7 (diff)
arm64: dts: allwinner: H5: remove redundant MMC0 card detect pin
PF6 is mostly used as the CD pin for the microSD slot on H5 based boards. So far we were referencing this pin twice: once using the mmc0_cd_pin phandle, and then again directly as a GPIO via the pinctrl phandle. This will cause problems if the pinctrl driver enables strict mode, as the second request will fail now, leading to a driver init failure. Remove the redundant pin reference via the mmc0_cd_pin phandle. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reported-by: Chris Obbard <obbardc@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts2
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts2
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts2
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts2
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts2
5 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
index 7c028af58f47..ea1101293892 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
@@ -135,7 +135,7 @@
135 135
136&mmc0 { 136&mmc0 {
137 pinctrl-names = "default"; 137 pinctrl-names = "default";
138 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; 138 pinctrl-0 = <&mmc0_pins_a>;
139 vmmc-supply = <&reg_vcc3v3>; 139 vmmc-supply = <&reg_vcc3v3>;
140 bus-width = <4>; 140 bus-width = <4>;
141 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 141 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
index 6eb8092d8e57..f1447003ea3c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
@@ -127,7 +127,7 @@
127 127
128&mmc0 { 128&mmc0 {
129 pinctrl-names = "default"; 129 pinctrl-names = "default";
130 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; 130 pinctrl-0 = <&mmc0_pins_a>;
131 vmmc-supply = <&reg_vcc3v3>; 131 vmmc-supply = <&reg_vcc3v3>;
132 bus-width = <4>; 132 bus-width = <4>;
133 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 133 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
index a0ca925175aa..9e51d3a5f4e6 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
@@ -161,7 +161,7 @@
161 161
162&mmc0 { 162&mmc0 {
163 pinctrl-names = "default"; 163 pinctrl-names = "default";
164 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; 164 pinctrl-0 = <&mmc0_pins_a>;
165 vmmc-supply = <&reg_vcc3v3>; 165 vmmc-supply = <&reg_vcc3v3>;
166 bus-width = <4>; 166 bus-width = <4>;
167 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 167 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
index b47790650144..0f25c4a6f15d 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
@@ -168,7 +168,7 @@
168 168
169&mmc0 { 169&mmc0 {
170 pinctrl-names = "default"; 170 pinctrl-names = "default";
171 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; 171 pinctrl-0 = <&mmc0_pins_a>;
172 vmmc-supply = <&reg_vcc3v3>; 172 vmmc-supply = <&reg_vcc3v3>;
173 bus-width = <4>; 173 bus-width = <4>;
174 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 174 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
index ddc4d7071a01..d34939909b9f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
@@ -75,7 +75,7 @@
75 75
76&mmc0 { 76&mmc0 {
77 pinctrl-names = "default"; 77 pinctrl-names = "default";
78 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; 78 pinctrl-0 = <&mmc0_pins_a>;
79 vmmc-supply = <&reg_vcc3v3>; 79 vmmc-supply = <&reg_vcc3v3>;
80 bus-width = <4>; 80 bus-width = <4>;
81 cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; 81 cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;