diff options
author | Neil Armstrong <narmstrong@baylibre.com> | 2016-04-01 10:16:14 -0400 |
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committer | Philipp Zabel <p.zabel@pengutronix.de> | 2016-04-01 10:32:05 -0400 |
commit | 6cf151fc53aeaa7757d3b9ab608bb7e51154de06 (patch) | |
tree | 24dbb7fbd01d101e86905087c3a4040243fea9d6 | |
parent | 6e667fac8259d0dd2cf883fa3c51c0b8b8c89a90 (diff) |
dt-bindings: Add Oxford Semiconductor Reset Controller bindings
Add bindings for the Oxford Semiconductor OXNAS reset controller.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
-rw-r--r-- | Documentation/devicetree/bindings/reset/oxnas,reset.txt | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/reset/oxnas,reset.txt b/Documentation/devicetree/bindings/reset/oxnas,reset.txt new file mode 100644 index 000000000000..6f06db930030 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/oxnas,reset.txt | |||
@@ -0,0 +1,58 @@ | |||
1 | Oxford Semiconductor OXNAS SoC Family RESET Controller | ||
2 | ================================================ | ||
3 | |||
4 | Please also refer to reset.txt in this directory for common reset | ||
5 | controller binding usage. | ||
6 | |||
7 | Required properties: | ||
8 | - compatible: Should be "oxsemi,ox810se-reset" | ||
9 | - #reset-cells: 1, see below | ||
10 | |||
11 | Parent node should have the following properties : | ||
12 | - compatible: Should be "oxsemi,ox810se-sys-ctrl", "syscon", "simple-mfd" | ||
13 | |||
14 | For OX810SE, the indices are : | ||
15 | - 0 : ARM | ||
16 | - 1 : COPRO | ||
17 | - 2 : Reserved | ||
18 | - 3 : Reserved | ||
19 | - 4 : USBHS | ||
20 | - 5 : USBHSPHY | ||
21 | - 6 : MAC | ||
22 | - 7 : PCI | ||
23 | - 8 : DMA | ||
24 | - 9 : DPE | ||
25 | - 10 : DDR | ||
26 | - 11 : SATA | ||
27 | - 12 : SATA_LINK | ||
28 | - 13 : SATA_PHY | ||
29 | - 14 : Reserved | ||
30 | - 15 : NAND | ||
31 | - 16 : GPIO | ||
32 | - 17 : UART1 | ||
33 | - 18 : UART2 | ||
34 | - 19 : MISC | ||
35 | - 20 : I2S | ||
36 | - 21 : AHB_MON | ||
37 | - 22 : UART3 | ||
38 | - 23 : UART4 | ||
39 | - 24 : SGDMA | ||
40 | - 25 : Reserved | ||
41 | - 26 : Reserved | ||
42 | - 27 : Reserved | ||
43 | - 28 : Reserved | ||
44 | - 29 : Reserved | ||
45 | - 30 : Reserved | ||
46 | - 31 : BUS | ||
47 | |||
48 | example: | ||
49 | |||
50 | sys: sys-ctrl@000000 { | ||
51 | compatible = "oxsemi,ox810se-sys-ctrl", "syscon", "simple-mfd"; | ||
52 | reg = <0x000000 0x100000>; | ||
53 | |||
54 | reset: reset-controller { | ||
55 | compatible = "oxsemi,ox810se-reset"; | ||
56 | #reset-cells = <1>; | ||
57 | }; | ||
58 | }; | ||