aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorArnd Bergmann <arnd@arndb.de>2018-10-11 09:27:55 -0400
committerArnd Bergmann <arnd@arndb.de>2018-10-11 09:28:31 -0400
commit6ba3f37f6223ceacf17240c849a5a489fc4adb0b (patch)
treed17a6a824dbe91592eb37d0269fb4fc78f353eee
parent5220a73a409d9d31b42aa6624d5e901a612ec584 (diff)
parent6862fdf2201ab67cd962dbf0643d37db909f4860 (diff)
Merge tag 'samsung-soc-4.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/soc
Samsung mach/soc changes for v4.20, second round 1. Disable SAMSUNG_PM_CHECK Kconfig feature incompatible with Exynos. * tag 'samsung-soc-4.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: samsung: Limit SAMSUNG_PM_CHECK config option to non-Exynos platforms ARM: s3c24xx: Restore proper usage of pr_info/pr_cont ARM: s3c24xx: Correct SD card write protect detection on Mini2440 ARM: s3c24xx: Consistently use tab for indenting member assignments ARM: s3c24xx: formatting cleanup in mach-mini2440.c ARM: s3c24xx: Remove empty gta02_pmu children probe ARM: exynos: Fix imprecise abort during Exynos5422 suspend to RAM ARM: exynos: Store Exynos5420 register state in one variable Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r--Documentation/arm/Samsung/Bootloader-interface.txt1
-rw-r--r--arch/arm/mach-exynos/common.h1
-rw-r--r--arch/arm/mach-exynos/firmware.c14
-rw-r--r--arch/arm/mach-exynos/suspend.c34
-rw-r--r--arch/arm/mach-s3c24xx/mach-gta02.c42
-rw-r--r--arch/arm/mach-s3c24xx/mach-mini2440.c113
-rw-r--r--arch/arm/plat-samsung/Kconfig2
7 files changed, 98 insertions, 109 deletions
diff --git a/Documentation/arm/Samsung/Bootloader-interface.txt b/Documentation/arm/Samsung/Bootloader-interface.txt
index ed494ac0beb2..d17ed518a7ea 100644
--- a/Documentation/arm/Samsung/Bootloader-interface.txt
+++ b/Documentation/arm/Samsung/Bootloader-interface.txt
@@ -26,6 +26,7 @@ Offset Value Purpose
260x20 0xfcba0d10 (Magic cookie) AFTR 260x20 0xfcba0d10 (Magic cookie) AFTR
270x24 exynos_cpu_resume_ns AFTR 270x24 exynos_cpu_resume_ns AFTR
280x28 + 4*cpu 0x8 (Magic cookie, Exynos3250) AFTR 280x28 + 4*cpu 0x8 (Magic cookie, Exynos3250) AFTR
290x28 0x0 or last value during resume (Exynos542x) System suspend
29 30
30 31
312. Secure mode 322. Secure mode
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index dcd21bb95e3b..f96730cce6e8 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -110,6 +110,7 @@ void exynos_firmware_init(void);
110#define EXYNOS_SLEEP_MAGIC 0x00000bad 110#define EXYNOS_SLEEP_MAGIC 0x00000bad
111#define EXYNOS_AFTR_MAGIC 0xfcba0d10 111#define EXYNOS_AFTR_MAGIC 0xfcba0d10
112 112
113bool __init exynos_secure_firmware_available(void);
113void exynos_set_boot_flag(unsigned int cpu, unsigned int mode); 114void exynos_set_boot_flag(unsigned int cpu, unsigned int mode);
114void exynos_clear_boot_flag(unsigned int cpu, unsigned int mode); 115void exynos_clear_boot_flag(unsigned int cpu, unsigned int mode);
115 116
diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
index be1f20fe28f4..d602e3bf3f96 100644
--- a/arch/arm/mach-exynos/firmware.c
+++ b/arch/arm/mach-exynos/firmware.c
@@ -185,7 +185,7 @@ static void exynos_l2_configure(const struct l2x0_regs *regs)
185 exynos_smc(SMC_CMD_L2X0SETUP2, regs->pwr_ctrl, regs->aux_ctrl, 0); 185 exynos_smc(SMC_CMD_L2X0SETUP2, regs->pwr_ctrl, regs->aux_ctrl, 0);
186} 186}
187 187
188void __init exynos_firmware_init(void) 188bool __init exynos_secure_firmware_available(void)
189{ 189{
190 struct device_node *nd; 190 struct device_node *nd;
191 const __be32 *addr; 191 const __be32 *addr;
@@ -193,14 +193,22 @@ void __init exynos_firmware_init(void)
193 nd = of_find_compatible_node(NULL, NULL, 193 nd = of_find_compatible_node(NULL, NULL,
194 "samsung,secure-firmware"); 194 "samsung,secure-firmware");
195 if (!nd) 195 if (!nd)
196 return; 196 return false;
197 197
198 addr = of_get_address(nd, 0, NULL, NULL); 198 addr = of_get_address(nd, 0, NULL, NULL);
199 if (!addr) { 199 if (!addr) {
200 pr_err("%s: No address specified.\n", __func__); 200 pr_err("%s: No address specified.\n", __func__);
201 return; 201 return false;
202 } 202 }
203 203
204 return true;
205}
206
207void __init exynos_firmware_init(void)
208{
209 if (!exynos_secure_firmware_available())
210 return;
211
204 pr_info("Running under secure firmware.\n"); 212 pr_info("Running under secure firmware.\n");
205 213
206 register_firmware_ops(&exynos_firmware_ops); 214 register_firmware_ops(&exynos_firmware_ops);
diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c
index 7ead3acd6fa4..bb8e3985acdb 100644
--- a/arch/arm/mach-exynos/suspend.c
+++ b/arch/arm/mach-exynos/suspend.c
@@ -59,10 +59,15 @@ struct exynos_pm_data {
59 int (*cpu_suspend)(unsigned long); 59 int (*cpu_suspend)(unsigned long);
60}; 60};
61 61
62static const struct exynos_pm_data *pm_data __ro_after_init; 62/* Used only on Exynos542x/5800 */
63struct exynos_pm_state {
64 int cpu_state;
65 unsigned int pmu_spare3;
66 void __iomem *sysram_base;
67};
63 68
64static int exynos5420_cpu_state; 69static const struct exynos_pm_data *pm_data __ro_after_init;
65static unsigned int exynos_pmu_spare3; 70static struct exynos_pm_state pm_state;
66 71
67/* 72/*
68 * GIC wake-up support 73 * GIC wake-up support
@@ -257,7 +262,7 @@ static int exynos5420_cpu_suspend(unsigned long arg)
257 unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); 262 unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
258 unsigned int cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); 263 unsigned int cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
259 264
260 writel_relaxed(0x0, sysram_base_addr + EXYNOS5420_CPU_STATE); 265 writel_relaxed(0x0, pm_state.sysram_base + EXYNOS5420_CPU_STATE);
261 266
262 if (IS_ENABLED(CONFIG_EXYNOS5420_MCPM)) { 267 if (IS_ENABLED(CONFIG_EXYNOS5420_MCPM)) {
263 mcpm_set_entry_vector(cpu, cluster, exynos_cpu_resume); 268 mcpm_set_entry_vector(cpu, cluster, exynos_cpu_resume);
@@ -321,7 +326,7 @@ static void exynos5420_pm_prepare(void)
321 /* Set wake-up mask registers */ 326 /* Set wake-up mask registers */
322 exynos_pm_set_wakeup_mask(); 327 exynos_pm_set_wakeup_mask();
323 328
324 exynos_pmu_spare3 = pmu_raw_readl(S5P_PMU_SPARE3); 329 pm_state.pmu_spare3 = pmu_raw_readl(S5P_PMU_SPARE3);
325 /* 330 /*
326 * The cpu state needs to be saved and restored so that the 331 * The cpu state needs to be saved and restored so that the
327 * secondary CPUs will enter low power start. Though the U-Boot 332 * secondary CPUs will enter low power start. Though the U-Boot
@@ -329,8 +334,8 @@ static void exynos5420_pm_prepare(void)
329 * needs to restore it back in case, the primary cpu fails to 334 * needs to restore it back in case, the primary cpu fails to
330 * suspend for any reason. 335 * suspend for any reason.
331 */ 336 */
332 exynos5420_cpu_state = readl_relaxed(sysram_base_addr + 337 pm_state.cpu_state = readl_relaxed(pm_state.sysram_base +
333 EXYNOS5420_CPU_STATE); 338 EXYNOS5420_CPU_STATE);
334 339
335 exynos_pm_enter_sleep_mode(); 340 exynos_pm_enter_sleep_mode();
336 341
@@ -448,8 +453,8 @@ static void exynos5420_pm_resume(void)
448 EXYNOS5_ARM_CORE0_SYS_PWR_REG); 453 EXYNOS5_ARM_CORE0_SYS_PWR_REG);
449 454
450 /* Restore the sysram cpu state register */ 455 /* Restore the sysram cpu state register */
451 writel_relaxed(exynos5420_cpu_state, 456 writel_relaxed(pm_state.cpu_state,
452 sysram_base_addr + EXYNOS5420_CPU_STATE); 457 pm_state.sysram_base + EXYNOS5420_CPU_STATE);
453 458
454 pmu_raw_writel(EXYNOS5420_USE_STANDBY_WFI_ALL, 459 pmu_raw_writel(EXYNOS5420_USE_STANDBY_WFI_ALL,
455 S5P_CENTRAL_SEQ_OPTION); 460 S5P_CENTRAL_SEQ_OPTION);
@@ -457,7 +462,7 @@ static void exynos5420_pm_resume(void)
457 if (exynos_pm_central_resume()) 462 if (exynos_pm_central_resume())
458 goto early_wakeup; 463 goto early_wakeup;
459 464
460 pmu_raw_writel(exynos_pmu_spare3, S5P_PMU_SPARE3); 465 pmu_raw_writel(pm_state.pmu_spare3, S5P_PMU_SPARE3);
461 466
462early_wakeup: 467early_wakeup:
463 468
@@ -654,4 +659,13 @@ void __init exynos_pm_init(void)
654 659
655 register_syscore_ops(&exynos_pm_syscore_ops); 660 register_syscore_ops(&exynos_pm_syscore_ops);
656 suspend_set_ops(&exynos_suspend_ops); 661 suspend_set_ops(&exynos_suspend_ops);
662
663 /*
664 * Applicable as of now only to Exynos542x. If booted under secure
665 * firmware, the non-secure region of sysram should be used.
666 */
667 if (exynos_secure_firmware_available())
668 pm_state.sysram_base = sysram_ns_base_addr;
669 else
670 pm_state.sysram_base = sysram_base_addr;
657} 671}
diff --git a/arch/arm/mach-s3c24xx/mach-gta02.c b/arch/arm/mach-s3c24xx/mach-gta02.c
index 9d5595c4ad99..594901f3b8e5 100644
--- a/arch/arm/mach-s3c24xx/mach-gta02.c
+++ b/arch/arm/mach-s3c24xx/mach-gta02.c
@@ -219,17 +219,6 @@ static void gta02_udc_vbus_draw(unsigned int ma)
219#define gta02_udc_vbus_draw NULL 219#define gta02_udc_vbus_draw NULL
220#endif 220#endif
221 221
222/*
223 * This is called when pc50633 is probed, unfortunately quite late in the
224 * day since it is an I2C bus device. Here we can belatedly define some
225 * platform devices with the advantage that we can mark the pcf50633 as the
226 * parent. This makes them get suspended and resumed with their parent
227 * the pcf50633 still around.
228 */
229
230static void gta02_pmu_attach_child_devices(struct pcf50633 *pcf);
231
232
233static char *gta02_batteries[] = { 222static char *gta02_batteries[] = {
234 "battery", 223 "battery",
235}; 224};
@@ -355,7 +344,6 @@ static struct pcf50633_platform_data gta02_pcf_pdata = {
355 }, 344 },
356 345
357 }, 346 },
358 .probe_done = gta02_pmu_attach_child_devices,
359 .mbc_event_callback = gta02_pmu_event_callback, 347 .mbc_event_callback = gta02_pmu_event_callback,
360}; 348};
361 349
@@ -512,36 +500,6 @@ static struct platform_device *gta02_devices[] __initdata = {
512 &s3c_device_ts, 500 &s3c_device_ts,
513}; 501};
514 502
515/* These guys DO need to be children of PMU. */
516
517static struct platform_device *gta02_devices_pmu_children[] = {
518};
519
520
521/*
522 * This is called when pc50633 is probed, quite late in the day since it is an
523 * I2C bus device. Here we can define platform devices with the advantage that
524 * we can mark the pcf50633 as the parent. This makes them get suspended and
525 * resumed with their parent the pcf50633 still around. All devices whose
526 * operation depends on something from pcf50633 must have this relationship
527 * made explicit like this, or suspend and resume will become an unreliable
528 * hellworld.
529 */
530
531static void gta02_pmu_attach_child_devices(struct pcf50633 *pcf)
532{
533 int n;
534
535 /* Grab a copy of the now probed PMU pointer. */
536 gta02_pcf = pcf;
537
538 for (n = 0; n < ARRAY_SIZE(gta02_devices_pmu_children); n++)
539 gta02_devices_pmu_children[n]->dev.parent = pcf->dev;
540
541 platform_add_devices(gta02_devices_pmu_children,
542 ARRAY_SIZE(gta02_devices_pmu_children));
543}
544
545static void gta02_poweroff(void) 503static void gta02_poweroff(void)
546{ 504{
547 pcf50633_reg_set_bit_mask(gta02_pcf, PCF50633_REG_OOCSHDWN, 1, 1); 505 pcf50633_reg_set_bit_mask(gta02_pcf, PCF50633_REG_OOCSHDWN, 1, 1);
diff --git a/arch/arm/mach-s3c24xx/mach-mini2440.c b/arch/arm/mach-s3c24xx/mach-mini2440.c
index f9fc1f8d2b28..50d67d760efd 100644
--- a/arch/arm/mach-s3c24xx/mach-mini2440.c
+++ b/arch/arm/mach-s3c24xx/mach-mini2440.c
@@ -64,31 +64,31 @@ static struct map_desc mini2440_iodesc[] __initdata = {
64}; 64};
65 65
66#define UCON S3C2410_UCON_DEFAULT 66#define UCON S3C2410_UCON_DEFAULT
67#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB 67#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
68#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE 68#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
69 69
70 70
71static struct s3c2410_uartcfg mini2440_uartcfgs[] __initdata = { 71static struct s3c2410_uartcfg mini2440_uartcfgs[] __initdata = {
72 [0] = { 72 [0] = {
73 .hwport = 0, 73 .hwport = 0,
74 .flags = 0, 74 .flags = 0,
75 .ucon = UCON, 75 .ucon = UCON,
76 .ulcon = ULCON, 76 .ulcon = ULCON,
77 .ufcon = UFCON, 77 .ufcon = UFCON,
78 }, 78 },
79 [1] = { 79 [1] = {
80 .hwport = 1, 80 .hwport = 1,
81 .flags = 0, 81 .flags = 0,
82 .ucon = UCON, 82 .ucon = UCON,
83 .ulcon = ULCON, 83 .ulcon = ULCON,
84 .ufcon = UFCON, 84 .ufcon = UFCON,
85 }, 85 },
86 [2] = { 86 [2] = {
87 .hwport = 2, 87 .hwport = 2,
88 .flags = 0, 88 .flags = 0,
89 .ucon = UCON, 89 .ucon = UCON,
90 .ulcon = ULCON, 90 .ulcon = ULCON,
91 .ufcon = UFCON, 91 .ufcon = UFCON,
92 }, 92 },
93}; 93};
94 94
@@ -104,8 +104,8 @@ static struct s3c2410_udc_mach_info mini2440_udc_cfg __initdata = {
104/* 104/*
105 * This macro simplifies the table bellow 105 * This macro simplifies the table bellow
106 */ 106 */
107#define _LCD_DECLARE(_clock,_xres,margin_left,margin_right,hsync, \ 107#define _LCD_DECLARE(_clock, _xres, margin_left, margin_right, hsync, \
108 _yres,margin_top,margin_bottom,vsync, refresh) \ 108 _yres, margin_top, margin_bottom, vsync, refresh) \
109 .width = _xres, \ 109 .width = _xres, \
110 .xres = _xres, \ 110 .xres = _xres, \
111 .height = _yres, \ 111 .height = _yres, \
@@ -128,7 +128,7 @@ static struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = {
128 [0] = { /* mini2440 + 3.5" TFT + touchscreen */ 128 [0] = { /* mini2440 + 3.5" TFT + touchscreen */
129 _LCD_DECLARE( 129 _LCD_DECLARE(
130 7, /* The 3.5 is quite fast */ 130 7, /* The 3.5 is quite fast */
131 240, 21, 38, 6, /* x timing */ 131 240, 21, 38, 6, /* x timing */
132 320, 4, 4, 2, /* y timing */ 132 320, 4, 4, 2, /* y timing */
133 60), /* refresh rate */ 133 60), /* refresh rate */
134 .lcdcon5 = (S3C2410_LCDCON5_FRM565 | 134 .lcdcon5 = (S3C2410_LCDCON5_FRM565 |
@@ -140,7 +140,7 @@ static struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = {
140 [1] = { /* mini2440 + 7" TFT + touchscreen */ 140 [1] = { /* mini2440 + 7" TFT + touchscreen */
141 _LCD_DECLARE( 141 _LCD_DECLARE(
142 10, /* the 7" runs slower */ 142 10, /* the 7" runs slower */
143 800, 40, 40, 48, /* x timing */ 143 800, 40, 40, 48, /* x timing */
144 480, 29, 3, 3, /* y timing */ 144 480, 29, 3, 3, /* y timing */
145 50), /* refresh rate */ 145 50), /* refresh rate */
146 .lcdcon5 = (S3C2410_LCDCON5_FRM565 | 146 .lcdcon5 = (S3C2410_LCDCON5_FRM565 |
@@ -148,7 +148,7 @@ static struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = {
148 S3C2410_LCDCON5_INVVFRAME | 148 S3C2410_LCDCON5_INVVFRAME |
149 S3C2410_LCDCON5_PWREN), 149 S3C2410_LCDCON5_PWREN),
150 }, 150 },
151 /* The VGA shield can outout at several resolutions. All share 151 /* The VGA shield can outout at several resolutions. All share
152 * the same timings, however, anything smaller than 1024x768 152 * the same timings, however, anything smaller than 1024x768
153 * will only be displayed in the top left corner of a 1024x768 153 * will only be displayed in the top left corner of a 1024x768
154 * XGA output unless you add optional dip switches to the shield. 154 * XGA output unless you add optional dip switches to the shield.
@@ -158,9 +158,10 @@ static struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = {
158 _LCD_DECLARE( 158 _LCD_DECLARE(
159 10, 159 10,
160 1024, 1, 2, 2, /* y timing */ 160 1024, 1, 2, 2, /* y timing */
161 768, 200, 16, 16, /* x timing */ 161 768, 200, 16, 16, /* x timing */
162 24), /* refresh rate, maximum stable, 162 24), /* refresh rate, maximum stable,
163 tested with the FPGA shield */ 163 * tested with the FPGA shield
164 */
164 .lcdcon5 = (S3C2410_LCDCON5_FRM565 | 165 .lcdcon5 = (S3C2410_LCDCON5_FRM565 |
165 S3C2410_LCDCON5_HWSWP), 166 S3C2410_LCDCON5_HWSWP),
166 }, 167 },
@@ -196,7 +197,8 @@ static struct s3c2410fb_mach_info mini2440_fb_info __initdata = {
196 197
197 /* Enable VD[2..7], VD[10..15], VD[18..23] and VCLK, syncs, VDEN 198 /* Enable VD[2..7], VD[10..15], VD[18..23] and VCLK, syncs, VDEN
198 * and disable the pull down resistors on pins we are using for LCD 199 * and disable the pull down resistors on pins we are using for LCD
199 * data. */ 200 * data.
201 */
200 202
201 .gpcup = (0xf << 1) | (0x3f << 10), 203 .gpcup = (0xf << 1) | (0x3f << 10),
202 204
@@ -232,10 +234,11 @@ static struct s3c2410fb_mach_info mini2440_fb_info __initdata = {
232/* MMC/SD */ 234/* MMC/SD */
233 235
234static struct s3c24xx_mci_pdata mini2440_mmc_cfg __initdata = { 236static struct s3c24xx_mci_pdata mini2440_mmc_cfg __initdata = {
235 .gpio_detect = S3C2410_GPG(8), 237 .gpio_detect = S3C2410_GPG(8),
236 .gpio_wprotect = S3C2410_GPH(8), 238 .gpio_wprotect = S3C2410_GPH(8),
237 .set_power = NULL, 239 .wprotect_invert = 1,
238 .ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34, 240 .set_power = NULL,
241 .ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34,
239}; 242};
240 243
241/* NAND Flash on MINI2440 board */ 244/* NAND Flash on MINI2440 board */
@@ -254,7 +257,8 @@ static struct mtd_partition mini2440_default_nand_part[] __initdata = {
254 [2] = { 257 [2] = {
255 .name = "kernel", 258 .name = "kernel",
256 /* 5 megabytes, for a kernel with no modules 259 /* 5 megabytes, for a kernel with no modules
257 * or a uImage with a ramdisk attached */ 260 * or a uImage with a ramdisk attached
261 */
258 .size = 0x00500000, 262 .size = 0x00500000,
259 .offset = SZ_256K + SZ_128K, 263 .offset = SZ_256K + SZ_128K,
260 }, 264 },
@@ -271,7 +275,7 @@ static struct s3c2410_nand_set mini2440_nand_sets[] __initdata = {
271 .nr_chips = 1, 275 .nr_chips = 1,
272 .nr_partitions = ARRAY_SIZE(mini2440_default_nand_part), 276 .nr_partitions = ARRAY_SIZE(mini2440_default_nand_part),
273 .partitions = mini2440_default_nand_part, 277 .partitions = mini2440_default_nand_part,
274 .flash_bbt = 1, /* we use u-boot to create a BBT */ 278 .flash_bbt = 1, /* we use u-boot to create a BBT */
275 }, 279 },
276}; 280};
277 281
@@ -282,7 +286,7 @@ static struct s3c2410_platform_nand mini2440_nand_info __initdata = {
282 .nr_sets = ARRAY_SIZE(mini2440_nand_sets), 286 .nr_sets = ARRAY_SIZE(mini2440_nand_sets),
283 .sets = mini2440_nand_sets, 287 .sets = mini2440_nand_sets,
284 .ignore_unset_ecc = 1, 288 .ignore_unset_ecc = 1,
285 .ecc_mode = NAND_ECC_HW, 289 .ecc_mode = NAND_ECC_HW,
286}; 290};
287 291
288/* DM9000AEP 10/100 ethernet controller */ 292/* DM9000AEP 10/100 ethernet controller */
@@ -290,7 +294,7 @@ static struct s3c2410_platform_nand mini2440_nand_info __initdata = {
290static struct resource mini2440_dm9k_resource[] = { 294static struct resource mini2440_dm9k_resource[] = {
291 [0] = DEFINE_RES_MEM(MACH_MINI2440_DM9K_BASE, 4), 295 [0] = DEFINE_RES_MEM(MACH_MINI2440_DM9K_BASE, 4),
292 [1] = DEFINE_RES_MEM(MACH_MINI2440_DM9K_BASE + 4, 4), 296 [1] = DEFINE_RES_MEM(MACH_MINI2440_DM9K_BASE + 4, 4),
293 [2] = DEFINE_RES_NAMED(IRQ_EINT7, 1, NULL, IORESOURCE_IRQ \ 297 [2] = DEFINE_RES_NAMED(IRQ_EINT7, 1, NULL, IORESOURCE_IRQ
294 | IORESOURCE_IRQ_HIGHEDGE), 298 | IORESOURCE_IRQ_HIGHEDGE),
295}; 299};
296 300
@@ -362,7 +366,8 @@ static struct gpio_keys_button mini2440_buttons[] = {
362 }, 366 },
363#if 0 367#if 0
364 /* this pin is also known as TCLK1 and seems to already 368 /* this pin is also known as TCLK1 and seems to already
365 * marked as "in use" somehow in the kernel -- possibly wrongly */ 369 * marked as "in use" somehow in the kernel -- possibly wrongly
370 */
366 { 371 {
367 .gpio = S3C2410_GPG(11), /* K6 */ 372 .gpio = S3C2410_GPG(11), /* K6 */
368 .code = KEY_F6, 373 .code = KEY_F6,
@@ -564,7 +569,8 @@ static char mini2440_features_str[12] __initdata = "0tb";
564static int __init mini2440_features_setup(char *str) 569static int __init mini2440_features_setup(char *str)
565{ 570{
566 if (str) 571 if (str)
567 strlcpy(mini2440_features_str, str, sizeof(mini2440_features_str)); 572 strlcpy(mini2440_features_str, str,
573 sizeof(mini2440_features_str));
568 return 1; 574 return 1;
569} 575}
570 576
@@ -583,10 +589,10 @@ struct mini2440_features_t {
583}; 589};
584 590
585static void __init mini2440_parse_features( 591static void __init mini2440_parse_features(
586 struct mini2440_features_t * features, 592 struct mini2440_features_t *features,
587 const char * features_str ) 593 const char *features_str)
588{ 594{
589 const char * fp = features_str; 595 const char *fp = features_str;
590 596
591 features->count = 0; 597 features->count = 0;
592 features->done = 0; 598 features->done = 0;
@@ -598,13 +604,14 @@ static void __init mini2440_parse_features(
598 switch (f) { 604 switch (f) {
599 case '0'...'9': /* tft screen */ 605 case '0'...'9': /* tft screen */
600 if (features->done & FEATURE_SCREEN) { 606 if (features->done & FEATURE_SCREEN) {
601 printk(KERN_INFO "MINI2440: '%c' ignored, " 607 pr_info("MINI2440: '%c' ignored, screen type already set\n",
602 "screen type already set\n", f); 608 f);
603 } else { 609 } else {
604 int li = f - '0'; 610 int li = f - '0';
611
605 if (li >= ARRAY_SIZE(mini2440_lcd_cfg)) 612 if (li >= ARRAY_SIZE(mini2440_lcd_cfg))
606 printk(KERN_INFO "MINI2440: " 613 pr_info("MINI2440: '%c' out of range LCD mode\n",
607 "'%c' out of range LCD mode\n", f); 614 f);
608 else { 615 else {
609 features->optional[features->count++] = 616 features->optional[features->count++] =
610 &s3c_device_lcd; 617 &s3c_device_lcd;
@@ -615,8 +622,8 @@ static void __init mini2440_parse_features(
615 break; 622 break;
616 case 'b': 623 case 'b':
617 if (features->done & FEATURE_BACKLIGHT) 624 if (features->done & FEATURE_BACKLIGHT)
618 printk(KERN_INFO "MINI2440: '%c' ignored, " 625 pr_info("MINI2440: '%c' ignored, backlight already set\n",
619 "backlight already set\n", f); 626 f);
620 else { 627 else {
621 features->optional[features->count++] = 628 features->optional[features->count++] =
622 &mini2440_led_backlight; 629 &mini2440_led_backlight;
@@ -624,13 +631,13 @@ static void __init mini2440_parse_features(
624 features->done |= FEATURE_BACKLIGHT; 631 features->done |= FEATURE_BACKLIGHT;
625 break; 632 break;
626 case 't': 633 case 't':
627 printk(KERN_INFO "MINI2440: '%c' ignored, " 634 pr_info("MINI2440: '%c' ignored, touchscreen not compiled in\n",
628 "touchscreen not compiled in\n", f); 635 f);
629 break; 636 break;
630 case 'c': 637 case 'c':
631 if (features->done & FEATURE_CAMERA) 638 if (features->done & FEATURE_CAMERA)
632 printk(KERN_INFO "MINI2440: '%c' ignored, " 639 pr_info("MINI2440: '%c' ignored, camera already registered\n",
633 "camera already registered\n", f); 640 f);
634 else 641 else
635 features->optional[features->count++] = 642 features->optional[features->count++] =
636 &s3c_device_camif; 643 &s3c_device_camif;
@@ -645,7 +652,7 @@ static void __init mini2440_init(void)
645 struct mini2440_features_t features = { 0 }; 652 struct mini2440_features_t features = { 0 };
646 int i; 653 int i;
647 654
648 printk(KERN_INFO "MINI2440: Option string mini2440=%s\n", 655 pr_info("MINI2440: Option string mini2440=%s\n",
649 mini2440_features_str); 656 mini2440_features_str);
650 657
651 /* Parse the feature string */ 658 /* Parse the feature string */
@@ -674,17 +681,17 @@ static void __init mini2440_init(void)
674 mini2440_fb_info.displays = 681 mini2440_fb_info.displays =
675 &mini2440_lcd_cfg[features.lcd_index]; 682 &mini2440_lcd_cfg[features.lcd_index];
676 683
677 printk(KERN_INFO "MINI2440: LCD"); 684 pr_info("MINI2440: LCD");
678 for (li = 0; li < ARRAY_SIZE(mini2440_lcd_cfg); li++) 685 for (li = 0; li < ARRAY_SIZE(mini2440_lcd_cfg); li++)
679 if (li == features.lcd_index) 686 if (li == features.lcd_index)
680 printk(" [%d:%dx%d]", li, 687 pr_cont(" [%d:%dx%d]", li,
681 mini2440_lcd_cfg[li].width, 688 mini2440_lcd_cfg[li].width,
682 mini2440_lcd_cfg[li].height); 689 mini2440_lcd_cfg[li].height);
683 else 690 else
684 printk(" %d:%dx%d", li, 691 pr_cont(" %d:%dx%d", li,
685 mini2440_lcd_cfg[li].width, 692 mini2440_lcd_cfg[li].width,
686 mini2440_lcd_cfg[li].height); 693 mini2440_lcd_cfg[li].height);
687 printk("\n"); 694 pr_cont("\n");
688 s3c24xx_fb_set_platdata(&mini2440_fb_info); 695 s3c24xx_fb_set_platdata(&mini2440_fb_info);
689 } 696 }
690 697
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index b600e38364eb..377ff9cda667 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -256,7 +256,7 @@ config S3C_PM_DEBUG_LED_SMDK
256 256
257config SAMSUNG_PM_CHECK 257config SAMSUNG_PM_CHECK
258 bool "S3C2410 PM Suspend Memory CRC" 258 bool "S3C2410 PM Suspend Memory CRC"
259 depends on PM 259 depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210)
260 select CRC32 260 select CRC32
261 help 261 help
262 Enable the PM code's memory area checksum over sleep. This option 262 Enable the PM code's memory area checksum over sleep. This option